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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell NAND Flash Controller (NFC)
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
properties:
compatible:
oneOf:
- items:
- const: marvell,armada-8k-nand-controller
- const: marvell,armada370-nand-controller
- enum:
- marvell,ac5-nand-controller
- marvell,armada370-nand-controller
- marvell,pxa3xx-nand-controller
- description: legacy bindings
deprecated: true
enum:
- marvell,armada-8k-nand
- marvell,armada370-nand
- marvell,pxa3xx-nand
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
description:
Shall reference the NAND controller clocks, the second one is
is only needed for the Armada 7K/8K SoCs
minItems: 1
maxItems: 2
clock-names:
minItems: 1
items:
- const: core
- const: reg
dmas:
maxItems: 1
dma-names:
items:
- const: data
marvell,system-controller:
$ref: /schemas/types.yaml#/definitions/phandle
description: Syscon node that handles NAND controller related registers
patternProperties:
"^nand@[a-f0-9]$":
type: object
$ref: raw-nand-chip.yaml
properties:
reg:
minimum: 0
maximum: 3
nand-rb:
items:
- minimum: 0
maximum: 1
nand-ecc-step-size:
const: 512
nand-ecc-strength:
enum: [1, 4, 8, 12, 16]
nand-ecc-mode:
const: hw
marvell,nand-keep-config:
$ref: /schemas/types.yaml#/definitions/flag
description:
Orders the driver not to take the timings from the core and
leaving them completely untouched. Bootloader timings will then
be used.
marvell,nand-enable-arbiter:
$ref: /schemas/types.yaml#/definitions/flag
description:
To enable the arbiter, all boards blindly used it,
this bit was set by the bootloader for many boards and even if
it is marked reserved in several datasheets, it might be needed to set
it (otherwise it is harmless).
deprecated: true
required:
- reg
- nand-rb
unevaluatedProperties: false
required:
- compatible
- reg
- interrupts
- clocks
allOf:
- $ref: nand-controller.yaml#
- if:
properties:
compatible:
contains:
const: marvell,pxa3xx-nand-controller
then:
required:
- dmas
- dma-names
- if:
properties:
compatible:
contains:
const: marvell,armada-8k-nand-controller
then:
properties:
clocks:
minItems: 2
clock-names:
minItems: 2
required:
- marvell,system-controller
else:
properties:
clocks:
minItems: 1
clock-names:
minItems: 1
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
nand_controller: nand-controller@d0000 {
compatible = "marvell,armada370-nand-controller";
reg = <0xd0000 0x54>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&coredivclk 0>;
nand@0 {
reg = <0>;
label = "main-storage";
nand-rb = <0>;
nand-ecc-mode = "hw";
marvell,nand-keep-config;
nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Rootfs";
reg = <0x00000000 0x40000000>;
};
};
};
};
- |
cp0_nand_controller: nand-controller@720000 {
compatible = "marvell,armada-8k-nand-controller",
"marvell,armada370-nand-controller";
reg = <0x720000 0x54>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "core", "reg";
clocks = <&cp0_clk 1 2>,
<&cp0_clk 1 17>;
marvell,system-controller = <&cp0_syscon0>;
nand@0 {
reg = <0>;
label = "main-storage";
nand-rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
};
};
- |
nand-controller@43100000 {
compatible = "marvell,pxa3xx-nand-controller";
reg = <0x43100000 90>;
interrupts = <45>;
clocks = <&clks 1>;
clock-names = "core";
dmas = <&pdma 97 3>;
dma-names = "data";
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-rb = <0>;
nand-ecc-mode = "hw";
marvell,nand-keep-config;
};
};
...
|
