Documentation/devicetree/bindings/mtd/renesas-nandc.yaml


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller

maintainers:
  - Miquel Raynal <miquel.raynal@bootlin.com>

allOf:
  - $ref: nand-controller.yaml

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - renesas,r9a06g032-nandc
          - const: renesas,rzn1-nandc

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: APB host controller clock
      - description: External NAND bus clock

  clock-names:
    items:
      - const: hclk
      - const: eclk

  power-domains:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - power-domains
  - interrupts

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/r9a06g032-sysctrl.h>

    nand-controller@40102000 {
        compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
        reg = <0x40102000 0x2000>;
        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;
        clock-names = "hclk", "eclk";
        power-domains = <&sysctrl>;
        #address-cells = <1>;
        #size-cells = <0>;
    };