summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
blob: cca81f89e252d55c0aeb7dcaac7caee6096bbf1a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/cdns,qspi-nor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cadence Quad SPI controller

maintainers:
  - Vaishnav Achath <vaishnav.a@ti.com>

allOf:
  - $ref: spi-controller.yaml#
  - if:
      properties:
        compatible:
          contains:
            const: xlnx,versal-ospi-1.0
    then:
      required:
        - power-domains
  - if:
      properties:
        compatible:
          contains:
            const: starfive,jh7110-qspi
    then:
      properties:
        resets:
          minItems: 2
          maxItems: 3

        reset-names:
          minItems: 2
          maxItems: 3
          items:
            enum: [ qspi, qspi-ocp, rstc_ref ]

    else:
      properties:
        resets:
          maxItems: 2

        reset-names:
          minItems: 1
          maxItems: 2
          items:
            enum: [ qspi, qspi-ocp ]
  - if:
      properties:
        compatible:
          contains:
            const: amd,pensando-elba-qspi
    then:
      properties:
        cdns,fifo-depth:
          enum: [ 128, 256, 1024 ]
          default: 1024
    else:
      properties:
        cdns,fifo-depth:
          enum: [ 128, 256 ]
          default: 128

properties:
  compatible:
    oneOf:
      - items:
          - enum:
              - amd,pensando-elba-qspi
              - ti,k2g-qspi
              - ti,am654-ospi
              - intel,lgm-qspi
              - xlnx,versal-ospi-1.0
              - intel,socfpga-qspi
              - starfive,jh7110-qspi
          - const: cdns,qspi-nor
      - const: cdns,qspi-nor

  reg:
    items:
      - description: the controller register set
      - description: the controller data area

  interrupts:
    maxItems: 1

  clocks:
    minItems: 1
    maxItems: 3

  clock-names:
    oneOf:
      - items:
          - const: ref
      - items:
          - const: ref
          - const: ahb
          - const: apb

  cdns,fifo-depth:
    description:
      Size of the data FIFO in words.
    $ref: /schemas/types.yaml#/definitions/uint32

  cdns,fifo-width:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Bus width of the data FIFO in bytes.
    default: 4

  cdns,trigger-address:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      32-bit indirect AHB trigger address.

  cdns,is-decoded-cs:
    type: boolean
    description:
      Flag to indicate whether decoder is used to select different chip select
      for different memory regions.

  cdns,rclk-en:
    type: boolean
    description:
      Flag to indicate that QSPI return clock is used to latch the read
      data rather than the QSPI clock. Make sure that QSPI return clock
      is populated on the board before using this property.

  power-domains:
    maxItems: 1

  resets:
    minItems: 2
    maxItems: 3

  reset-names:
    minItems: 2
    maxItems: 3
    items:
      enum: [ qspi, qspi-ocp, rstc_ref ]

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - cdns,fifo-depth
  - cdns,fifo-width
  - cdns,trigger-address
  - '#address-cells'
  - '#size-cells'

unevaluatedProperties: false

examples:
  - |
    qspi: spi@ff705000 {
        compatible = "cdns,qspi-nor";
        #address-cells = <1>;
        #size-cells = <0>;
        reg = <0xff705000 0x1000>,
              <0xffa00000 0x1000>;
        interrupts = <0 151 4>;
        clocks = <&qspi_clk>;
        cdns,fifo-depth = <128>;
        cdns,fifo-width = <4>;
        cdns,trigger-address = <0x00000000>;
        resets = <&rst 0x1>, <&rst 0x2>;
        reset-names = "qspi", "qspi-ocp";

        flash@0 {
            compatible = "jedec,spi-nor";
            reg = <0x0>;
        };
    };