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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Low Power SPI (LPSPI) for i.MX
maintainers:
- Anson Huang <Anson.Huang@nxp.com>
allOf:
- $ref: /schemas/spi/spi-controller.yaml#
properties:
compatible:
oneOf:
- enum:
- fsl,imx7ulp-spi
- fsl,imx8qxp-spi
- items:
- enum:
- fsl,imx8ulp-spi
- fsl,imx93-spi
- const: fsl,imx7ulp-spi
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: SoC SPI per clock
- description: SoC SPI ipg clock
clock-names:
items:
- const: per
- const: ipg
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
dma-names:
items:
- const: tx
- const: rx
fsl,spi-only-use-cs1-sel:
description:
spi common code does not support use of CS signals discontinuously.
i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
this property to re-config the chipselect value in the LPSPI driver.
type: boolean
num-cs:
description:
number of chip selects.
minimum: 1
maximum: 2
default: 1
power-domains:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/imx7ulp-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
spi@40290000 {
compatible = "fsl,imx7ulp-spi";
reg = <0x40290000 0x10000>;
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7ULP_CLK_LPSPI2>,
<&clks IMX7ULP_CLK_DUMMY>;
clock-names = "per", "ipg";
spi-slave;
fsl,spi-only-use-cs1-sel;
num-cs = <2>;
};
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