summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/ti/omap/am335x-base0033.dts
blob: eba843e22ea16eb60a62d263e5a65ce796e842cf (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
// SPDX-License-Identifier: GPL-2.0-only
/*
 * am335x-base0033.dts - Device Tree file for IGEP AQUILA EXPANSION
 *
 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
 */

#include "am335x-igep0033.dtsi"

/ {
	model = "IGEP COM AM335x on AQUILA Expansion";
	compatible = "isee,am335x-base0033", "isee,am335x-igep0033", "ti,am33xx";

	hdmi {
		compatible = "ti,tilcdc,slave";
		i2c = <&i2c0>;
		pinctrl-names = "default", "off";
		pinctrl-0 = <&nxp_hdmi_pins>;
		pinctrl-1 = <&nxp_hdmi_off_pins>;
		status = "okay";
	};

	leds_base {
		pinctrl-names = "default";
		pinctrl-0 = <&leds_base_pins>;

		compatible = "gpio-leds";

		led0 {
			label = "base:red:user";
			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;	/* gpio1_21 */
			default-state = "off";
		};

		led1 {
			label = "base:green:user";
			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;	/* gpio2_0 */
			default-state = "off";
		};
	};
};

&am33xx_pinmux {
	nxp_hdmi_pins: nxp-hdmi-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3)	/* xdma_event_intr0.clkout1 */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT, MUX_MODE0)
		>;
	};
	nxp_hdmi_off_pins: nxp-hdmi-off-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE3)	/* xdma_event_intr0.clkout1 */
		>;
	};

	leds_base_pins: leds-base-pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_a5.gpio1_21 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* gpmc_csn3.gpio2_0 */
		>;
	};
};

&lcdc {
	status = "okay";
};

&i2c0 {
	eeprom: eeprom@50 {
		compatible = "atmel,24c256";
		reg = <0x50>;
	};
};