summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/hisilicon/hip07-d05.dts
blob: c3df67845f0313949b3524c05b574803d30538d5 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
// SPDX-License-Identifier: GPL-2.0-only
/**
 * dts file for Hisilicon D05 Development Board
 *
 * Copyright (C) 2016 HiSilicon Ltd.
 */

/dts-v1/;

#include "hip07.dtsi"

/ {
	model = "Hisilicon Hip07 D05 Development Board";
	compatible = "hisilicon,hip07-d05";

	/* the mem node will be updated by UEFI. */
	memory@0 {
		device_type = "memory";
		reg = <0x0 0x00000000 0x0 0x40000000>;
		numa-node-id = <0>;
	};

	distance-map {
		compatible = "numa-distance-map-v1";
		distance-matrix = <0 0 10>,
				  <0 1 15>,
				  <0 2 20>,
				  <0 3 25>,
				  <1 0 15>,
				  <1 1 10>,
				  <1 2 25>,
				  <1 3 30>,
				  <2 0 20>,
				  <2 1 25>,
				  <2 2 10>,
				  <2 3 15>,
				  <3 0 25>,
				  <3 1 30>,
				  <3 2 15>,
				  <3 3 10>;
	};

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&uart0 {
	status = "okay";
};

&ipmi0 {
	status = "okay";
};

&usb_ohci {
	status = "okay";
};

&usb_ehci {
	status = "okay";
};

&eth0 {
	status = "okay";
};

&eth1 {
	status = "okay";
};

&eth2 {
	status = "okay";
};

&eth3 {
	status = "okay";
};

&sas1 {
	status = "okay";
};

&p0_pcie2_a {
	status = "okay";
};