summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso
blob: 0a6e75265ba9296a369e3ec58b2adfed3af2b663 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/**
 * DT overlay for IDK application board on AM654 EVM
 *
 * Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;
/plugin/;

#include <dt-bindings/net/ti-dp83867.h>
#include "k3-pinctrl.h"

&{/} {
	aliases {
		ethernet1 = "/icssg2-eth/ethernet-ports/port@0";
		ethernet2 = "/icssg2-eth/ethernet-ports/port@1";
	};

	/* Ethernet node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&icssg2_rgmii_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		ti,mii-g-rt = <&icssg2_mii_g_rt>;
		ti,mii-rt = <&icssg2_mii_rt>;
		ti,iep = <&icssg2_iep0>, <&icssg2_iep1>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */
		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>; /* ingress slice 1 */

		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1";
		ethernet-ports {
			#address-cells = <1>;
			#size-cells = <0>;
			icssg2_emac0: port@0 {
				reg = <0>;
				phy-handle = <&icssg2_phy0>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4120>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
			icssg2_emac1: port@1 {
				reg = <1>;
				phy-handle = <&icssg2_phy1>;
				phy-mode = "rgmii-id";
				ti,syscon-rgmii-delay = <&scm_conf 0x4124>;
				/* Filled in by bootloader */
				local-mac-address = [00 00 00 00 00 00];
			};
		};
	};
};

&main_pmx0 {

	icssg2_mdio_pins_default: icssg2-mdio-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	icssg2_rgmii_pins_default: icssg2-rgmii-default-pins {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */
			AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */
			AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */
			AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */
			AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */
			AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */
			AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */
			AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */

			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};
};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg2_mdio_pins_default>;
	#address-cells = <1>;
	#size-cells = <0>;

	icssg2_phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};

	icssg2_phy1: ethernet-phy@3 {
		reg = <3>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};