1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
|
From: Mike Galbraith <umgwanakikbuti@gmail.com>
Date: Sat, 27 Feb 2016 08:09:11 +0100
Subject: [PATCH 03/10] drm/i915: Use preempt_disable/enable_rt() where
recommended
Origin: https://www.kernel.org/pub/linux/kernel/projects/rt/6.9/older/patches-6.9-rt5.tar.xz
Mario Kleiner suggest in commit
ad3543ede630f ("drm/intel: Push get_scanout_position() timestamping into kms driver.")
a spots where preemption should be disabled on PREEMPT_RT. The
difference is that on PREEMPT_RT the intel_uncore::lock disables neither
preemption nor interrupts and so region remains preemptible.
The area covers only register reads and writes. The part that worries me
is:
- __intel_get_crtc_scanline() the worst case is 100us if no match is
found.
- intel_crtc_scanlines_since_frame_timestamp() not sure how long this
may take in the worst case.
It was in the RT queue for a while and nobody complained.
Disable preemption on PREEPMPT_RT during timestamping.
[bigeasy: patch description.]
Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Mike Galbraith <umgwanakikbuti@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
drivers/gpu/drm/i915/display/intel_vblank.c | 38 ++++++++++++++++++++--------
1 file changed, 28 insertions(+), 10 deletions(-)
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -276,6 +276,26 @@ int intel_crtc_scanline_to_hw(struct int
* all register accesses to the same cacheline to be serialized,
* otherwise they may hang.
*/
+static void intel_vblank_section_enter_irqsave(struct drm_i915_private *i915, unsigned long *flags)
+ __acquires(i915->uncore.lock)
+{
+#ifdef I915
+ spin_lock_irqsave(&i915->uncore.lock, *flags);
+#else
+ *flags = 0;
+#endif
+}
+
+static void intel_vblank_section_exit_irqrestore(struct drm_i915_private *i915, unsigned long flags)
+ __releases(i915->uncore.lock)
+{
+#ifdef I915
+ spin_unlock_irqrestore(&i915->uncore.lock, flags);
+#else
+ if (flags)
+ return;
+#endif
+}
static void intel_vblank_section_enter(struct drm_i915_private *i915)
__acquires(i915->uncore.lock)
{
@@ -333,10 +353,10 @@ static bool i915_get_crtc_scanoutpos(str
* timing critical raw register reads, potentially with
* preemption disabled, so the following code must not block.
*/
- local_irq_save(irqflags);
- intel_vblank_section_enter(dev_priv);
+ intel_vblank_section_enter_irqsave(dev_priv, &irqflags);
- /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+ if (IS_ENABLED(CONFIG_PREEMPT_RT))
+ preempt_disable();
/* Get optional system timestamp before query. */
if (stime)
@@ -400,10 +420,10 @@ static bool i915_get_crtc_scanoutpos(str
if (etime)
*etime = ktime_get();
- /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
+ if (IS_ENABLED(CONFIG_PREEMPT_RT))
+ preempt_enable();
- intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
+ intel_vblank_section_exit_irqrestore(dev_priv, irqflags);
/*
* While in vblank, position will be negative
@@ -441,13 +461,11 @@ int intel_get_crtc_scanline(struct intel
unsigned long irqflags;
int position;
- local_irq_save(irqflags);
- intel_vblank_section_enter(dev_priv);
+ intel_vblank_section_enter_irqsave(dev_priv, &irqflags);
position = __intel_get_crtc_scanline(crtc);
- intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
+ intel_vblank_section_exit_irqrestore(dev_priv, irqflags);
return position;
}
|