drivers/clk/qcom/clk-hfpll.h


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45

/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __QCOM_CLK_HFPLL_H__
#define __QCOM_CLK_HFPLL_H__

#include <linux/clk-provider.h>
#include <linux/spinlock.h>
#include "clk-regmap.h"

struct hfpll_data {
	u32 mode_reg;
	u32 l_reg;
	u32 m_reg;
	u32 n_reg;
	u32 user_reg;
	u32 droop_reg;
	u32 config_reg;
	u32 status_reg;
	u8  lock_bit;

	u32 l_val;
	u32 droop_val;
	u32 config_val;
	u32 user_val;
	u32 user_vco_mask;
	unsigned long low_vco_max_rate;

	unsigned long min_rate;
	unsigned long max_rate;
};

struct clk_hfpll {
	struct hfpll_data const *d;
	int init_done;

	struct clk_regmap clkr;
	spinlock_t lock;
};

#define to_clk_hfpll(_hw) \
	container_of(to_clk_regmap(_hw), struct clk_hfpll, clkr)

extern const struct clk_ops clk_ops_hfpll;

#endif