1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
|
// SPDX-License-Identifier: ISC
/*
* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
*/
#include <linux/module.h>
#include "mt76.h"
bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
int timeout)
{
u32 cur;
timeout /= 10;
do {
cur = __mt76_rr(dev, offset) & mask;
if (cur == val)
return true;
udelay(10);
} while (timeout-- > 0);
return false;
}
EXPORT_SYMBOL_GPL(__mt76_poll);
bool ____mt76_poll_msec(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
int timeout, int tick)
{
u32 cur;
timeout /= tick;
do {
cur = __mt76_rr(dev, offset) & mask;
if (cur == val)
return true;
usleep_range(1000 * tick, 2000 * tick);
} while (timeout-- > 0);
return false;
}
EXPORT_SYMBOL_GPL(____mt76_poll_msec);
int mt76_wcid_alloc(u32 *mask, int size)
{
int i, idx = 0, cur;
for (i = 0; i < DIV_ROUND_UP(size, 32); i++) {
idx = ffs(~mask[i]);
if (!idx)
continue;
idx--;
cur = i * 32 + idx;
if (cur >= size)
break;
mask[i] |= BIT(idx);
return cur;
}
return -1;
}
EXPORT_SYMBOL_GPL(mt76_wcid_alloc);
int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy)
{
struct mt76_wcid *wcid;
int i, j, min_rssi = 0;
s8 cur_rssi;
local_bh_disable();
rcu_read_lock();
for (i = 0; i < ARRAY_SIZE(dev->wcid_mask); i++) {
u32 mask = dev->wcid_mask[i];
u32 phy_mask = dev->wcid_phy_mask[i];
if (!mask)
continue;
for (j = i * 32; mask; j++, mask >>= 1, phy_mask >>= 1) {
if (!(mask & 1))
continue;
if (!!(phy_mask & 1) != ext_phy)
continue;
wcid = rcu_dereference(dev->wcid[j]);
if (!wcid)
continue;
spin_lock(&dev->rx_lock);
if (wcid->inactive_count++ < 5)
cur_rssi = -ewma_signal_read(&wcid->rssi);
else
cur_rssi = 0;
spin_unlock(&dev->rx_lock);
if (cur_rssi < min_rssi)
min_rssi = cur_rssi;
}
}
rcu_read_unlock();
local_bh_enable();
return min_rssi;
}
EXPORT_SYMBOL_GPL(mt76_get_min_avg_rssi);
int __mt76_worker_fn(void *ptr)
{
struct mt76_worker *w = ptr;
while (!kthread_should_stop()) {
set_current_state(TASK_INTERRUPTIBLE);
if (kthread_should_park()) {
kthread_parkme();
continue;
}
if (!test_and_clear_bit(MT76_WORKER_SCHEDULED, &w->state)) {
schedule();
continue;
}
set_bit(MT76_WORKER_RUNNING, &w->state);
set_current_state(TASK_RUNNING);
w->fn(w);
cond_resched();
clear_bit(MT76_WORKER_RUNNING, &w->state);
}
return 0;
}
EXPORT_SYMBOL_GPL(__mt76_worker_fn);
MODULE_DESCRIPTION("MediaTek MT76x helpers");
MODULE_LICENSE("Dual BSD/GPL");
|