From 3d08cd331c1adcf0d917392f7e527b3f00511748 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Fri, 24 May 2024 06:52:22 +0200 Subject: Merging upstream version 6.8. Signed-off-by: Daniel Baumann --- man/man2/pciconfig_read.2 | 122 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 122 insertions(+) create mode 100644 man/man2/pciconfig_read.2 (limited to 'man/man2/pciconfig_read.2') diff --git a/man/man2/pciconfig_read.2 b/man/man2/pciconfig_read.2 new file mode 100644 index 0000000..a23e30f --- /dev/null +++ b/man/man2/pciconfig_read.2 @@ -0,0 +1,122 @@ +.\" Contributed by Niki A. Rahimi, LTC Security Development +.\" narahimi@us.ibm.com +.\" +.\" %%%LICENSE_START(FREELY_REDISTRIBUTABLE) +.\" May be freely distributed and modified. +.\" %%%LICENSE_END +.\" +.TH pciconfig_read 2 2024-05-02 "Linux man-pages (unreleased)" +.SH NAME +pciconfig_read, pciconfig_write, pciconfig_iobase \- +pci device information handling +.SH LIBRARY +Standard C library +.RI ( libc ", " \-lc ) +.SH SYNOPSIS +.nf +.B #include +.P +.BI "int pciconfig_read(unsigned long " bus ", unsigned long " dfn , +.BI " unsigned long " off ", unsigned long " len , +.BI " unsigned char *" buf ); +.BI "int pciconfig_write(unsigned long " bus ", unsigned long " dfn , +.BI " unsigned long " off ", unsigned long " len , +.BI " unsigned char *" buf ); +.BI "int pciconfig_iobase(int " which ", unsigned long " bus , +.BI " unsigned long " devfn ); +.fi +.SH DESCRIPTION +Most of the interaction with PCI devices is already handled by the +kernel PCI layer, +and thus these calls should not normally need to be accessed from user space. +.TP +.BR pciconfig_read () +Reads to +.I buf +from device +.I dev +at offset +.I off +value. +.TP +.BR pciconfig_write () +Writes from +.I buf +to device +.I dev +at offset +.I off +value. +.TP +.BR pciconfig_iobase () +You pass it a bus/devfn pair and get a physical address for either the +memory offset (for things like prep, this is 0xc0000000), +the IO base for PIO cycles, or the ISA holes if any. +.SH RETURN VALUE +.TP +.BR pciconfig_read () +On success, zero is returned. +On error, \-1 is returned and +.I errno +is set to indicate the error. +.TP +.BR pciconfig_write () +On success, zero is returned. +On error, \-1 is returned and +.I errno +is set to indicate the error. +.TP +.BR pciconfig_iobase () +Returns information on locations of various I/O +regions in physical memory according to the +.I which +value. +Values for +.I which +are: +.BR IOBASE_BRIDGE_NUMBER , +.BR IOBASE_MEMORY , +.BR IOBASE_IO , +.BR IOBASE_ISA_IO , +.BR IOBASE_ISA_MEM . +.SH ERRORS +.TP +.B EINVAL +.I len +value is invalid. +This does not apply to +.BR pciconfig_iobase (). +.TP +.B EIO +I/O error. +.TP +.B ENODEV +For +.BR pciconfig_iobase (), +"hose" value is NULL. +For the other calls, could not find a slot. +.TP +.B ENOSYS +The system has not implemented these calls +.RB ( CONFIG_PCI +not defined). +.TP +.B EOPNOTSUPP +This return value is valid only for +.BR pciconfig_iobase (). +It is returned if the value for +.I which +is invalid. +.TP +.B EPERM +User does not have the +.B CAP_SYS_ADMIN +capability. +This does not apply to +.BR pciconfig_iobase (). +.SH STANDARDS +Linux. +.SH HISTORY +Linux 2.0.26/2.1.11. +.SH SEE ALSO +.BR capabilities (7) -- cgit v1.2.3