Adding upstream version 2.9.1.upstream/2.9.1upstream

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

1 files changed, 478 insertions, 469 deletions

diff --git a/nvme-print-stdout.c b/nvme-print-stdout.c
index 63462ea..bd0d888 100644
--- a/nvme-print-stdout.c
+++ b/nvme-print-stdout.c
@@ -183,7 +183,7 @@ static void stdout_predictable_latency_per_nvmset(
 		le64_to_cpu(plpns_log->dtwin_wt));
 	printf("DTWIN Time Maximum: %"PRIu64"\n",
 		le64_to_cpu(plpns_log->dtwin_tmax));
-	printf("NDWIN Time Minimum High: %"PRIu64" \n",
+	printf("NDWIN Time Minimum High: %"PRIu64"\n",
 		le64_to_cpu(plpns_log->ndwin_tmin_hi));
 	printf("NDWIN Time Minimum Low: %"PRIu64"\n",
 		le64_to_cpu(plpns_log->ndwin_tmin_lo));
@@ -203,59 +203,47 @@ static void stdout_predictable_latency_event_agg_log(
 	__u64 num_entries;
 
 	num_entries = le64_to_cpu(pea_log->num_entries);
-	printf("Predictable Latency Event Aggregate Log for"\
-		" device: %s\n", devname);
+	printf("Predictable Latency Event Aggregate Log for device: %s\n", devname);
 
-	printf("Number of Entries Available: %"PRIu64"\n",
-		(uint64_t)num_entries);
+	printf("Number of Entries Available: %"PRIu64"\n", (uint64_t)num_entries);
 
 	num_iter = min(num_entries, log_entries);
-	for (int i = 0; i < num_iter; i++) {
-		printf("Entry[%d]: %u\n", i + 1,
-			le16_to_cpu(pea_log->entries[i]));
-	}
+	for (int i = 0; i < num_iter; i++)
+		printf("Entry[%d]: %u\n", i + 1, le16_to_cpu(pea_log->entries[i]));
 }
 
 static void stdout_persistent_event_log_rci(__le32 pel_header_rci)
 {
 	__u32 rci = le32_to_cpu(pel_header_rci);
-	__u32 rsvd19 = (rci & 0xfff80000) >> 19;
-	__u8 rce = (rci & 0x40000) >> 18;
-	__u8 rcpit = (rci & 0x30000) >> 16;
-	__u16 rcpid = rci & 0xffff;
+	__u32 rsvd19 = NVME_PEL_RCI_RSVD(rci);
+	__u8 rce = NVME_PEL_RCI_RCE(rci);
+	__u8 rcpit = NVME_PEL_RCI_RCPIT(rci);
+	__u16 rcpid = NVME_PEL_RCI_RCPID(rci);
 
-	if(rsvd19)
+	if (rsvd19)
 		printf("  [31:19] : %#x\tReserved\n", rsvd19);
-	printf("\tReporting Context Exists (RCE): %s(%u)\n",
-		rce ? "true" : "false", rce);
+	printf("\tReporting Context Exists (RCE): %s(%u)\n", rce ? "true" : "false", rce);
 	printf("\tReporting Context Port Identifier Type (RCPIT): %u(%s)\n", rcpit,
-		(rcpit == 0x00) ? "Does not already exist" :
-		(rcpit == 0x01) ? "NVM subsystem port" :
-		(rcpit == 0x02) ? "NVMe-MI port" : "Reserved");
+	       nvme_pel_rci_rcpit_to_string(rcpit));
 	printf("\tReporting Context Port Identifier (RCPID): %#x\n\n", rcpid);
 }
 
 static void stdout_persistent_event_entry_ehai(__u8 ehai)
 {
-	__u8 rsvd1 = (ehai & 0xfc) >> 2;
-	__u8 pit = ehai & 0x03;
+	__u8 rsvd1 = NVME_PEL_EHAI_RSVD(ehai);
+	__u8 pit = NVME_PEL_EHAI_PIT(ehai);
 
 	printf("  [7:2] : %#x\tReserved\n", rsvd1);
-	printf("\tPort Identifier Type (PIT): %u(%s)\n", pit,
-		(pit == 0x00) ? "PIT not reported and PELPID does not apply" :
-		(pit == 0x01) ? "NVM subsystem port" :
-		(pit == 0x02) ? "NVMe-MI port" :
-		"Event not associated with any port and PELPID does not apply");
+	printf("\tPort Identifier Type (PIT): %u(%s)\n", pit, nvme_pel_ehai_pit_to_string(pit));
 }
 
 static void stdout_add_bitmap(int i, __u8 seb)
 {
-	for (int bit = 0; bit < 8; bit++) {
-		if (nvme_pel_event_to_string(bit + i * 8)) {
-			if (nvme_pel_event_to_string(bit + i * 8))
-				if ((seb >> bit) & 0x1)
-					printf("	Support %s\n",
-					       nvme_pel_event_to_string(bit + i * 8));
+	for (int bit = 0; bit < CHAR_BIT; bit++) {
+		if (nvme_pel_event_to_string(bit + i * CHAR_BIT)) {
+			if ((seb >> bit) & 0x1)
+				printf("	Support %s\n",
+				       nvme_pel_event_to_string(bit + i * CHAR_BIT));
 		}
 	}
 }
@@ -321,7 +309,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			le32_to_cpu(pevent_log_head->rci));
 		if (human)
 			stdout_persistent_event_log_rci(pevent_log_head->rci);
-		printf("Supported Events Bitmap: \n");
+		printf("Supported Events Bitmap:\n");
 		for (int i = 0; i < 32; i++) {
 			if (pevent_log_head->seb[i] == 0)
 				continue;
@@ -366,12 +354,12 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 		switch (pevent_entry_head->etype) {
 		case NVME_PEL_SMART_HEALTH_EVENT:
 			smart_event = pevent_log_info + offset;
-			printf("Smart Health Event Entry: \n");
+			printf("Smart Health Event Entry:\n");
 			stdout_smart_log(smart_event, NVME_NSID_ALL, devname);
 			break;
 		case NVME_PEL_FW_COMMIT_EVENT:
 			fw_commit_event = pevent_log_info + offset;
-			printf("FW Commit Event Entry: \n");
+			printf("FW Commit Event Entry:\n");
 			printf("Old Firmware Revision: %"PRIu64" (%s)\n",
 				le64_to_cpu(fw_commit_event->old_fw_rev),
 				util_fw_to_string((char *)&fw_commit_event->old_fw_rev));
@@ -390,7 +378,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_TIMESTAMP_EVENT:
 			ts_change_event = pevent_log_info + offset;
-			printf("Time Stamp Change Event Entry: \n");
+			printf("Time Stamp Change Event Entry:\n");
 			printf("Previous Timestamp: %"PRIu64"\n",
 				le64_to_cpu(ts_change_event->previous_timestamp));
 			printf("Milliseconds Since Reset: %"PRIu64"\n",
@@ -402,11 +390,11 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 
 			por_info_list = por_info_len / sizeof(*por_event);
 
-			printf("Power On Reset Event Entry: \n");
+			printf("Power On Reset Event Entry:\n");
 			fw_rev = pevent_log_info + offset;
 			printf("Firmware Revision: %"PRIu64" (%s)\n", le64_to_cpu(*fw_rev),
 				util_fw_to_string((char *)fw_rev));
-			printf("Reset Information List: \n");
+			printf("Reset Information List:\n");
 
 			for (int i = 0; i < por_info_list; i++) {
 				por_event = pevent_log_info + offset +
@@ -432,7 +420,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_CHANGE_NS_EVENT:
 			ns_event = pevent_log_info + offset;
-			printf("Change Namespace Event Entry: \n");
+			printf("Change Namespace Event Entry:\n");
 			printf("Namespace Management CDW10: %u\n",
 				le32_to_cpu(ns_event->nsmgt_cdw10));
 			printf("Namespace Size: %"PRIu64"\n",
@@ -451,7 +439,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_FORMAT_START_EVENT:
 			format_start_event = pevent_log_info + offset;
-			printf("Format NVM Start Event Entry: \n");
+			printf("Format NVM Start Event Entry:\n");
 			printf("Namespace Identifier: %u\n",
 				le32_to_cpu(format_start_event->nsid));
 			printf("Format NVM Attributes: %u\n",
@@ -461,7 +449,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_FORMAT_COMPLETION_EVENT:
 			format_cmpln_event = pevent_log_info + offset;
-			printf("Format NVM Completion Event Entry: \n");
+			printf("Format NVM Completion Event Entry:\n");
 			printf("Namespace Identifier: %u\n",
 				le32_to_cpu(format_cmpln_event->nsid));
 			printf("Smallest Format Progress Indicator: %u\n",
@@ -475,7 +463,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_SANITIZE_START_EVENT:
 			sanitize_start_event = pevent_log_info + offset;
-			printf("Sanitize Start Event Entry: \n");
+			printf("Sanitize Start Event Entry:\n");
 			printf("SANICAP: %u\n", sanitize_start_event->sani_cap);
 			printf("Sanitize CDW10: %u\n",
 				le32_to_cpu(sanitize_start_event->sani_cdw10));
@@ -484,7 +472,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_SANITIZE_COMPLETION_EVENT:
 			sanitize_cmpln_event = pevent_log_info + offset;
-			printf("Sanitize Completion Event Entry: \n");
+			printf("Sanitize Completion Event Entry:\n");
 			printf("Sanitize Progress: %u\n",
 				le16_to_cpu(sanitize_cmpln_event->sani_prog));
 			printf("Sanitize Status: %u\n",
@@ -494,14 +482,14 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_SET_FEATURE_EVENT:
 			set_feat_event = pevent_log_info + offset;
-			printf("Set Feature Event Entry: \n");
-			dword_cnt =  set_feat_event->layout & 0x03;
-			fid = le32_to_cpu(set_feat_event->cdw_mem[0]) & 0x000f;
+			printf("Set Feature Event Entry:\n");
+			dword_cnt = NVME_SET_FEAT_EVENT_DW_COUNT(set_feat_event->layout);
+			fid = NVME_GET(le32_to_cpu(set_feat_event->cdw_mem[0]), FEATURES_CDW10_FID);
 			cdw11 = le32_to_cpu(set_feat_event->cdw_mem[1]);
 
 			printf("Set Feature ID  :%#02x (%s),  value:%#08x\n", fid,
 				nvme_feature_to_string(fid), cdw11);
-			if (((set_feat_event->layout & 0xff) >> 2) != 0) {
+			if (NVME_SET_FEAT_EVENT_MB_COUNT(set_feat_event->layout)) {
 				mem_buf = (unsigned char *)(set_feat_event + 4 + dword_cnt * 4);
 				stdout_feature_show_fields(fid, cdw11, mem_buf);
 			}
@@ -511,7 +499,7 @@ static void stdout_persistent_event_log(void *pevent_log_info,
 			break;
 		case NVME_PEL_THERMAL_EXCURSION_EVENT:
 			thermal_exc_event = pevent_log_info + offset;
-			printf("Thermal Excursion Event Entry: \n");
+			printf("Thermal Excursion Event Entry:\n");
 			printf("Over Temperature: %u\n", thermal_exc_event->over_temp);
 			printf("Threshold: %u\n", thermal_exc_event->threshold);
 			break;
@@ -528,8 +516,7 @@ static void stdout_endurance_group_event_agg_log(
 		struct nvme_aggregate_predictable_lat_event *endurance_log,
 		__u64 log_entries, __u32 size, const char *devname)
 {
-	printf("Endurance Group Event Aggregate Log for"\
-		" device: %s\n", devname);
+	printf("Endurance Group Event Aggregate Log for device: %s\n", devname);
 
 	printf("Number of Entries Available: %"PRIu64"\n",
 		le64_to_cpu(endurance_log->num_entries));
@@ -611,7 +598,7 @@ static void stdout_fid_support_effects_log_human(__u32 fid_support)
 	printf("  CCC%s", (fid_support & NVME_FID_SUPPORTED_EFFECTS_CCC) ? set : clr);
 	printf("  USS%s", (fid_support & NVME_FID_SUPPORTED_EFFECTS_UUID_SEL) ? set : clr);
 
-	fsp = (fid_support >> NVME_FID_SUPPORTED_EFFECTS_SCOPE_SHIFT) & NVME_FID_SUPPORTED_EFFECTS_SCOPE_MASK;
+	fsp = NVME_GET(fid_support, FID_SUPPORTED_EFFECTS_SCOPE);
 
 	printf("  NAMESPACE SCOPE%s", (fsp & NVME_FID_SUPPORTED_EFFECTS_SCOPE_NS) ? set : clr);
 	printf("  CONTROLLER SCOPE%s", (fsp & NVME_FID_SUPPORTED_EFFECTS_SCOPE_CTRL) ? set : clr);
@@ -654,7 +641,7 @@ static void stdout_mi_cmd_support_effects_log_human(__u32 mi_cmd_support)
 	printf("  NIC%s", (mi_cmd_support & NVME_MI_CMD_SUPPORTED_EFFECTS_NIC) ? set : clr);
 	printf("  CCC%s", (mi_cmd_support & NVME_MI_CMD_SUPPORTED_EFFECTS_CCC) ? set : clr);
 
-	csp = (mi_cmd_support >> NVME_MI_CMD_SUPPORTED_EFFECTS_SCOPE_SHIFT) & NVME_MI_CMD_SUPPORTED_EFFECTS_SCOPE_MASK;
+	csp = NVME_GET(mi_cmd_support, MI_CMD_SUPPORTED_EFFECTS_SCOPE);
 
 	printf("  NAMESPACE SCOPE%s", (csp & NVME_MI_CMD_SUPPORTED_EFFECTS_SCOPE_NS) ? set : clr);
 	printf("  CONTROLLER SCOPE%s", (csp & NVME_MI_CMD_SUPPORTED_EFFECTS_SCOPE_CTRL) ? set : clr);
@@ -688,18 +675,19 @@ static void stdout_mi_cmd_support_effects_log(struct nvme_mi_cmd_supported_effec
 static void stdout_boot_part_log(void *bp_log, const char *devname,
 				 __u32 size)
 {
-	struct nvme_boot_partition *hdr;
+	struct nvme_boot_partition *hdr = bp_log;
 
-	hdr = bp_log;
 	printf("Boot Partition Log for device: %s\n", devname);
 	printf("Log ID: %u\n", hdr->lid);
-	printf("Boot Partition Size: %u KiB\n", le32_to_cpu(hdr->bpinfo) & 0x7fff);
-	printf("Active BPID: %u\n", (le32_to_cpu(hdr->bpinfo) >> 31) & 0x1);
+	printf("Boot Partition Size: %u KiB\n",
+	       NVME_BOOT_PARTITION_INFO_BPSZ(le32_to_cpu(hdr->bpinfo)));
+	printf("Active BPID: %u\n", NVME_BOOT_PARTITION_INFO_ABPID(le32_to_cpu(hdr->bpinfo)));
 }
 
 static const char *eomip_to_string(__u8 eomip)
 {
 	const char *string;
+
 	switch (eomip) {
 	case NVME_PHY_RX_EOM_NOT_STARTED:
 		string = "Not Started";
@@ -719,9 +707,9 @@ static const char *eomip_to_string(__u8 eomip)
 
 static void stdout_phy_rx_eom_odp(uint8_t odp)
 {
-	__u8 rsvd = (odp >> 2) & 0x3F;
-	__u8 edfp = (odp >> 1) & 0x1;
-	__u8 pefp = odp & 0x1;
+	__u8 rsvd = NVME_EOM_ODP_RSVD(odp);
+	__u8 edfp = NVME_EOM_ODP_EDFP(odp);
+	__u8 pefp = NVME_EOM_ODP_PEFP(odp);
 
 	if (rsvd)
 		printf("  [7:2] : %#x\tReserved\n", rsvd);
@@ -735,6 +723,7 @@ static void stdout_eom_printable_eye(struct nvme_eom_lane_desc *lane)
 {
 	char *eye = (char *)lane->eye_desc;
 	int i, j;
+
 	for (i = 0; i < lane->nrows; i++) {
 		for (j = 0; j < lane->ncols; j++)
 			printf("%c", eye[i * lane->ncols + j]);
@@ -762,7 +751,7 @@ static void stdout_phy_rx_eom_descs(struct nvme_phy_rx_eom_log *log)
 		printf("Number of Columns: %u\n", le16_to_cpu(desc->ncols));
 		printf("Eye Data Length: %u\n", le16_to_cpu(desc->edlen));
 
-		if (log->odp & NVME_EOM_PRINTABLE_EYE_PRESENT)
+		if (NVME_EOM_ODP_PEFP(log->odp))
 			stdout_eom_printable_eye(desc);
 
 		/* Eye Data field is vendor specific */
@@ -798,9 +787,8 @@ static void stdout_phy_rx_eom_log(struct nvme_phy_rx_eom_log *log, __u16 control
 	printf("Estimated Time for Better Quality: %u\n", le16_to_cpu(log->etbetter));
 	printf("Estimated Time for Best Quality: %u\n", le16_to_cpu(log->etbest));
 
-	if (log->eomip == NVME_PHY_RX_EOM_COMPLETED) {
+	if (log->eomip == NVME_PHY_RX_EOM_COMPLETED)
 		stdout_phy_rx_eom_descs(log);
-	}
 }
 
 static void stdout_media_unit_stat_log(struct nvme_media_unit_stat_log *mus_log)
@@ -832,10 +820,10 @@ static void stdout_media_unit_stat_log(struct nvme_media_unit_stat_log *mus_log)
 
 static void stdout_fdp_config_fdpa(uint8_t fdpa)
 {
-	__u8 valid = (fdpa >> 7) & 0x1;
+	__u8 valid = NVME_GET(fdpa, FDP_CONFIG_FDPA_VALID);
 	__u8 rsvd = (fdpa >> 5) & 0x3;
-	__u8 fdpvwc = (fdpa >> 4) & 0x1;
-	__u8 rgif = fdpa & 0xf;
+	__u8 fdpvwc = NVME_GET(fdpa, FDP_CONFIG_FDPA_FDPVWC);
+	__u8 rgif = NVME_GET(fdpa, FDP_CONFIG_FDPA_RGIF);
 
 	printf("  [7:7] : %#x\tFDP Configuration %sValid\n",
 		valid, valid ? "" : "Not ");
@@ -886,7 +874,7 @@ static void stdout_fdp_usage(struct nvme_fdp_ruhu_log *log, size_t len)
 	for (int i = 0; i < nruh; i++) {
 		struct nvme_fdp_ruhu_desc *ruhu = &log->ruhus[i];
 
-		printf("Reclaim Unit Handle %d Attributes: 0x%"PRIx8" (%s)\n", i, ruhu->ruha,
+		printf("Reclaim Unit Handle %d Attributes: %#"PRIx8" (%s)\n", i, ruhu->ruha,
 				ruhu->ruha == 0x0 ? "Unused" : (
 				ruhu->ruha == 0x1 ? "Host Specified" : (
 				ruhu->ruha == 0x2 ? "Controller Specified" : "Unknown")));
@@ -917,25 +905,28 @@ static void stdout_fdp_events(struct nvme_fdp_events_log *log)
 		tm = localtime(&ts);
 
 		printf("Event[%u]\n", i);
-		printf("  Event Type: 0x%"PRIx8" (%s)\n", event->type, nvme_fdp_event_to_string(event->type));
+		printf("  Event Type: %#"PRIx8" (%s)\n", event->type,
+		       nvme_fdp_event_to_string(event->type));
 		printf("  Event Timestamp: %"PRIu64" (%s)\n", int48_to_long(event->ts.timestamp),
 			strftime(buffer, sizeof(buffer), "%c %Z", tm) ? buffer : "-");
 
 		if (event->flags & NVME_FDP_EVENT_F_PIV)
-			printf("  Placement Identifier (PID): 0x%"PRIx16"\n", le16_to_cpu(event->pid));
+			printf("  Placement Identifier (PID): %#"PRIx16"\n",
+			       le16_to_cpu(event->pid));
 
 		if (event->flags & NVME_FDP_EVENT_F_NSIDV)
 			printf("  Namespace Identifier (NSID): %"PRIu32"\n", le32_to_cpu(event->nsid));
 
 		if (event->type == NVME_FDP_EVENT_REALLOC) {
 			struct nvme_fdp_event_realloc *mr;
+
 			mr = (struct nvme_fdp_event_realloc *)&event->type_specific;
 
 			printf("  Number of LBAs Moved (NLBAM): %"PRIu16"\n", le16_to_cpu(mr->nlbam));
 
-			if (mr->flags & NVME_FDP_EVENT_REALLOC_F_LBAV) {
-				printf("  Logical Block Address (LBA): 0x%"PRIx64"\n", le64_to_cpu(mr->lba));
-			}
+			if (mr->flags & NVME_FDP_EVENT_REALLOC_F_LBAV)
+				printf("  Logical Block Address (LBA): %#"PRIx64"\n",
+				       le64_to_cpu(mr->lba));
 		}
 
 		if (event->flags & NVME_FDP_EVENT_F_LV) {
@@ -980,7 +971,7 @@ static void stdout_supported_cap_config_log(struct nvme_supported_cap_config_lis
 			le16_to_cpu(cap->cap_config_desc[i].domainid));
 		egcn = le16_to_cpu(cap->cap_config_desc[i].egcn);
 		printf("Number of Endurance Group Configuration Descriptors: %u\n", egcn);
-		for(j = 0; j < egcn; j++) {
+		for (j = 0; j < egcn; j++) {
 			printf("Endurance Group Identifier: %u\n",
 				le16_to_cpu(cap->cap_config_desc[i].egcd[j].endgid));
 			printf("Capacity Adjustment Factor: %u\n",
@@ -996,20 +987,20 @@ static void stdout_supported_cap_config_log(struct nvme_supported_cap_config_lis
 					cap->cap_config_desc[i].egcd[j].end_est)));
 			egsets = le16_to_cpu(cap->cap_config_desc[i].egcd[j].egsets);
 			printf("Number of NVM Sets: %u\n", egsets);
-			for(k = 0; k < egsets; k++) {
+			for (k = 0; k < egsets; k++)
 				printf("NVM Set %d Identifier: %u\n", i,
-					le16_to_cpu(cap->cap_config_desc[i].egcd[j].nvmsetid[k]));
-			}
-			chan_desc = (struct nvme_end_grp_chan_desc *) \
-					((cap->cap_config_desc[i].egcd[j].nvmsetid[0]) * (sizeof(__u16)*egsets));
+				       le16_to_cpu(cap->cap_config_desc[i].egcd[j].nvmsetid[k]));
+
+			chan_desc = (struct nvme_end_grp_chan_desc *)
+			    &cap->cap_config_desc[i].egcd[j].nvmsetid[egsets];
 			egchans = le16_to_cpu(chan_desc->egchans);
 			printf("Number of Channels: %u\n", egchans);
-			for(l = 0; l < egchans; l++) {
+			for (l = 0; l < egchans; l++) {
 				printf("Channel Identifier: %u\n",
 					le16_to_cpu(chan_desc->chan_config_desc[l].chanid));
 				chmus = le16_to_cpu(chan_desc->chan_config_desc[l].chmus);
 				printf("Number of Channel Media Units: %u\n", chmus);
-				for(m = 0; m < chmus; m++) {
+				for (m = 0; m < chmus; m++) {
 					printf("Media Unit Identifier: %u\n",
 						le16_to_cpu(chan_desc->chan_config_desc[l].mu_config_desc[m].muid));
 					printf("Media Unit Descriptor Length: %u\n",
@@ -1127,21 +1118,21 @@ static void stdout_registers_cap(struct nvme_bar_cap *cap)
 
 static void stdout_registers_version(__u32 vs)
 {
-	printf("\tNVMe specification %d.%d\n\n", (vs & 0xffff0000) >> 16,
-		(vs & 0x0000ff00) >> 8);
+	printf("\tNVMe specification %d.%d.%d\n\n", NVME_MAJOR(vs), NVME_MINOR(vs),
+	       NVME_TERTIARY(vs));
 }
 
-static void stdout_registers_cc_ams (__u8 ams)
+static void stdout_registers_cc_ams(__u8 ams)
 {
 	printf("\tArbitration Mechanism Selected     (AMS): ");
 	switch (ams) {
-	case 0:
+	case NVME_CC_AMS_RR:
 		printf("Round Robin\n");
 		break;
-	case 1:
+	case NVME_CC_AMS_WRRU:
 		printf("Weighted Round Robin with Urgent Priority Class\n");
 		break;
-	case 7:
+	case NVME_CC_AMS_VS:
 		printf("Vendor Specific\n");
 		break;
 	default:
@@ -1150,17 +1141,17 @@ static void stdout_registers_cc_ams (__u8 ams)
 	}
 }
 
-static void stdout_registers_cc_shn (__u8 shn)
+static void stdout_registers_cc_shn(__u8 shn)
 {
 	printf("\tShutdown Notification              (SHN): ");
 	switch (shn) {
-	case 0:
+	case NVME_CC_SHN_NONE:
 		printf("No notification; no effect\n");
 		break;
-	case 1:
+	case NVME_CC_SHN_NORMAL:
 		printf("Normal shutdown notification\n");
 		break;
-	case 2:
+	case NVME_CC_SHN_ABRUPT:
 		printf("Abrupt shutdown notification\n");
 		break;
 	default:
@@ -1175,32 +1166,31 @@ static void stdout_registers_cc(__u32 cc)
 		NVME_CC_CRIME(cc) ? "Enabled" : "Disabled");
 
 	printf("\tI/O Completion Queue Entry Size (IOCQES): %u bytes\n",
-		1 << ((cc & 0x00f00000) >> NVME_CC_IOCQES_SHIFT));
+	       POWER_OF_TWO(NVME_CC_IOCQES(cc)));
 	printf("\tI/O Submission Queue Entry Size (IOSQES): %u bytes\n",
-		1 << ((cc & 0x000f0000) >> NVME_CC_IOSQES_SHIFT));
-	stdout_registers_cc_shn((cc & 0x0000c000) >> NVME_CC_SHN_SHIFT);
-	stdout_registers_cc_ams((cc & 0x00003800) >> NVME_CC_AMS_SHIFT);
+	       POWER_OF_TWO(NVME_CC_IOSQES(cc)));
+	stdout_registers_cc_shn(NVME_CC_SHN(cc));
+	stdout_registers_cc_ams(NVME_CC_AMS(cc));
 	printf("\tMemory Page Size                   (MPS): %u bytes\n",
-		1 << (12 + ((cc & 0x00000780) >> NVME_CC_MPS_SHIFT)));
+	       POWER_OF_TWO(12 + NVME_CC_MPS(cc)));
 	printf("\tI/O Command Set Selected           (CSS): %s\n",
-		(cc & 0x00000070) == 0x00 ? "NVM Command Set" :
-		(cc & 0x00000070) == 0x60 ? "All supported I/O Command Sets" :
-		(cc & 0x00000070) == 0x70 ? "Admin Command Set only" : "Reserved");
-	printf("\tEnable                              (EN): %s\n\n",
-		(cc & 0x00000001) ? "Yes" : "No");
+	       NVME_CC_CSS(cc) == NVME_CC_CSS_NVM ? "NVM Command Set" :
+	       NVME_CC_CSS(cc) == NVME_CC_CSS_CSI ? "All supported I/O Command Sets" :
+	       NVME_CC_CSS(cc) == NVME_CC_CSS_ADMIN ? "Admin Command Set only" : "Reserved");
+	printf("\tEnable                              (EN): %s\n\n", NVME_CC_EN(cc) ? "Yes" : "No");
 }
 
 static void stdout_registers_csts_shst(__u8 shst)
 {
 	printf("\tShutdown Status               (SHST): ");
 	switch (shst) {
-	case 0:
+	case NVME_CSTS_SHST_NORMAL:
 		printf("Normal operation (no shutdown has been requested)\n");
 		break;
-	case 1:
+	case NVME_CSTS_SHST_OCCUR:
 		printf("Shutdown processing occurring\n");
 		break;
-	case 2:
+	case NVME_CSTS_SHST_CMPLT:
 		printf("Shutdown processing complete\n");
 		break;
 	default:
@@ -1211,16 +1201,21 @@ static void stdout_registers_csts_shst(__u8 shst)
 
 static void stdout_registers_csts(__u32 csts)
 {
-	printf("\tProcessing Paused               (PP): %s\n",
-		(csts & 0x00000020) ? "Yes" : "No");
+	printf("\tShutdown Type                   (ST): %s\n",
+	       NVME_CSTS_ST(csts) ? "Subsystem" : "Controller");
+	printf("\tProcessing Paused               (PP): %s\n", NVME_CSTS_PP(csts) ? "Yes" : "No");
 	printf("\tNVM Subsystem Reset Occurred (NSSRO): %s\n",
-		(csts & 0x00000010) ? "Yes" : "No");
-	stdout_registers_csts_shst((csts & 0x0000000c) >> 2);
+	       NVME_CSTS_NSSRO(csts) ? "Yes" : "No");
+	stdout_registers_csts_shst(NVME_CSTS_SHST(csts));
 	printf("\tController Fatal Status        (CFS): %s\n",
-		(csts & 0x00000002) ? "True" : "False");
+	       NVME_CSTS_CFS(csts) ? "True" : "False");
 	printf("\tReady                          (RDY): %s\n\n",
-		(csts & 0x00000001) ? "Yes" : "No");
+	       NVME_CSTS_RDY(csts) ? "Yes" : "No");
+}
 
+static void stdout_registers_nssd(__u32 nssd)
+{
+	printf("\tNVM Subsystem Shutdown Control (NSSC): %#x\n\n", nssd);
 }
 
 static void stdout_registers_crto(__u32 crto)
@@ -1231,65 +1226,74 @@ static void stdout_registers_crto(__u32 crto)
 
 static void stdout_registers_aqa(__u32 aqa)
 {
-	printf("\tAdmin Completion Queue Size (ACQS): %u\n",
-		((aqa & 0x0fff0000) >> 16) + 1);
-	printf("\tAdmin Submission Queue Size (ASQS): %u\n\n",
-		(aqa & 0x00000fff) + 1);
+	printf("\tAdmin Completion Queue Size (ACQS): %u\n", NVME_AQA_ACQS(aqa) + 1);
+	printf("\tAdmin Submission Queue Size (ASQS): %u\n\n", NVME_AQA_ASQS(aqa) + 1);
+}
 
+static void stdout_registers_asq(uint64_t asq)
+{
+	printf("\tAdmin Submission Queue Base (ASQB): %"PRIx64"\n", (uint64_t)NVME_ASQ_ASQB(asq));
 }
 
-static void stdout_registers_cmbloc(__u32 cmbloc, __u32 cmbsz)
+static void stdout_registers_acq(uint64_t acq)
 {
-	static const char *enforced[] = { "Enforced", "Not Enforced" };
+	printf("\tAdmin Completion Queue Base (ACQB): %"PRIx64"\n", (uint64_t)NVME_ACQ_ACQB(acq));
+}
 
-	if (cmbsz == 0) {
+static void stdout_registers_cmbloc(__u32 cmbloc, bool support)
+{
+	static const char * const enforced[] = { "Enforced", "Not Enforced" };
+
+	if (!support) {
 		printf("\tController Memory Buffer feature is not supported\n\n");
 		return;
 	}
-	printf("\tOffset                                                        (OFST): 0x%x (See cmbsz.szu for granularity)\n",
-	       (cmbloc & 0xfffff000) >> 12);
+
+	printf("\tOffset                                                        (OFST): ");
+	printf("%#x (See cmbsz.szu for granularity)\n", NVME_CMBLOC_OFST(cmbloc));
 
 	printf("\tCMB Queue Dword Alignment                                     (CQDA): %d\n",
-	       (cmbloc & 0x00000100) >> 8);
+	       NVME_CMBLOC_CQDA(cmbloc));
 
 	printf("\tCMB Data Metadata Mixed Memory Support                      (CDMMMS): %s\n",
-	       enforced[(cmbloc & 0x00000080) >> 7]);
+	       enforced[NVME_CMBLOC_CDMMMS(cmbloc)]);
 
 	printf("\tCMB Data Pointer and Command Independent Locations Support (CDPCILS): %s\n",
-	       enforced[(cmbloc & 0x00000040) >> 6]);
+	       enforced[NVME_CMBLOC_CDPCILS(cmbloc)]);
 
 	printf("\tCMB Data Pointer Mixed Locations Support                    (CDPMLS): %s\n",
-	       enforced[(cmbloc & 0x00000020) >> 5]);
+	       enforced[NVME_CMBLOC_CDPLMS(cmbloc)]);
 
 	printf("\tCMB Queue Physically Discontiguous Support                   (CQPDS): %s\n",
-	       enforced[(cmbloc & 0x00000010) >> 4]);
+	       enforced[NVME_CMBLOC_CQPDS(cmbloc)]);
 
 	printf("\tCMB Queue Mixed Memory Support                               (CQMMS): %s\n",
-	       enforced[(cmbloc & 0x00000008) >> 3]);
+	       enforced[NVME_CMBLOC_CQMMS(cmbloc)]);
 
-	printf("\tBase Indicator Register                                        (BIR): 0x%x\n\n",
-	       (cmbloc & 0x00000007));
+	printf("\tBase Indicator Register                                        (BIR): %#x\n\n",
+	       NVME_CMBLOC_BIR(cmbloc));
 }
 
 static void stdout_registers_cmbsz(__u32 cmbsz)
 {
-	if (cmbsz == 0) {
+	if (!cmbsz) {
 		printf("\tController Memory Buffer feature is not supported\n\n");
 		return;
 	}
-	printf("\tSize                      (SZ): %u\n", (cmbsz & 0xfffff000) >> 12);
+
+	printf("\tSize                      (SZ): %u\n", NVME_CMBSZ_SZ(cmbsz));
 	printf("\tSize Units               (SZU): %s\n",
-	       nvme_register_szu_to_string((cmbsz & 0x00000f00) >> 8));
+	       nvme_register_szu_to_string(NVME_CMBSZ_SZU(cmbsz)));
 	printf("\tWrite Data Support       (WDS): Write Data and metadata transfer in Controller Memory Buffer is %s\n",
-	       (cmbsz & 0x00000010) ? "Supported" : "Not supported");
+	       NVME_CMBSZ_WDS(cmbsz) ? "Supported" : "Not supported");
 	printf("\tRead Data Support        (RDS): Read Data and metadata transfer in Controller Memory Buffer is %s\n",
-	       (cmbsz & 0x00000008) ? "Supported" : "Not supported");
+	       NVME_CMBSZ_RDS(cmbsz) ? "Supported" : "Not supported");
 	printf("\tPRP SGL List Support   (LISTS): PRP/SG Lists in Controller Memory Buffer is %s\n",
-	       (cmbsz & 0x00000004) ? "Supported" : "Not supported");
+	       NVME_CMBSZ_LISTS(cmbsz) ? "Supported" : "Not supported");
 	printf("\tCompletion Queue Support (CQS): Admin and I/O Completion Queues in Controller Memory Buffer is %s\n",
-	       (cmbsz & 0x00000002) ? "Supported" : "Not supported");
+	       NVME_CMBSZ_CQS(cmbsz) ? "Supported" : "Not supported");
 	printf("\tSubmission Queue Support (SQS): Admin and I/O Submission Queues in Controller Memory Buffer is %s\n\n",
-	       (cmbsz & 0x00000001) ? "Supported" : "Not supported");
+	       NVME_CMBSZ_SQS(cmbsz) ? "Supported" : "Not supported");
 }
 
 static void stdout_registers_bpinfo_brs(__u8 brs)
@@ -1316,109 +1320,117 @@ static void stdout_registers_bpinfo_brs(__u8 brs)
 
 static void stdout_registers_bpinfo(__u32 bpinfo)
 {
-	printf("\tActive Boot Partition ID      (ABPID): %u\n",
-		(bpinfo & 0x80000000) >> 31);
-	stdout_registers_bpinfo_brs((bpinfo & 0x03000000) >> 24);
-	printf("\tBoot Partition Size            (BPSZ): %u\n",
-		bpinfo & 0x00007fff);
+	printf("\tActive Boot Partition ID      (ABPID): %u\n", NVME_BPINFO_ABPID(bpinfo));
+	stdout_registers_bpinfo_brs(NVME_BPINFO_BRS(bpinfo));
+	printf("\tBoot Partition Size            (BPSZ): %u\n", NVME_BPINFO_BPSZ(bpinfo));
 }
 
 static void stdout_registers_bprsel(__u32 bprsel)
 {
-	printf("\tBoot Partition Identifier      (BPID): %u\n",
-		(bprsel & 0x80000000) >> 31);
-	printf("\tBoot Partition Read Offset    (BPROF): %x\n",
-		(bprsel & 0x3ffffc00) >> 10);
-	printf("\tBoot Partition Read Size      (BPRSZ): %x\n",
-		bprsel & 0x000003ff);
+	printf("\tBoot Partition Identifier      (BPID): %u\n", NVME_BPRSEL_BPID(bprsel));
+	printf("\tBoot Partition Read Offset    (BPROF): %x\n", NVME_BPRSEL_BPROF(bprsel));
+	printf("\tBoot Partition Read Size      (BPRSZ): %x\n", NVME_BPRSEL_BPRSZ(bprsel));
 }
 
 static void stdout_registers_bpmbl(uint64_t bpmbl)
 {
 	printf("\tBoot Partition Memory Buffer Base Address (BMBBA): %"PRIx64"\n",
-		bpmbl);
+	       (uint64_t)NVME_BPMBL_BMBBA(bpmbl));
 }
 
 static void stdout_registers_cmbmsc(uint64_t cmbmsc)
 {
 	printf("\tController Base Address         (CBA): %" PRIx64 "\n",
-			(cmbmsc & 0xfffffffffffff000) >> 12);
-	printf("\tController Memory Space Enable (CMSE): %" PRIx64 "\n",
-			(cmbmsc & 0x0000000000000002) >> 1);
-	printf("\tCapabilities Registers Enabled  (CRE): CMBLOC and "\
-	       "CMBSZ registers are%senabled\n\n",
-		(cmbmsc & 0x0000000000000001) ? " " : " NOT ");
+	       (uint64_t)NVME_CMBMSC_CBA(cmbmsc));
+	printf("\tController Memory Space Enable (CMSE): %" PRIx64 "\n", NVME_CMBMSC_CMSE(cmbmsc));
+	printf("\tCapabilities Registers Enabled  (CRE): ");
+	printf("CMBLOC and CMBSZ registers are %senabled\n\n",
+	       NVME_CMBMSC_CRE(cmbmsc) ? "" : "NOT ");
 }
 
 static void stdout_registers_cmbsts(__u32 cmbsts)
 {
-	printf("\tController Base Address Invalid (CBAI): %x\n\n",
-		(cmbsts & 0x00000001));
+	printf("\tController Base Address Invalid (CBAI): %x\n\n", NVME_CMBSTS_CBAI(cmbsts));
+}
+
+static void stdout_registers_cmbebs(__u32 cmbebs)
+{
+	printf("\tCMB Elasticity Buffer Size Base  (CMBWBZ): %#x\n", NVME_CMBEBS_CMBWBZ(cmbebs));
+	printf("\tRead Bypass Behavior                     : ");
+	printf("memory reads not conflicting with memory writes in the CMB Elasticity Buffer ");
+	printf("%s bypass those memory writes\n", NVME_CMBEBS_RBB(cmbebs) ? "SHALL" : "MAY");
+	printf("\tCMB Elasticity Buffer Size Units (CMBSZU): %s\n\n",
+	       nvme_register_unit_to_string(NVME_CMBEBS_CMBSZU(cmbebs)));
+}
+
+static void stdout_registers_cmbswtp(__u32 cmbswtp)
+{
+	printf("\tCMB Sustained Write Throughput       (CMBSWTV): %#x\n",
+	       NVME_CMBSWTP_CMBSWTV(cmbswtp));
+	printf("\tCMB Sustained Write Throughput Units (CMBSWTU): %s/second\n\n",
+	       nvme_register_unit_to_string(NVME_CMBSWTP_CMBSWTU(cmbswtp)));
 }
 
 static void stdout_registers_pmrcap(__u32 pmrcap)
 {
-	printf("\tController Memory Space Supported                   (CMSS): "\
-	       "Referencing PMR with host supplied addresses is %s\n",
-	       ((pmrcap & 0x01000000) >> 24) ? "Supported" : "Not Supported");
+	printf("\tController Memory Space Supported                   (CMSS): ");
+	printf("Referencing PMR with host supplied addresses is %sSupported\n",
+	       NVME_PMRCAP_CMSS(pmrcap) ? "" : "Not ");
 	printf("\tPersistent Memory Region Timeout                   (PMRTO): %x\n",
-		(pmrcap & 0x00ff0000) >> 16);
+	       NVME_PMRCAP_PMRTO(pmrcap));
 	printf("\tPersistent Memory Region Write Barrier Mechanisms (PMRWBM): %x\n",
-		(pmrcap & 0x00003c00) >> 10);
-	printf("\tPersistent Memory Region Time Units                (PMRTU): PMR time unit is %s\n",
-		(pmrcap & 0x00000300) >> 8 ? "minutes" : "500 milliseconds");
+	       NVME_PMRCAP_PMRWMB(pmrcap));
+	printf("\tPersistent Memory Region Time Units                (PMRTU): ");
+	printf("PMR time unit is %s\n", NVME_PMRCAP_PMRTU(pmrcap) ? "minutes" : "500 milliseconds");
 	printf("\tBase Indicator Register                              (BIR): %x\n",
-		(pmrcap & 0x000000e0) >> 5);
-	printf("\tWrite Data Support                                   (WDS): Write data to the PMR is %s\n",
-		(pmrcap & 0x00000010) ? "supported" : "not supported");
-	printf("\tRead Data Support                                    (RDS): Read data from the PMR is %s\n",
-		(pmrcap & 0x00000008) ? "supported" : "not supported");
+	       NVME_PMRCAP_BIR(pmrcap));
+	printf("\tWrite Data Support                                   (WDS): ");
+	printf("Write data to the PMR is %ssupported\n", NVME_PMRCAP_WDS(pmrcap) ? "" : "not ");
+	printf("\tRead Data Support                                    (RDS): ");
+	printf("Read data from the PMR is %ssupported\n", NVME_PMRCAP_RDS(pmrcap) ? "" : "not ");
 }
 
 static void stdout_registers_pmrctl(__u32 pmrctl)
 {
-	printf("\tEnable (EN): PMR is %s\n", (pmrctl & 0x00000001) ?
-		"READY" : "Disabled");
+	printf("\tEnable (EN): PMR is %s\n", NVME_PMRCTL_EN(pmrctl) ? "READY" : "Disabled");
 }
 
-static void stdout_registers_pmrsts(__u32 pmrsts, __u32 pmrctl)
+static void stdout_registers_pmrsts(__u32 pmrsts, bool ready)
 {
-	printf("\tController Base Address Invalid (CBAI): %x\n",
-		(pmrsts & 0x00001000) >> 12);
+	printf("\tController Base Address Invalid (CBAI): %x\n", NVME_PMRSTS_CBAI(pmrsts));
 	printf("\tHealth Status                   (HSTS): %s\n",
-		nvme_register_pmr_hsts_to_string((pmrsts & 0x00000e00) >> 9));
-	printf("\tNot Ready                       (NRDY): "\
-		"The Persistent Memory Region is %s to process "\
-		"PCI Express memory read and write requests\n",
-			(pmrsts & 0x00000100) == 0 && (pmrctl & 0x00000001) ?
-				"READY" : "Not Ready");
-	printf("\tError                            (ERR): %x\n", (pmrsts & 0x000000ff));
+	       nvme_register_pmr_hsts_to_string(NVME_PMRSTS_HSTS(pmrsts)));
+	printf("\tNot Ready                       (NRDY): ");
+	printf("The Persistent Memory Region is %s to process ",
+	       !NVME_PMRSTS_NRDY(pmrsts) && ready ? "READY" : "Not Ready");
+	printf("PCI Express memory read and write requests\n");
+	printf("\tError                            (ERR): %x\n", NVME_PMRSTS_ERR(pmrsts));
 }
 
 static void stdout_registers_pmrebs(__u32 pmrebs)
 {
-	printf("\tPMR Elasticity Buffer Size Base  (PMRWBZ): %x\n", (pmrebs & 0xffffff00) >> 8);
-	printf("\tRead Bypass Behavior                     : memory reads not conflicting with memory writes "\
-	       "in the PMR Elasticity Buffer %s bypass those memory writes\n",
-	       (pmrebs & 0x00000010) ? "SHALL" : "MAY");
+	printf("\tPMR Elasticity Buffer Size Base  (PMRWBZ): %x\n", NVME_PMREBS_PMRWBZ(pmrebs));
+	printf("\tRead Bypass Behavior                     : ");
+	printf("memory reads not conflicting with memory writes ");
+	printf("in the PMR Elasticity Buffer %s bypass those memory writes\n",
+	       NVME_PMREBS_RBB(pmrebs) ? "SHALL" : "MAY");
 	printf("\tPMR Elasticity Buffer Size Units (PMRSZU): %s\n",
-		nvme_register_pmr_pmrszu_to_string(pmrebs & 0x0000000f));
+	       nvme_register_unit_to_string(NVME_PMREBS_PMRSZU(pmrebs)));
 }
 
 static void stdout_registers_pmrswtp(__u32 pmrswtp)
 {
 	printf("\tPMR Sustained Write Throughput       (PMRSWTV): %x\n",
-		(pmrswtp & 0xffffff00) >> 8);
+	       NVME_PMRSWTP_PMRSWTV(pmrswtp));
 	printf("\tPMR Sustained Write Throughput Units (PMRSWTU): %s/second\n",
-		nvme_register_pmr_pmrszu_to_string(pmrswtp & 0x0000000f));
+	       nvme_register_unit_to_string(NVME_PMRSWTP_PMRSWTU(pmrswtp)));
 }
 
 static void stdout_registers_pmrmscl(uint32_t pmrmscl)
 {
 	printf("\tController Base Address         (CBA): %#x\n",
-		(pmrmscl & 0xfffff000) >> 12);
-	printf("\tController Memory Space Enable (CMSE): %#x\n\n",
-		(pmrmscl & 0x00000002) >> 1);
+	       (uint32_t)NVME_PMRMSC_CBA(pmrmscl));
+	printf("\tController Memory Space Enable (CMSE): %#x\n\n", NVME_PMRMSC_CMSE(pmrmscl));
 }
 
 static void stdout_registers_pmrmscu(uint32_t pmrmscu)
@@ -1427,209 +1439,168 @@ static void stdout_registers_pmrmscu(uint32_t pmrmscu)
 		pmrmscu);
 }
 
-void stdout_ctrl_registers(void *bar, bool fabrics)
+static void stdout_ctrl_register_human(int offset, uint64_t value, bool support)
 {
-	uint64_t cap, asq, acq, bpmbl, cmbmsc;
-	uint32_t vs, intms, intmc, cc, csts, nssr, crto, aqa, cmbsz, cmbloc, bpinfo,
-		 bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp,
-		 pmrmscl, pmrmscu;
-	int human = stdout_print_ops.flags & VERBOSE;
+	switch (offset) {
+	case NVME_REG_CAP:
+		stdout_registers_cap((struct nvme_bar_cap *)&value);
+		break;
+	case NVME_REG_VS:
+		stdout_registers_version(value);
+		break;
+	case NVME_REG_INTMS:
+		printf("\tInterrupt Vector Mask Set (IVMS): %#"PRIx64"\n\n", value);
+		break;
+	case NVME_REG_INTMC:
+		printf("\tInterrupt Vector Mask Clear (IVMC): %#"PRIx64"\n\n", value);
+		break;
+	case NVME_REG_CC:
+		stdout_registers_cc(value);
+		break;
+	case NVME_REG_CSTS:
+		stdout_registers_csts(value);
+		break;
+	case NVME_REG_NSSR:
+		printf("\tNVM Subsystem Reset Control (NSSRC): %"PRIu64"\n\n", value);
+		break;
+	case NVME_REG_AQA:
+		stdout_registers_aqa(value);
+		break;
+	case NVME_REG_ASQ:
+		stdout_registers_asq(value);
+		break;
+	case NVME_REG_ACQ:
+		stdout_registers_acq(value);
+		break;
+	case NVME_REG_CMBLOC:
+		stdout_registers_cmbloc(value, support);
+		break;
+	case NVME_REG_CMBSZ:
+		stdout_registers_cmbsz(value);
+		break;
+	case NVME_REG_BPINFO:
+		stdout_registers_bpinfo(value);
+		break;
+	case NVME_REG_BPRSEL:
+		stdout_registers_bprsel(value);
+		break;
+	case NVME_REG_BPMBL:
+		stdout_registers_bpmbl(value);
+		break;
+	case NVME_REG_CMBMSC:
+		stdout_registers_cmbmsc(value);
+		break;
+	case NVME_REG_CMBSTS:
+		stdout_registers_cmbsts(value);
+		break;
+	case NVME_REG_CMBEBS:
+		stdout_registers_cmbebs(value);
+		break;
+	case NVME_REG_CMBSWTP:
+		stdout_registers_cmbswtp(value);
+		break;
+	case NVME_REG_NSSD:
+		stdout_registers_nssd(value);
+		break;
+	case NVME_REG_CRTO:
+		stdout_registers_crto(value);
+		break;
+	case NVME_REG_PMRCAP:
+		stdout_registers_pmrcap(value);
+		break;
+	case NVME_REG_PMRCTL:
+		stdout_registers_pmrctl(value);
+		break;
+	case NVME_REG_PMRSTS:
+		stdout_registers_pmrsts(value, support);
+		break;
+	case NVME_REG_PMREBS:
+		stdout_registers_pmrebs(value);
+		break;
+	case NVME_REG_PMRSWTP:
+		stdout_registers_pmrswtp(value);
+		break;
+	case NVME_REG_PMRMSCL:
+		stdout_registers_pmrmscl(value);
+		break;
+	case NVME_REG_PMRMSCU:
+		stdout_registers_pmrmscu(value);
+		break;
+	default:
+		printf("unknown register: %#04x (%s), value: %#"PRIx64"\n",
+		       offset, nvme_register_to_string(offset), value);
+		break;
+	}
+}
 
-	cap = mmio_read64(bar + NVME_REG_CAP);
-	vs = mmio_read32(bar + NVME_REG_VS);
-	intms = mmio_read32(bar + NVME_REG_INTMS);
-	intmc = mmio_read32(bar + NVME_REG_INTMC);
-	cc = mmio_read32(bar + NVME_REG_CC);
-	csts = mmio_read32(bar + NVME_REG_CSTS);
-	nssr = mmio_read32(bar + NVME_REG_NSSR);
-	crto = mmio_read32(bar + NVME_REG_CRTO);
-	aqa = mmio_read32(bar + NVME_REG_AQA);
-	asq = mmio_read64(bar + NVME_REG_ASQ);
-	acq = mmio_read64(bar + NVME_REG_ACQ);
-	cmbloc = mmio_read32(bar + NVME_REG_CMBLOC);
-	cmbsz = mmio_read32(bar + NVME_REG_CMBSZ);
-	bpinfo = mmio_read32(bar + NVME_REG_BPINFO);
-	bprsel = mmio_read32(bar + NVME_REG_BPRSEL);
-	bpmbl = mmio_read64(bar + NVME_REG_BPMBL);
-	cmbmsc = mmio_read64(bar + NVME_REG_CMBMSC);
-	cmbsts = mmio_read32(bar + NVME_REG_CMBSTS);
-	pmrcap = mmio_read32(bar + NVME_REG_PMRCAP);
-	pmrctl = mmio_read32(bar + NVME_REG_PMRCTL);
-	pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);
-	pmrebs = mmio_read32(bar + NVME_REG_PMREBS);
-	pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);
-	pmrmscl = mmio_read32(bar + NVME_REG_PMRMSCL);
-	pmrmscu = mmio_read32(bar + NVME_REG_PMRMSCU);
+static void stdout_ctrl_register_common(int offset, uint64_t value, bool fabrics)
+{
+	bool human = !!(stdout_print_ops.flags & VERBOSE);
+	const char *name = nvme_register_to_string(offset);
+	const char *type = fabrics ? "property" : "register";
 
 	if (human) {
-		if (cap != 0xffffffff) {
-			printf("cap     : %"PRIx64"\n", cap);
-			stdout_registers_cap((struct nvme_bar_cap *)&cap);
-		}
-		if (vs != 0xffffffff) {
-			printf("version : %x\n", vs);
-			stdout_registers_version(vs);
-		}
-		if (cc != 0xffffffff) {
-			printf("cc      : %x\n", cc);
-			stdout_registers_cc(cc);
-		}
-		if (csts != 0xffffffff) {
-			printf("csts    : %x\n", csts);
-			stdout_registers_csts(csts);
-		}
-		if (nssr != 0xffffffff) {
-			printf("nssr    : %x\n", nssr);
-			printf("\tNVM Subsystem Reset Control (NSSRC): %u\n\n",
-				nssr);
-		}
-		if (crto != 0xffffffff) {
-			printf("crto    : %x\n", crto);
-			stdout_registers_crto(crto);
-		}
-		if (!fabrics) {
-			printf("intms   : %x\n", intms);
-			printf("\tInterrupt Vector Mask Set (IVMS): %x\n\n",
-					intms);
-
-			printf("intmc   : %x\n", intmc);
-			printf("\tInterrupt Vector Mask Clear (IVMC): %x\n\n",
-					intmc);
-			printf("aqa     : %x\n", aqa);
-			stdout_registers_aqa(aqa);
-
-			printf("asq     : %"PRIx64"\n", asq);
-			printf("\tAdmin Submission Queue Base (ASQB): %"PRIx64"\n\n",
-					asq);
-
-			printf("acq     : %"PRIx64"\n", acq);
-			printf("\tAdmin Completion Queue Base (ACQB): %"PRIx64"\n\n",
-					acq);
-
-			printf("cmbloc  : %x\n", cmbloc);
-			stdout_registers_cmbloc(cmbloc, cmbsz);
-
-			printf("cmbsz   : %x\n", cmbsz);
-			stdout_registers_cmbsz(cmbsz);
-
-			printf("bpinfo  : %x\n", bpinfo);
-			stdout_registers_bpinfo(bpinfo);
-
-			printf("bprsel  : %x\n", bprsel);
-			stdout_registers_bprsel(bprsel);
-
-			printf("bpmbl   : %"PRIx64"\n", bpmbl);
-			stdout_registers_bpmbl(bpmbl);
+		printf("%s: %#"PRIx64"\n", name, value);
+		stdout_ctrl_register_human(offset, value, true);
+		return;
+	}
 
-			printf("cmbmsc	: %"PRIx64"\n", cmbmsc);
-			stdout_registers_cmbmsc(cmbmsc);
+	printf("%s: %#04x (%s), value: %#"PRIx64"\n", type, offset,
+	       name, value);
+}
 
-			printf("cmbsts	: %x\n", cmbsts);
-			stdout_registers_cmbsts(cmbsts);
+static void stdout_ctrl_register(int offset, uint64_t value)
+{
+	stdout_ctrl_register_common(offset, value, false);
+}
 
-			printf("pmrcap  : %x\n", pmrcap);
-			stdout_registers_pmrcap(pmrcap);
+static void stdout_ctrl_register_support(void *bar, bool fabrics, int offset, bool human,
+					 bool support)
+{
+	uint64_t value = nvme_is_64bit_reg(offset) ? mmio_read64(bar + offset) :
+	    mmio_read32(bar + offset);
 
-			printf("pmrctl  : %x\n", pmrctl);
-			stdout_registers_pmrctl(pmrctl);
+	if (fabrics && value == -1)
+		return;
 
-			printf("pmrsts  : %x\n", pmrsts);
-			stdout_registers_pmrsts(pmrsts, pmrctl);
+	printf("%-8s: ", nvme_register_symbol_to_string(offset));
 
-			printf("pmrebs  : %x\n", pmrebs);
-			stdout_registers_pmrebs(pmrebs);
+	printf("%#"PRIx64"\n", value);
 
-			printf("pmrswtp : %x\n", pmrswtp);
-			stdout_registers_pmrswtp(pmrswtp);
+	if (human)
+		stdout_ctrl_register_human(offset, value, support);
+}
 
-			printf("pmrmscl	: %#x\n", pmrmscl);
-			stdout_registers_pmrmscl(pmrmscl);
+void stdout_ctrl_registers(void *bar, bool fabrics)
+{
+	uint32_t value;
+	bool human = !!(stdout_print_ops.flags & VERBOSE);
+	int offset;
+	bool support;
 
-			printf("pmrmscu	: %#x\n", pmrmscu);
-			stdout_registers_pmrmscu(pmrmscu);
-		}
-	} else {
-		if (cap != 0xffffffff)
-			printf("cap     : %"PRIx64"\n", cap);
-		if (vs != 0xffffffff)
-			printf("version : %x\n", vs);
-		if (cc != 0xffffffff)
-			printf("cc      : %x\n", cc);
-		if (csts != 0xffffffff)
-			printf("csts    : %x\n", csts);
-		if (nssr != 0xffffffff)
-			printf("nssr    : %x\n", nssr);
-		if (crto != 0xffffffff)
-			printf("crto    : %x\n", crto);
-		if (!fabrics) {
-			printf("intms   : %x\n", intms);
-			printf("intmc   : %x\n", intmc);
-			printf("aqa     : %x\n", aqa);
-			printf("asq     : %"PRIx64"\n", asq);
-			printf("acq     : %"PRIx64"\n", acq);
-			printf("cmbloc  : %x\n", cmbloc);
-			printf("cmbsz   : %x\n", cmbsz);
-			printf("bpinfo  : %x\n", bpinfo);
-			printf("bprsel  : %x\n", bprsel);
-			printf("bpmbl   : %"PRIx64"\n", bpmbl);
-			printf("cmbmsc	: %"PRIx64"\n", cmbmsc);
-			printf("cmbsts	: %x\n", cmbsts);
-			printf("pmrcap  : %x\n", pmrcap);
-			printf("pmrctl  : %x\n", pmrctl);
-			printf("pmrsts  : %x\n", pmrsts);
-			printf("pmrebs  : %x\n", pmrebs);
-			printf("pmrswtp : %x\n", pmrswtp);
-			printf("pmrmscl	: %#x\n", pmrmscl);
-			printf("pmrmscu	: %#x\n", pmrmscu);
+	for (offset = NVME_REG_CAP; offset <= NVME_REG_PMRMSCU; offset += get_reg_size(offset)) {
+		if (!nvme_is_ctrl_reg(offset) || (fabrics && !nvme_is_fabrics_reg(offset)))
+			continue;
+		switch (offset) {
+		case NVME_REG_CMBLOC:
+			value = mmio_read32(bar + NVME_REG_CMBSZ);
+			support = nvme_registers_cmbloc_support(value);
+			break;
+		case NVME_REG_PMRSTS:
+			value = mmio_read32(bar + NVME_REG_PMRCTL);
+			support = nvme_registers_pmrctl_ready(value);
+			break;
+		default:
+			support = true;
+			break;
 		}
+		stdout_ctrl_register_support(bar, fabrics, offset, human, support);
 	}
 }
 
-static void stdout_single_property(int offset, uint64_t value64)
+static void stdout_single_property(int offset, uint64_t value)
 {
-	int human = stdout_print_ops.flags & VERBOSE;
-	uint32_t value32 = (uint32_t)value64;
-
-	if (!human) {
-		if (nvme_is_64bit_reg(offset))
-			printf("property: 0x%02x (%s), value: %"PRIx64"\n",
-			       offset, nvme_register_to_string(offset), value64);
-		else
-			printf("property: 0x%02x (%s), value: %x\n", offset,
-			       nvme_register_to_string(offset), value32);
-		return;
-	}
-
-	switch (offset) {
-	case NVME_REG_CAP:
-		printf("cap : %"PRIx64"\n", value64);
-		stdout_registers_cap((struct nvme_bar_cap *)&value64);
-		break;
-	case NVME_REG_VS:
-		printf("version : %x\n", value32);
-		stdout_registers_version(value32);
-		break;
-	case NVME_REG_CC:
-		printf("cc : %x\n", value32);
-		stdout_registers_cc(value32);
-		break;
-	case NVME_REG_CSTS:
-		printf("csts : %x\n", value32);
-		stdout_registers_csts(value32);
-		break;
-	case NVME_REG_NSSR:
-		printf("nssr : %x\n", value32);
-		printf("\tNVM Subsystem Reset Control (NSSRC): %u\n\n", value32);
-		break;
-	case NVME_REG_CRTO:
-		printf("crto : %x\n", value32);
-		stdout_registers_crto(value32);
-		break;
-	default:
-		printf("unknown property: 0x%02x (%s), value: %"PRIx64"\n",
-		       offset, nvme_register_to_string(offset), value64);
-		break;
-	}
+	stdout_ctrl_register_common(offset, value, true);
 }
 
 static void stdout_status(int status)
@@ -1674,18 +1645,17 @@ static void stdout_error_status(int status, const char *msg, va_list ap)
 
 static void stdout_id_ctrl_cmic(__u8 cmic)
 {
-	__u8 rsvd = (cmic & 0xF0) >> 4;
-	__u8 ana = (cmic & 0x8) >> 3;
-	__u8 sriov = (cmic & 0x4) >> 2;
-	__u8 mctl = (cmic & 0x2) >> 1;
-	__u8 mp = cmic & 0x1;
+	__u8 rsvd = NVME_CMIC_MULTI_RSVD(cmic);
+	__u8 ana = NVME_CMIC_MULTI_ANA(cmic);
+	__u8 sriov = NVME_CMIC_MULTI_SRIOV(cmic);
+	__u8 mctl = NVME_CMIC_MULTI_CTRL(cmic);
+	__u8 mp = NVME_CMIC_MULTI_PORT(cmic);
 
 	if (rsvd)
 		printf("  [7:4] : %#x\tReserved\n", rsvd);
 	printf("  [3:3] : %#x\tANA %ssupported\n", ana, ana ? "" : "not ");
 	printf("  [2:2] : %#x\t%s\n", sriov, sriov ? "SR-IOV" : "PCI");
-	printf("  [1:1] : %#x\t%s Controller\n",
-		mctl, mctl ? "Multi" : "Single");
+	printf("  [1:1] : %#x\t%s Controller\n", mctl, mctl ? "Multi" : "Single");
 	printf("  [0:0] : %#x\t%s Port\n", mp, mp ? "Multi" : "Single");
 	printf("\n");
 }
@@ -1807,7 +1777,7 @@ static void stdout_id_ctrl_cntrltype(__u8 cntrltype)
 	__u8 rsvd = (cntrltype & 0xFC) >> 2;
 	__u8 cntrl = cntrltype & 0x3;
 
-	static const char *type[] = {
+	static const char * const type[] = {
 		"Controller type not reported",
 		"I/O Controller",
 		"Discovery Controller",
@@ -1840,7 +1810,7 @@ static void stdout_id_ctrl_vwci(__u8 vwci)
 
 	printf("  [7:7] : %#x\tVPD Write Cycles Remaining field is %svalid.\n",
 		vwcrv, vwcrv ? "" : "Not ");
-	printf("  [6:0] : %#x\tVPD Write Cycles Remaining \n", vwcr);
+	printf("  [6:0] : %#x\tVPD Write Cycles Remaining\n", vwcr);
 	printf("\n");
 
 }
@@ -1972,6 +1942,7 @@ static void stdout_id_ctrl_avscc(__u8 avscc)
 {
 	__u8 rsvd = (avscc & 0xFE) >> 1;
 	__u8 fmt = avscc & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tAdmin Vendor Specific Commands uses %s Format\n",
@@ -1983,6 +1954,7 @@ static void stdout_id_ctrl_apsta(__u8 apsta)
 {
 	__u8 rsvd = (apsta & 0xFE) >> 1;
 	__u8 apst = apsta & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tAutonomous Power State Transitions %sSupported\n",
@@ -2071,7 +2043,7 @@ static void stdout_id_ctrl_sanicap(__le32 ctrl_sanicap)
 	__u32 ndi = (sanicap & 0x20000000) >> 29;
 	__u32 nodmmas = (sanicap & 0xC0000000) >> 30;
 
-	static const char *modifies_media[] = {
+	static const char * const modifies_media[] = {
 		"Additional media modification after sanitize operation completes successfully is not defined",
 		"Media is not additionally modified after sanitize operation completes successfully",
 		"Media is additionally modified after sanitize operation completes successfully",
@@ -2126,6 +2098,7 @@ static void stdout_id_ctrl_sqes(__u8 sqes)
 {
 	__u8 msqes = (sqes & 0xF0) >> 4;
 	__u8 rsqes = sqes & 0xF;
+
 	printf("  [7:4] : %#x\tMax SQ Entry Size (%d)\n", msqes, 1 << msqes);
 	printf("  [3:0] : %#x\tMin SQ Entry Size (%d)\n", rsqes, 1 << rsqes);
 	printf("\n");
@@ -2135,6 +2108,7 @@ static void stdout_id_ctrl_cqes(__u8 cqes)
 {
 	__u8 mcqes = (cqes & 0xF0) >> 4;
 	__u8 rcqes = cqes & 0xF;
+
 	printf("  [7:4] : %#x\tMax CQ Entry Size (%d)\n", mcqes, 1 << mcqes);
 	printf("  [3:0] : %#x\tMin CQ Entry Size (%d)\n", rcqes, 1 << rcqes);
 	printf("\n");
@@ -2203,6 +2177,7 @@ static void stdout_id_ctrl_fna(__u8 fna)
 	__u8 cese = (fna & 0x4) >> 2;
 	__u8 cens = (fna & 0x2) >> 1;
 	__u8 fmns = fna & 0x1;
+
 	if (rsvd)
 		printf("  [7:4] : %#x\tReserved\n", rsvd);
 	printf("  [3:3] : %#x\tFormat NVM Broadcast NSID (FFFFFFFFh) %sSupported\n",
@@ -2222,7 +2197,7 @@ static void stdout_id_ctrl_vwc(__u8 vwc)
 	__u8 flush = (vwc & 0x6) >> 1;
 	__u8 vwcp = vwc & 0x1;
 
-	static const char *flush_behavior[] = {
+	static const char * const flush_behavior[] = {
 		"Support for the NSID field set to FFFFFFFFh is not indicated",
 		"Reserved",
 		"The Flush command does not support NSID set to FFFFFFFFh",
@@ -2232,8 +2207,7 @@ static void stdout_id_ctrl_vwc(__u8 vwc)
 	if (rsvd)
 		printf("  [7:3] : %#x\tReserved\n", rsvd);
 	printf("  [2:1] : %#x\t%s\n", flush, flush_behavior[flush]);
-	printf("  [0:0] : %#x\tVolatile Write Cache %sPresent\n",
-		vwcp, vwcp ? "" : "Not ");
+	printf("  [0:0] : %#x\tVolatile Write Cache %sPresent\n", vwcp, vwcp ? "" : "Not ");
 	printf("\n");
 }
 
@@ -2241,6 +2215,7 @@ static void stdout_id_ctrl_icsvscc(__u8 icsvscc)
 {
 	__u8 rsvd = (icsvscc & 0xFE) >> 1;
 	__u8 fmt = icsvscc & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tNVM Vendor Specific Commands uses %s Format\n",
@@ -2273,12 +2248,13 @@ static void stdout_id_ctrl_ocfs(__le16 ctrl_ocfs)
 	__u16 rsvd = ocfs >> 4;
 	__u8 copy_fmt_supported;
 	int copy_fmt;
+
 	if (rsvd)
 		printf("  [15:4] : %#x\tReserved\n", rsvd);
 	for (copy_fmt = 3; copy_fmt >= 0; copy_fmt--) {
 		copy_fmt_supported = ocfs >> copy_fmt & 1;
-		printf("  [%d:%d] : %#x\tController Copy Format %xh %sSupported\n", copy_fmt, copy_fmt,
-			copy_fmt_supported, copy_fmt, copy_fmt_supported ? "" : "Not ");
+		printf("  [%d:%d] : %#x\tController Copy Format %xh %sSupported\n", copy_fmt,
+		       copy_fmt, copy_fmt_supported, copy_fmt, copy_fmt_supported ? "" : "Not ");
 	}
 	printf("\n");
 }
@@ -2342,6 +2318,7 @@ static void stdout_id_ctrl_fcatt(__u8 fcatt)
 {
 	__u8 rsvd = (fcatt & 0xFE) >> 1;
 	__u8 scm = fcatt & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\t%s Controller Model\n",
@@ -2353,6 +2330,7 @@ static void stdout_id_ctrl_ofcs(__le16 ofcs)
 {
 	__u16 rsvd = (ofcs & 0xfffe) >> 1;
 	__u8 disconn = ofcs & 0x1;
+
 	if (rsvd)
 		printf("  [15:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tDisconnect command %s Supported\n",
@@ -2369,6 +2347,7 @@ static void stdout_id_ns_nsfeat(__u8 nsfeat)
 	__u8 dulbe = (nsfeat & 0x4) >> 2;
 	__u8 na = (nsfeat & 0x2) >> 1;
 	__u8 thin = nsfeat & 0x1;
+
 	if (rsvd)
 		printf("  [7:5] : %#x\tReserved\n", rsvd);
 	printf("  [4:4] : %#x\tNPWG, NPWA, NPDG, NPDA, and NOWS are %sSupported\n",
@@ -2407,6 +2386,7 @@ static void stdout_id_ns_mc(__u8 mc)
 	__u8 rsvd = (mc & 0xFC) >> 2;
 	__u8 mdp = (mc & 0x2) >> 1;
 	__u8 extdlba = mc & 0x1;
+
 	if (rsvd)
 		printf("  [7:2] : %#x\tReserved\n", rsvd);
 	printf("  [1:1] : %#x\tMetadata Pointer %sSupported\n",
@@ -2424,6 +2404,7 @@ static void stdout_id_ns_dpc(__u8 dpc)
 	__u8 pit3 = (dpc & 0x4) >> 2;
 	__u8 pit2 = (dpc & 0x2) >> 1;
 	__u8 pit1 = dpc & 0x1;
+
 	if (rsvd)
 		printf("  [7:5] : %#x\tReserved\n", rsvd);
 	printf("  [4:4] : %#x\tProtection Information Transferred as Last Bytes of Metadata %sSupported\n",
@@ -2444,6 +2425,7 @@ static void stdout_id_ns_dps(__u8 dps)
 	__u8 rsvd = (dps & 0xF0) >> 4;
 	__u8 pif8 = (dps & 0x8) >> 3;
 	__u8 pit = dps & 0x7;
+
 	if (rsvd)
 		printf("  [7:4] : %#x\tReserved\n", rsvd);
 	printf("  [3:3] : %#x\tProtection Information is Transferred as %s Bytes of Metadata\n",
@@ -2460,6 +2442,7 @@ static void stdout_id_ns_nmic(__u8 nmic)
 {
 	__u8 rsvd = (nmic & 0xFE) >> 1;
 	__u8 mp = nmic & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tNamespace Multipath %sCapable\n",
@@ -2501,6 +2484,7 @@ static void stdout_id_ns_fpi(__u8 fpi)
 {
 	__u8 fpis = (fpi & 0x80) >> 7;
 	__u8 fpii = fpi & 0x7F;
+
 	printf("  [7:7] : %#x\tFormat Progress Indicator %sSupported\n",
 		fpis, fpis ? "" : "Not ");
 	if (fpis || (!fpis && fpii))
@@ -2513,6 +2497,7 @@ static void stdout_id_ns_nsattr(__u8 nsattr)
 {
 	__u8 rsvd = (nsattr & 0xFE) >> 1;
 	__u8 write_protected = nsattr & 0x1;
+
 	if (rsvd)
 		printf("  [7:1] : %#x\tReserved\n", rsvd);
 	printf("  [0:0] : %#x\tNamespace %sWrite Protected\n",
@@ -2526,6 +2511,7 @@ static void stdout_id_ns_dlfeat(__u8 dlfeat)
 	__u8 guard = (dlfeat & 0x10) >> 4;
 	__u8 dwz = (dlfeat & 0x8) >> 3;
 	__u8 val = dlfeat & 0x7;
+
 	if (rsvd)
 		printf("  [7:5] : %#x\tReserved\n", rsvd);
 	printf("  [4:4] : %#x\tGuard Field of Deallocated Logical Blocks is set to %s\n",
@@ -2657,6 +2643,7 @@ static void stdout_cmd_set_independent_id_ns_nsfeat(__u8 nsfeat)
 	__u8 rmedia = (nsfeat & 0x10) >> 4;
 	__u8 uidreuse = (nsfeat & 0x8) >> 3;
 	__u8 rsvd0 = (nsfeat & 0x7);
+
 	if (rsvd6)
 		printf("  [7:6] : %#x\tReserved\n", rsvd6);
 	printf("  [5:5] : %#x\tVolatile Write Cache is %sPresent\n",
@@ -2674,6 +2661,7 @@ static void stdout_cmd_set_independent_id_ns_nstat(__u8 nstat)
 {
 	__u8 rsvd1 = (nstat & 0xfe) >> 1;
 	__u8 nrdy = nstat & 0x1;
+
 	if (rsvd1)
 		printf("  [7:1] : %#x\tReserved\n", rsvd1);
 	printf("  [0:0] : %#x\tName space is %sready\n",
@@ -2714,7 +2702,7 @@ static void stdout_cmd_set_independent_id_ns(struct nvme_id_independent_id_ns *n
 static void stdout_id_ns_descs(void *data, unsigned int nsid)
 {
 	int pos, len = 0;
-	int i;
+	int i, verbose = stdout_print_ops.flags & VERBOSE;
 	__u8 uuid[NVME_UUID_LEN];
 	char uuid_str[NVME_UUID_LEN_STRING];
 	__u8 eui64[8];
@@ -2728,9 +2716,17 @@ static void stdout_id_ns_descs(void *data, unsigned int nsid)
 		if (cur->nidl == 0)
 			break;
 
+		if (verbose) {
+			printf("loc     : %d\n", pos);
+			printf("nidt    : %d\n", (int)cur->nidt);
+			printf("nidl    : %d\n", (int)cur->nidl);
+		}
+
 		switch (cur->nidt) {
 		case NVME_NIDT_EUI64:
 			memcpy(eui64, data + pos + sizeof(*cur), sizeof(eui64));
+			if (verbose)
+				printf("type    : eui64\n");
 			printf("eui64   : ");
 			for (i = 0; i < 8; i++)
 				printf("%02x", eui64[i]);
@@ -2739,6 +2735,8 @@ static void stdout_id_ns_descs(void *data, unsigned int nsid)
 			break;
 		case NVME_NIDT_NGUID:
 			memcpy(nguid, data + pos + sizeof(*cur), sizeof(nguid));
+			if (verbose)
+				printf("type    : nguid\n");
 			printf("nguid   : ");
 			for (i = 0; i < 16; i++)
 				printf("%02x", nguid[i]);
@@ -2748,11 +2746,15 @@ static void stdout_id_ns_descs(void *data, unsigned int nsid)
 		case NVME_NIDT_UUID:
 			memcpy(uuid, data + pos + sizeof(*cur), 16);
 			nvme_uuid_to_string(uuid, uuid_str);
+			if (verbose)
+				printf("type    : uuid\n");
 			printf("uuid    : %s\n", uuid_str);
 			len = sizeof(uuid);
 			break;
 		case NVME_NIDT_CSI:
 			memcpy(&csi, data + pos + sizeof(*cur), 1);
+			if (verbose)
+				printf("type    : csi\n");
 			printf("csi     : %#x\n", csi);
 			len += sizeof(csi);
 			break;
@@ -3102,6 +3104,7 @@ static void show_nvme_id_ns_zoned_zoc(__le16 ns_zoc)
 	__u8 rsvd = (zoc & 0xfffc) >> 2;
 	__u8 ze = (zoc & 0x2) >> 1;
 	__u8 vzc = zoc & 0x1;
+
 	if (rsvd)
 		printf(" [15:2] : %#x\tReserved\n", rsvd);
 	printf("  [1:1] : %#x\t  Zone Active Excursions: %s\n",
@@ -3130,6 +3133,7 @@ static void stdout_zns_id_ns_recommended_limit(__le32 ns_rl, int human,
 					       const char *target_limit)
 {
 	unsigned int recommended_limit = le32_to_cpu(ns_rl);
+
 	if (!recommended_limit && human)
 		printf("%s    : Not Reported\n", target_limit);
 	else
@@ -3173,21 +3177,19 @@ static void stdout_zns_id_ns(struct nvme_zns_id_ns *ns,
 	}
 
 	if (human) {
-		if (ns->mar == 0xffffffff) {
+		if (ns->mar == 0xffffffff)
 			printf("mar     : No Active Resource Limit\n");
-		} else {
+		else
 			printf("mar     : %u\tActive Resources\n", le32_to_cpu(ns->mar) + 1);
-		}
 	} else {
 		printf("mar     : %#x\n", le32_to_cpu(ns->mar));
 	}
 
 	if (human) {
-		if (ns->mor == 0xffffffff) {
+		if (ns->mor == 0xffffffff)
 			printf("mor     : No Open Resource Limit\n");
-		} else {
+		else
 			printf("mor     : %u\tOpen Resources\n", le32_to_cpu(ns->mor) + 1);
-		}
 	} else {
 		printf("mor     : %#x\n", le32_to_cpu(ns->mor));
 	}
@@ -3211,14 +3213,14 @@ static void stdout_zns_id_ns(struct nvme_zns_id_ns *ns,
 		printf("zrwacap : %u\n", ns->zrwacap);
 	}
 
-	for (i = 0; i <= id_ns->nlbaf; i++){
+	for (i = 0; i <= id_ns->nlbaf; i++) {
 		if (human)
-			printf("LBA Format Extension %2d : Zone Size: 0x%"PRIx64" LBAs - "
+			printf("LBA Format Extension %2d : Zone Size: %#"PRIx64" LBAs - "
 					"Zone Descriptor Extension Size: %-1d bytes%s\n",
 				i, le64_to_cpu(ns->lbafe[i].zsze), ns->lbafe[i].zdes << 6,
 				i == lbaf ? " (in use)" : "");
 		else
-			printf("lbafe %2d: zsze:0x%"PRIx64" zdes:%u%s\n", i,
+			printf("lbafe %2d: zsze:%#"PRIx64" zdes:%u%s\n", i,
 				(uint64_t)le64_to_cpu(ns->lbafe[i].zsze),
 				ns->lbafe[i].zdes, i == lbaf ? " (in use)" : "");
 	}
@@ -3264,20 +3266,21 @@ static void stdout_zns_changed(struct nvme_zns_changed_zone_log *log)
 
 static void stdout_zns_report_zone_attributes(__u8 za, __u8 zai)
 {
-	const char *const recommended_limit[4] = {"","1","2","3"};
+	const char * const recommended_limit[4] = {"", "1", "2", "3"};
+
 	printf("Attrs: Zone Descriptor Extension is %sVaild\n",
-		(za & NVME_ZNS_ZA_ZDEV)? "" : "Not ");
-	if(za & NVME_ZNS_ZA_RZR) {
+	       za & NVME_ZNS_ZA_ZDEV ? "" : "Not ");
+
+	if (za & NVME_ZNS_ZA_RZR)
 		printf("       Reset Zone Recommended with Reset Recommended Limit%s\n",
-			recommended_limit[(zai&0xd)>>2]);
-	}
-	if (za & NVME_ZNS_ZA_FZR) {
+		       recommended_limit[(zai&0xd)>>2]);
+
+	if (za & NVME_ZNS_ZA_FZR)
 		printf("       Finish Zone Recommended with Finish Recommended Limit%s\n",
-			recommended_limit[zai&0x3]);
-	}
-	if (za & NVME_ZNS_ZA_ZFC) {
+		       recommended_limit[zai&0x3]);
+
+	if (za & NVME_ZNS_ZA_ZFC)
 		printf("       Zone Finished by Controller\n");
-	}
 }
 
 static void stdout_zns_report_zones(void *report, __u32 descs,
@@ -3295,7 +3298,7 @@ static void stdout_zns_report_zones(void *report, __u32 descs,
 	for (i = 0; i < descs; i++) {
 		desc = (struct nvme_zns_desc *)
 			(report + sizeof(*r) + i * (sizeof(*desc) + ext_size));
-		if(verbose) {
+		if (verbose) {
 			printf("SLBA: %#-10"PRIx64" WP: %#-10"PRIx64" Cap: %#-10"PRIx64" State: %-12s Type: %-14s\n",
 				(uint64_t)le64_to_cpu(desc->zslba), (uint64_t)le64_to_cpu(desc->wp),
 				(uint64_t)le64_to_cpu(desc->zcap), nvme_zone_state_to_string(desc->zs >> 4),
@@ -3408,18 +3411,18 @@ static void stdout_list_secondary_ctrl(const struct nvme_secondary_ctrl_list *sc
 	for (i = 0; i < entries; i++) {
 		printf("   SCEntry[%-3d]:\n", i);
 		printf("................\n");
-		printf("     SCID      : Secondary Controller Identifier : 0x%.04x\n",
+		printf("     SCID      : Secondary Controller Identifier : %#.04x\n",
 				le16_to_cpu(sc_entry[i].scid));
-		printf("     PCID      : Primary Controller Identifier   : 0x%.04x\n",
+		printf("     PCID      : Primary Controller Identifier   : %#.04x\n",
 				le16_to_cpu(sc_entry[i].pcid));
-		printf("     SCS       : Secondary Controller State      : 0x%.04x (%s)\n",
+		printf("     SCS       : Secondary Controller State      : %#.04x (%s)\n",
 				sc_entry[i].scs,
 				state_desc[sc_entry[i].scs & 0x1]);
-		printf("     VFN       : Virtual Function Number         : 0x%.04x\n",
+		printf("     VFN       : Virtual Function Number         : %#.04x\n",
 				le16_to_cpu(sc_entry[i].vfn));
-		printf("     NVQ       : Num VQ Flex Resources Assigned  : 0x%.04x\n",
+		printf("     NVQ       : Num VQ Flex Resources Assigned  : %#.04x\n",
 				le16_to_cpu(sc_entry[i].nvq));
-		printf("     NVI       : Num VI Flex Resources Assigned  : 0x%.04x\n",
+		printf("     NVI       : Num VI Flex Resources Assigned  : %#.04x\n",
 				le16_to_cpu(sc_entry[i].nvi));
 	}
 }
@@ -3429,7 +3432,7 @@ static void stdout_id_ns_granularity_list(const struct nvme_id_ns_granularity_li
 	int i;
 
 	printf("Identify Namespace Granularity List:\n");
-	printf("   ATTR        : Namespace Granularity Attributes: 0x%x\n",
+	printf("   ATTR        : Namespace Granularity Attributes: %#x\n",
 		glist->attributes);
 	printf("   NUMD        : Number of Descriptors           : %d\n",
 		glist->num_descriptors);
@@ -3438,9 +3441,9 @@ static void stdout_id_ns_granularity_list(const struct nvme_id_ns_granularity_li
 	for (i = 0; i <= glist->num_descriptors; i++) {
 		printf("\n     Entry[%2d] :\n", i);
 		printf("................\n");
-		printf("     NSG       : Namespace Size Granularity     : 0x%"PRIx64"\n",
+		printf("     NSG       : Namespace Size Granularity     : %#"PRIx64"\n",
 			le64_to_cpu(glist->entry[i].nszegran));
-		printf("     NCG       : Namespace Capacity Granularity : 0x%"PRIx64"\n",
+		printf("     NCG       : Namespace Capacity Granularity : %#"PRIx64"\n",
 			le64_to_cpu(glist->entry[i].ncapgran));
 	}
 }
@@ -3477,7 +3480,7 @@ static void stdout_id_uuid_list(const struct nvme_id_uuid_list *uuid_list)
 		}
 		printf(" Entry[%3d]\n", i+1);
 		printf(".................\n");
-		printf("association  : 0x%x %s\n", identifier_association, association);
+		printf("association  : %#x %s\n", identifier_association, association);
 		printf("UUID         : %s", util_uuid_to_string(uuid));
 		if (memcmp(uuid_list->entry[i].uuid, invalid_uuid,
 			   sizeof(zero_uuid)) == 0)
@@ -3512,9 +3515,8 @@ static void stdout_endurance_group_list(struct nvme_id_endurance_group_list *end
 	__u16 num = le16_to_cpu(endgrp_list->num);
 
 	printf("num of endurance group ids: %u\n", num);
-	for (i = 0; i < min(num, 2047); i++) {
+	for (i = 0; i < min(num, 2047); i++)
 		printf("[%4u]:%#x\n", i, le16_to_cpu(endgrp_list->identifier[i]));
-	}
 }
 
 static void stdout_id_iocs(struct nvme_id_iocs *iocs)
@@ -3538,7 +3540,7 @@ static void stdout_error_log(struct nvme_error_log_page *err_log, int entries,
 	for (i = 0; i < entries; i++) {
 		__u16 status = le16_to_cpu(err_log[i].status_field) >> 0x1;
 
-		printf(" Entry[%2d]   \n", i);
+		printf(" Entry[%2d]\n", i);
 		printf(".................\n");
 		printf("error_count	: %"PRIu64"\n",
 			le64_to_cpu(err_log[i].error_count));
@@ -3683,7 +3685,7 @@ static void stdout_effects_log_human(FILE *stream, __u32 effect)
 		fprintf(stream, "  Reserved CSE\n");
 }
 
-static void stdout_effects_entry(FILE* stream, int admin, int index,
+static void stdout_effects_entry(FILE *stream, int admin, int index,
 				 __le32 entry, unsigned int human)
 {
 	__u32 effect;
@@ -3704,7 +3706,7 @@ static void stdout_effects_entry(FILE* stream, int admin, int index,
 
 static void stdout_effects_log_segment(int admin, int a, int b,
 				       struct nvme_cmd_effects_log *effects,
-				       char* header, int human)
+				       char *header, int human)
 {
 	FILE *stream;
 	char *stream_location;
@@ -3717,13 +3719,10 @@ static void stdout_effects_log_segment(int admin, int a, int b,
 	}
 
 	for (int i = a; i < b; i++) {
-		if (admin) {
+		if (admin)
 			stdout_effects_entry(stream, admin, i, effects->acs[i], human);
-		}
-		else {
-			stdout_effects_entry(stream, admin, i,
-						   effects->iocs[i], human);
-		}
+		else
+			stdout_effects_entry(stream, admin, i, effects->iocs[i], human);
 	}
 
 	fclose(stream);
@@ -3765,7 +3764,7 @@ static void stdout_effects_log_page(enum nvme_csi csi,
 
 static void stdout_effects_log_pages(struct list_head *list)
 {
-	nvme_effects_log_node_t *node;
+	nvme_effects_log_node_t *node = NULL;
 
 	list_for_each(list, node, node) {
 		stdout_effects_log_page(node->csi, &node->effects);
@@ -3788,14 +3787,14 @@ static void stdout_support_log_human(__u32 support, __u8 lid)
 static void stdout_supported_log(struct nvme_supported_log_pages *support_log,
 				 const char *devname)
 {
-	int lid, human = stdout_print_ops.flags& VERBOSE;
+	int lid, human = stdout_print_ops.flags & VERBOSE;
 	__u32 support = 0;
 
 	printf("Support Log Pages Details for %s:\n", devname);
 	for (lid = 0; lid < 256; lid++) {
 		support = le32_to_cpu(support_log->lid_support[lid]);
 		if (support & 0x1) {
-			printf("LID 0x%x - %s\n", lid, nvme_log_to_string(lid));
+			printf("LID %#x - %s\n", lid, nvme_log_to_string(lid));
 			if (human)
 				stdout_support_log_human(support, lid);
 		}
@@ -3951,7 +3950,7 @@ static void stdout_ana_log(struct nvme_ana_log *ana_log, const char *devname,
 
 static void stdout_self_test_result(struct nvme_st_result *res)
 {
-	static const char *const test_res[] = {
+	static const char * const test_res[] = {
 		"Operation completed without error",
 		"Operation was aborted by a Device Self-test command",
 		"Operation was aborted by a Controller Level Reset",
@@ -4151,12 +4150,12 @@ static void stdout_auto_pst(struct nvme_feat_auto_pst *apst)
 	int i;
 	__u64 value;
 
-	printf( "\tAuto PST Entries");
+	printf("\tAuto PST Entries");
 	printf("\t.................\n");
 	for (i = 0; i < ARRAY_SIZE(apst->apst_entry); i++) {
 		value = le64_to_cpu(apst->apst_entry[i]);
 
-		printf("\tEntry[%2d]   \n", i);
+		printf("\tEntry[%2d]\n", i);
 		printf("\t.................\n");
 		printf("\tIdle Time Prior to Transition (ITPT): %u ms\n",
 		       (__u32)NVME_GET(value, APST_ENTRY_ITPT));
@@ -4193,9 +4192,9 @@ static void stdout_host_mem_buffer(struct nvme_host_mem_buf_attrs *hmb)
 {
 	printf("\tHost Memory Descriptor List Entry Count (HMDLEC): %u\n",
 		le32_to_cpu(hmb->hmdlec));
-	printf("\tHost Memory Descriptor List Address     (HMDLAU): 0x%x\n",
+	printf("\tHost Memory Descriptor List Address     (HMDLAU): %#x\n",
 		le32_to_cpu(hmb->hmdlau));
-	printf("\tHost Memory Descriptor List Address     (HMDLAL): 0x%x\n",
+	printf("\tHost Memory Descriptor List Address     (HMDLAL): %#x\n",
 		le32_to_cpu(hmb->hmdlal));
 	printf("\tHost Memory Buffer Size                  (HSIZE): %u\n",
 		le32_to_cpu(hmb->hsize));
@@ -4211,21 +4210,21 @@ static void stdout_directive_show_fields(__u8 dtype, __u8 doper,
 	case NVME_DIRECTIVE_DTYPE_IDENTIFY:
 		switch (doper) {
 		case NVME_DIRECTIVE_RECEIVE_IDENTIFY_DOPER_PARAM:
-			printf("\tDirective support \n");
+			printf("\tDirective support\n");
 			printf("\t\tIdentify Directive       : %s\n",
 				(*field & 0x1) ? "supported" : "not supported");
 			printf("\t\tStream Directive         : %s\n",
 				(*field & 0x2) ? "supported" : "not supported");
 			printf("\t\tData Placement Directive : %s\n",
 				(*field & 0x4) ? "supported" : "not supported");
-			printf("\tDirective enabled \n");
+			printf("\tDirective enabled\n");
 			printf("\t\tIdentify Directive       : %s\n",
 				(*(field + 32) & 0x1) ? "enabled" : "disabled");
 			printf("\t\tStream Directive         : %s\n",
 				(*(field + 32) & 0x2) ? "enabled" : "disabled");
 			printf("\t\tData Placement Directive : %s\n",
 				(*(field + 32) & 0x4) ? "enabled" : "disabled");
-			printf("\tDirective Persistent Across Controller Level Resets \n");
+			printf("\tDirective Persistent Across Controller Level Resets\n");
 			printf("\t\tIdentify Directive       : %s\n",
 				(*(field + 64) & 0x1) ? "enabled" : "disabled");
 			printf("\t\tStream Directive         : %s\n",
@@ -4313,25 +4312,26 @@ void stdout_d(unsigned char *buf, int len, int width, int group)
 
 	for (i = 0; i < len; i++) {
 		if (!(i % width))
-			printf( "\n%04x:", offset);
+			printf("\n%04x:", offset);
 		if (i % group)
-			printf( "%02x", buf[i]);
+			printf("%02x", buf[i]);
 		else
-			printf( " %02x", buf[i]);
+			printf(" %02x", buf[i]);
 		ascii[i % width] = (buf[i] >= '!' && buf[i] <= '~') ? buf[i] : '.';
 		if (!((i + 1) % width)) {
-			printf( " \"%.*s\"", width, ascii);
+			printf(" \"%.*s\"", width, ascii);
 			offset += width;
 			memset(ascii, 0, sizeof(ascii));
 		}
 	}
 
 	if (strlen(ascii)) {
-		unsigned b = width - (i % width);
-		printf( " %*s \"%.*s\"", 2 * b + b / group + (b % group ? 1 : 0), "", width, ascii);
+		unsigned int b = width - (i % width);
+
+		printf(" %*s \"%.*s\"", 2 * b + b / group + (b % group ? 1 : 0), "", width, ascii);
 	}
 
-	printf( "\n");
+	printf("\n");
 }
 
 static void stdout_plm_config(struct nvme_plm_config *plmcfg)
@@ -4356,7 +4356,7 @@ static void stdout_host_metadata(enum nvme_features_id fid,
 		strncpy(val, (char *)desc->val, min(sizeof(val) - 1, len));
 
 		printf("\tElement[%-3d]:\n", i);
-		printf("\t\tType	    : 0x%02x (%s)\n", desc->type,
+		printf("\t\tType	    : %#02x (%s)\n", desc->type,
 		       nvme_host_metadata_type_to_string(fid, desc->type));
 		printf("\t\tRevision : %d\n", desc->rev);
 		printf("\t\tLength   : %d\n", len);
@@ -4527,9 +4527,7 @@ static void stdout_feature_show_fields(enum nvme_features_id fid,
 		printf("\tSpinup control feature Enabled: %s\n", (result & 1) ? "True" : "False");
 		break;
 	case NVME_FEAT_FID_ENH_CTRL_METADATA:
-		fallthrough;
 	case NVME_FEAT_FID_CTRL_METADATA:
-		fallthrough;
 	case NVME_FEAT_FID_NS_METADATA:
 		if (buf)
 			stdout_host_metadata(fid, (struct nvme_host_metadata *)buf);
@@ -4606,7 +4604,8 @@ static void stdout_lba_status(struct nvme_lba_status *list,
 
 	for (idx = 0; idx < list->nlsd; idx++) {
 		struct nvme_lba_status_desc *e = &list->descs[idx];
-		printf("{ DSLBA: 0x%016"PRIu64", NLB: 0x%08x, Status: 0x%02x }\n",
+
+		printf("{ DSLBA: %#016"PRIx64", NLB: %#08x, Status: %#02x }\n",
 				le64_to_cpu(e->dslba), le32_to_cpu(e->nlb),
 				e->status);
 	}
@@ -4616,11 +4615,11 @@ static void stdout_dev_full_path(nvme_ns_t n, char *path, size_t len)
 {
 	struct stat st;
 
-	snprintf(path, len, "/dev/%s", nvme_ns_get_name(n));
-	if (stat(path, &st) == 0)
+	snprintf(path, len, "%s", nvme_ns_get_name(n));
+	if (strncmp(path, "/dev/spdk/", 10) == 0 && stat(path, &st) == 0)
 		return;
 
-	snprintf(path, len, "/dev/spdk/%s", nvme_ns_get_name(n));
+	snprintf(path, len, "/dev/%s", nvme_ns_get_name(n));
 	if (stat(path, &st) == 0)
 		return;
 
@@ -4637,15 +4636,22 @@ static void stdout_generic_full_path(nvme_ns_t n, char *path, size_t len)
 	int instance;
 	struct stat st;
 
-	sscanf(nvme_ns_get_name(n), "nvme%dn%d", &instance, &head_instance);
-	snprintf(path, len, "/dev/ng%dn%d", instance, head_instance);
+	/*
+	 * There is no block devices for SPDK, point generic path to existing
+	 * chardevice.
+	 */
+	snprintf(path, len, "%s", nvme_ns_get_name(n));
+	if (strncmp(path, "/dev/spdk/", 10) == 0 && stat(path, &st) == 0)
+		return;
 
-	if (stat(path, &st) == 0)
+	if (sscanf(nvme_ns_get_name(n), "nvme%dn%d", &instance, &head_instance) != 2)
 		return;
 
-	snprintf(path, len, "/dev/spdk/ng%dn%d", instance, head_instance);
+	snprintf(path, len, "/dev/ng%dn%d", instance, head_instance);
+
 	if (stat(path, &st) == 0)
 		return;
+
 	/*
 	 * We could start trying to search for it but let's make
 	 * it simple and just don't show the path at all.
@@ -4719,8 +4725,8 @@ static void stdout_ns_details(nvme_ns_t n)
 	const char *u_suffix = suffix_si_get(&nuse);
 	const char *l_suffix = suffix_binary_get(&lba);
 
-	sprintf(usage,"%6.2f %2sB / %6.2f %2sB", nuse, u_suffix, nsze, s_suffix);
-	sprintf(format,"%3.0f %2sB + %2d B", (double)lba, l_suffix,
+	sprintf(usage, "%6.2f %2sB / %6.2f %2sB", nuse, u_suffix, nsze, s_suffix);
+	sprintf(format, "%3.0f %2sB + %2d B", (double)lba, l_suffix,
 		nvme_ns_get_meta_size(n));
 
 	nvme_dev_full_path(n, devname, sizeof(devname));
@@ -4783,8 +4789,9 @@ static bool stdout_detailed_ctrl(const char *name, void *arg)
 	c = htable_ctrl_get(&res->ht_c, name);
 	assert(c);
 
-	printf("%-8s %-20s %-40s %-8s %-6s %-14s %-6s %-12s ",
+	printf("%-8s %-6s %-20s %-40s %-8s %-6s %-14s %-6s %-12s ",
 	       nvme_ctrl_get_name(c),
+	       nvme_ctrl_get_cntlid(c),
 	       nvme_ctrl_get_serial(c),
 	       nvme_ctrl_get_model(c),
 	       nvme_ctrl_get_firmware(c),
@@ -4863,16 +4870,17 @@ static void stdout_detailed_list(nvme_root_t r)
 	strset_iterate(&res.subsystems, stdout_detailed_subsys, &res);
 	printf("\n");
 
-	printf("%-8s %-20s %-40s %-8s %-6s %-14s %-6s %-12s %-16s\n", "Device",
-		"SN", "MN", "FR", "TxPort", "Address", "Slot", "Subsystem", "Namespaces");
-	printf("%-.8s %-.20s %-.40s %-.8s %-.6s %-.14s %-.6s %-.12s %-.16s\n", dash,
-		dash, dash, dash, dash, dash, dash, dash, dash);
+	printf("%-16s %-5s %-20s %-40s %-8s %-6s %-14s %-6s %-12s %-16s\n", "Device",
+		"Cntlid", "SN", "MN", "FR", "TxPort", "Address", "Slot", "Subsystem",
+		"Namespaces");
+	printf("%-.16s %-.6s %-.20s %-.40s %-.8s %-.6s %-.14s %-.6s %-.12s %-.16s\n",
+			dash, dash, dash, dash, dash, dash, dash, dash, dash, dash);
 	strset_iterate(&res.ctrls, stdout_detailed_ctrl, &res);
 	printf("\n");
 
-	printf("%-12s %-12s %-10s %-26s %-16s %-16s\n", "Device", "Generic",
+	printf("%-17s %-17s %-10s %-26s %-16s %-16s\n", "Device", "Generic",
 		"NSID", "Usage", "Format", "Controllers");
-	printf("%-.12s %-.12s %-.10s %-.26s %-.16s %-.16s\n", dash, dash, dash,
+	printf("%-.17s %-.17s %-.10s %-.26s %-.16s %-.16s\n", dash, dash, dash,
 		dash, dash, dash);
 	strset_iterate(&res.namespaces, stdout_detailed_ns, &res);
 
@@ -5069,7 +5077,7 @@ static void stdout_discovery_log(struct nvmf_discovery_log *log, int numrec)
 				nvmf_qptype_str(e->tsas.rdma.qptype));
 			printf("rdma_cms:    %s\n",
 				nvmf_cms_str(e->tsas.rdma.cms));
-			printf("rdma_pkey: 0x%04x\n",
+			printf("rdma_pkey: %#04x\n",
 				le16_to_cpu(e->tsas.rdma.pkey));
 			break;
 		case NVMF_TRTYPE_TCP:
@@ -5092,6 +5100,7 @@ static struct print_ops stdout_print_ops = {
 	.phy_rx_eom_log			= stdout_phy_rx_eom_log,
 	.ctrl_list			= stdout_list_ctrl,
 	.ctrl_registers			= stdout_ctrl_registers,
+	.ctrl_register			= stdout_ctrl_register,
 	.directive			= stdout_directive_show,
 	.discovery_log			= stdout_discovery_log,
 	.effects_log_list		= stdout_effects_log_pages,
@@ -5132,7 +5141,7 @@ static struct print_ops stdout_print_ops = {
 	.sanitize_log_page		= stdout_sanitize_log,
 	.secondary_ctrl_list		= stdout_list_secondary_ctrl,
 	.select_result			= stdout_select_result,
-	.self_test_log 			= stdout_self_test_log,
+	.self_test_log			= stdout_self_test_log,
 	.single_property		= stdout_single_property,
 	.smart_log			= stdout_smart_log,
 	.supported_cap_config_list_log	= stdout_supported_cap_config_log,