diff options
Diffstat (limited to '')
-rw-r--r-- | nvme-print.c | 371 |
1 files changed, 285 insertions, 86 deletions
diff --git a/nvme-print.c b/nvme-print.c index 1086aad..c3993f1 100644 --- a/nvme-print.c +++ b/nvme-print.c @@ -351,15 +351,67 @@ const char *nvme_register_pmr_hsts_to_string(__u8 hsts) } } -const char *nvme_register_pmr_pmrszu_to_string(__u8 pmrszu) +const char *nvme_register_unit_to_string(__u8 unit) +{ + switch (unit) { + case NVME_UNIT_B: + return "Bytes"; + case NVME_UNIT_1K: + return "One KB"; + case NVME_UNIT_1M: + return "One MB"; + case NVME_UNIT_1G: + return "One GB"; + default: + break; + } + + return "Reserved"; +} + +bool nvme_is_fabrics_reg(int offset) { - switch (pmrszu) { - case 0: return "Bytes"; - case 1: return "One KB"; - case 2: return "One MB"; - case 3: return "One GB"; - default: return "Reserved"; + switch (offset) { + case NVME_REG_CAP: + case NVME_REG_VS: + case NVME_REG_CC: + case NVME_REG_CSTS: + case NVME_REG_NSSR: + case NVME_REG_CRTO: + return true; + default: + break; + } + + return false; +} + +bool nvme_registers_cmbloc_support(__u32 cmbsz) +{ + return !!cmbsz; +} + +bool nvme_registers_pmrctl_ready(__u32 pmrctl) +{ + return NVME_PMRCTL_EN(pmrctl); +} + +void nvme_show_ctrl_register(void *bar, bool fabrics, int offset, enum nvme_print_flags flags) +{ + uint64_t value; + + if (fabrics && !nvme_is_fabrics_reg(offset)) { + printf("register: %#04x (%s) not fabrics\n", offset, + nvme_register_to_string(offset)); + return; } + + if (nvme_is_64bit_reg(offset)) + value = mmio_read64(bar + offset); + else + value = mmio_read32(bar + offset); + + nvme_print(ctrl_register, flags, offset, value); } void nvme_show_ctrl_registers(void *bar, bool fabrics, enum nvme_print_flags flags) @@ -761,20 +813,67 @@ const char *nvme_feature_to_string(enum nvme_features_id feature) const char *nvme_register_to_string(int reg) { switch (reg) { - case NVME_REG_CAP: return "Controller Capabilities"; - case NVME_REG_VS: return "Version"; - case NVME_REG_INTMS: return "Interrupt Vector Mask Set"; - case NVME_REG_INTMC: return "Interrupt Vector Mask Clear"; - case NVME_REG_CC: return "Controller Configuration"; - case NVME_REG_CSTS: return "Controller Status"; - case NVME_REG_NSSR: return "NVM Subsystem Reset"; - case NVME_REG_AQA: return "Admin Queue Attributes"; - case NVME_REG_ASQ: return "Admin Submission Queue Base Address"; - case NVME_REG_ACQ: return "Admin Completion Queue Base Address"; - case NVME_REG_CMBLOC: return "Controller Memory Buffer Location"; - case NVME_REG_CMBSZ: return "Controller Memory Buffer Size"; - default: return "Unknown"; + case NVME_REG_CAP: + return "Controller Capabilities"; + case NVME_REG_VS: + return "Version"; + case NVME_REG_INTMS: + return "Interrupt Vector Mask Set"; + case NVME_REG_INTMC: + return "Interrupt Vector Mask Clear"; + case NVME_REG_CC: + return "Controller Configuration"; + case NVME_REG_CSTS: + return "Controller Status"; + case NVME_REG_NSSR: + return "NVM Subsystem Reset"; + case NVME_REG_AQA: + return "Admin Queue Attributes"; + case NVME_REG_ASQ: + return "Admin Submission Queue Base Address"; + case NVME_REG_ACQ: + return "Admin Completion Queue Base Address"; + case NVME_REG_CMBLOC: + return "Controller Memory Buffer Location"; + case NVME_REG_CMBSZ: + return "Controller Memory Buffer Size"; + case NVME_REG_BPINFO: + return "Boot Partition Information"; + case NVME_REG_BPRSEL: + return "Boot Partition Read Select"; + case NVME_REG_BPMBL: + return "Boot Partition Memory Buffer Location"; + case NVME_REG_CMBMSC: + return "Controller Memory Buffer Memory Space Control"; + case NVME_REG_CMBSTS: + return "Controller Memory Buffer Status"; + case NVME_REG_CMBEBS: + return "Controller Memory Buffer Elasticity Buffer Size"; + case NVME_REG_CMBSWTP: + return "Controller Memory Buffer Sustained Write Throughput"; + case NVME_REG_NSSD: + return "NVM Subsystem Shutdown"; + case NVME_REG_CRTO: + return "Controller Ready Timeouts"; + case NVME_REG_PMRCAP: + return "Persistent Memory Region Capabilities"; + case NVME_REG_PMRCTL: + return "Persistent Memory Region Control"; + case NVME_REG_PMRSTS: + return "Persistent Memory Region Status"; + case NVME_REG_PMREBS: + return "Persistent Memory Region Elasticity Buffer Size"; + case NVME_REG_PMRSWTP: + return "Persistent Memory Region Sustained Write Throughput"; + case NVME_REG_PMRMSCL: + return "Persistent Memory Region Memory Space Control Lower"; + case NVME_REG_PMRMSCU: + return "Persistent Memory Region Memory Space Control Upper"; + default: + break; } + + return "Unknown"; } const char *nvme_select_to_string(int sel) @@ -890,64 +989,161 @@ void nvme_show_lba_status_info(__u32 result) nvme_print(lba_status_info, NORMAL, result); } -const char *nvme_host_metadata_type_to_string(enum nvme_features_id fid, - __u8 type) -{ - switch (fid) { - case NVME_FEAT_FID_ENH_CTRL_METADATA: - case NVME_FEAT_FID_CTRL_METADATA: - switch (type) { - case NVME_CTRL_METADATA_OS_CTRL_NAME: - return "Operating System Controller Name"; - case NVME_CTRL_METADATA_OS_DRIVER_NAME: - return "Operating System Driver Name"; - case NVME_CTRL_METADATA_OS_DRIVER_VER: - return "Operating System Driver Version"; - case NVME_CTRL_METADATA_PRE_BOOT_CTRL_NAME: - return "Pre-boot Controller Name"; - case NVME_CTRL_METADATA_PRE_BOOT_DRIVER_NAME: - return "Pre-boot Driver Name"; - case NVME_CTRL_METADATA_PRE_BOOT_DRIVER_VER: - return "Pre-boot Driver Version"; - case NVME_CTRL_METADATA_SYS_PROC_MODEL: - return "System Processor Model"; - case NVME_CTRL_METADATA_CHIPSET_DRV_NAME: - return "Chipset Driver Name"; - case NVME_CTRL_METADATA_CHIPSET_DRV_VERSION: - return "Chipset Driver Version"; - case NVME_CTRL_METADATA_OS_NAME_AND_BUILD: - return "Operating System Name and Build"; - case NVME_CTRL_METADATA_SYS_PROD_NAME: - return "System Product Name"; - case NVME_CTRL_METADATA_FIRMWARE_VERSION: - return "Firmware Version"; - case NVME_CTRL_METADATA_OS_DRIVER_FILENAME: - return "Operating System Driver Filename"; - case NVME_CTRL_METADATA_DISPLAY_DRV_NAME: - return "Display Driver Name"; - case NVME_CTRL_METADATA_DISPLAY_DRV_VERSION: - return "Display Driver Version"; - case NVME_CTRL_METADATA_HOST_DET_FAIL_REC: - return "Host-Determined Failure Record"; - default: - return "Unknown Controller Type"; - } - case NVME_FEAT_FID_NS_METADATA: - switch (type) { - case NVME_NS_METADATA_OS_NS_NAME: - return "Operating System Namespace Name"; - case NVME_NS_METADATA_PRE_BOOT_NS_NAME: - return "Pre-boot Namespace Name"; - case NVME_NS_METADATA_OS_NS_QUAL_1: - return "Operating System Namespace Name Qualifier 1"; - case NVME_NS_METADATA_OS_NS_QUAL_2: - return "Operating System Namespace Name Qualifier 2"; - default: - return "Unknown Namespace Type"; - } - default: - return "Unknown Feature"; - } +const char *nvme_host_metadata_type_to_string(enum nvme_features_id fid, __u8 type) +{ + switch (fid) { + case NVME_FEAT_FID_ENH_CTRL_METADATA: + case NVME_FEAT_FID_CTRL_METADATA: + switch (type) { + case NVME_CTRL_METADATA_OS_CTRL_NAME: + return "Operating System Controller Name"; + case NVME_CTRL_METADATA_OS_DRIVER_NAME: + return "Operating System Driver Name"; + case NVME_CTRL_METADATA_OS_DRIVER_VER: + return "Operating System Driver Version"; + case NVME_CTRL_METADATA_PRE_BOOT_CTRL_NAME: + return "Pre-boot Controller Name"; + case NVME_CTRL_METADATA_PRE_BOOT_DRIVER_NAME: + return "Pre-boot Driver Name"; + case NVME_CTRL_METADATA_PRE_BOOT_DRIVER_VER: + return "Pre-boot Driver Version"; + case NVME_CTRL_METADATA_SYS_PROC_MODEL: + return "System Processor Model"; + case NVME_CTRL_METADATA_CHIPSET_DRV_NAME: + return "Chipset Driver Name"; + case NVME_CTRL_METADATA_CHIPSET_DRV_VERSION: + return "Chipset Driver Version"; + case NVME_CTRL_METADATA_OS_NAME_AND_BUILD: + return "Operating System Name and Build"; + case NVME_CTRL_METADATA_SYS_PROD_NAME: + return "System Product Name"; + case NVME_CTRL_METADATA_FIRMWARE_VERSION: + return "Firmware Version"; + case NVME_CTRL_METADATA_OS_DRIVER_FILENAME: + return "Operating System Driver Filename"; + case NVME_CTRL_METADATA_DISPLAY_DRV_NAME: + return "Display Driver Name"; + case NVME_CTRL_METADATA_DISPLAY_DRV_VERSION: + return "Display Driver Version"; + case NVME_CTRL_METADATA_HOST_DET_FAIL_REC: + return "Host-Determined Failure Record"; + default: + return "Unknown Controller Type"; + } + case NVME_FEAT_FID_NS_METADATA: + switch (type) { + case NVME_NS_METADATA_OS_NS_NAME: + return "Operating System Namespace Name"; + case NVME_NS_METADATA_PRE_BOOT_NS_NAME: + return "Pre-boot Namespace Name"; + case NVME_NS_METADATA_OS_NS_QUAL_1: + return "Operating System Namespace Name Qualifier 1"; + case NVME_NS_METADATA_OS_NS_QUAL_2: + return "Operating System Namespace Name Qualifier 2"; + default: + return "Unknown Namespace Type"; + } + default: + return "Unknown Feature"; + } +} + +const char *nvme_pel_rci_rcpit_to_string(enum nvme_pel_rci_rcpit rcpit) +{ + switch (rcpit) { + case NVME_PEL_RCI_RCPIT_NOT_EXIST: + return "Does not already exist"; + case NVME_PEL_RCI_RCPIT_EST_PORT: + return "NVM subsystem port"; + case NVME_PEL_RCI_RCPIT_EST_ME: + return "NVMe-MI port"; + default: + break; + } + return "Reserved"; +} + +const char *nvme_pel_ehai_pit_to_string(enum nvme_pel_ehai_pit pit) +{ + switch (pit) { + case NVME_PEL_EHAI_PIT_NOT_REPORTED: + return "PIT not reported and PELPID does not apply"; + case NVME_PEL_EHAI_PIT_NSS_PORT: + return "NVM subsystem port"; + case NVME_PEL_EHAI_PIT_NMI_PORT: + return "NVMe-MI port"; + case NVME_PEL_EHAI_PIT_NOT_ASSOCIATED: + return "Event not associated with any port and PELPID does not apply"; + default: + break; + } + return "Reserved"; +} + +const char *nvme_register_symbol_to_string(int offset) +{ + switch (offset) { + case NVME_REG_CAP: + return "cap"; + case NVME_REG_VS: + return "version"; + case NVME_REG_INTMS: + return "intms"; + case NVME_REG_INTMC: + return "intmc"; + case NVME_REG_CC: + return "cc"; + case NVME_REG_CSTS: + return "csts"; + case NVME_REG_NSSR: + return "nssr"; + case NVME_REG_AQA: + return "aqa"; + case NVME_REG_ASQ: + return "asq"; + case NVME_REG_ACQ: + return "acq"; + case NVME_REG_CMBLOC: + return "cmbloc"; + case NVME_REG_CMBSZ: + return "cmbsz"; + case NVME_REG_BPINFO: + return "bpinfo"; + case NVME_REG_BPRSEL: + return "bprsel"; + case NVME_REG_BPMBL: + return "bpmbl"; + case NVME_REG_CMBMSC: + return "cmbmsc"; + case NVME_REG_CMBSTS: + return "cmbsts"; + case NVME_REG_CMBEBS: + return "cmbebs"; + case NVME_REG_CMBSWTP: + return "cmbswtp"; + case NVME_REG_NSSD: + return "nssd"; + case NVME_REG_CRTO: + return "crto"; + case NVME_REG_PMRCAP: + return "pmrcap"; + case NVME_REG_PMRCTL: + return "pmrctl"; + case NVME_REG_PMRSTS: + return "pmrsts"; + case NVME_REG_PMREBS: + return "pmrebs"; + case NVME_REG_PMRSWTP: + return "pmrswtp"; + case NVME_REG_PMRMSCL: + return "pmrmscl"; + case NVME_REG_PMRMSCU: + return "pmrmscu"; + default: + break; + } + + return "unknown"; } void nvme_feature_show(enum nvme_features_id fid, int sel, unsigned int result) @@ -970,14 +1166,13 @@ void nvme_dev_full_path(nvme_ns_t n, char *path, size_t len) { struct stat st; - snprintf(path, len, "/dev/%s", nvme_ns_get_name(n)); - if (stat(path, &st) == 0) + snprintf(path, len, "%s", nvme_ns_get_name(n)); + if (strncmp(path, "/dev/spdk/", 10) == 0 && stat(path, &st) == 0) return; - snprintf(path, len, "/dev/spdk/%s", nvme_ns_get_name(n)); + snprintf(path, len, "/dev/%s", nvme_ns_get_name(n)); if (stat(path, &st) == 0) return; - /* * We could start trying to search for it but let's make * it simple and just don't show the path at all. @@ -991,15 +1186,19 @@ void nvme_generic_full_path(nvme_ns_t n, char *path, size_t len) int instance; struct stat st; + /* + * There is no block devices for SPDK, point generic path to existing + * chardevice. + */ + snprintf(path, len, "%s", nvme_ns_get_name(n)); + if (strncmp(path, "/dev/spdk/", 10) == 0 && stat(path, &st) == 0) + return; + sscanf(nvme_ns_get_name(n), "nvme%dn%d", &instance, &head_instance); snprintf(path, len, "/dev/ng%dn%d", instance, head_instance); if (stat(path, &st) == 0) return; - - snprintf(path, len, "/dev/spdk/ng%dn%d", instance, head_instance); - if (stat(path, &st) == 0) - return; /* * We could start trying to search for it but let's make * it simple and just don't show the path at all. |