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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-06-20 04:06:28 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-06-20 04:06:28 +0000
commit43e241fbda8e6c137142af8d08abf9f8d16c5145 (patch)
tree1e72ad25ef4dfbbd381d4ef859729ebc7c5d6c3e /ls-caps.c
parentAdding debian version 1:3.12.0-1. (diff)
downloadpciutils-43e241fbda8e6c137142af8d08abf9f8d16c5145.tar.xz
pciutils-43e241fbda8e6c137142af8d08abf9f8d16c5145.zip
Merging upstream version 1:3.13.0.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'ls-caps.c')
-rw-r--r--ls-caps.c66
1 files changed, 66 insertions, 0 deletions
diff --git a/ls-caps.c b/ls-caps.c
index 65e92e6..c2aaea5 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -10,6 +10,7 @@
#include <stdio.h>
#include <string.h>
+#include <stdlib.h>
#include "lspci.h"
@@ -1390,6 +1391,68 @@ static void cap_express_slot2(struct device *d UNUSED, int where UNUSED)
/* No capabilities that require this field in PCIe rev2.0 spec. */
}
+static void cap_express_link_rcd(struct device *d)
+{
+ u32 t, aspm, cap_speed, cap_width, sta_speed, sta_width;
+ u16 w;
+ struct pci_dev *pdev = d->dev;
+
+ if (!pdev->rcd_link_cap)
+ return;
+
+ t = pdev->rcd_link_cap;
+ aspm = (t & PCI_EXP_LNKCAP_ASPM) >> 10;
+ cap_speed = t & PCI_EXP_LNKCAP_SPEED;
+ cap_width = (t & PCI_EXP_LNKCAP_WIDTH) >> 4;
+ printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s",
+ t >> 24,
+ link_speed(cap_speed), cap_width,
+ aspm_support(aspm));
+ if (aspm)
+ {
+ printf(", Exit Latency ");
+ if (aspm & 1)
+ printf("L0s %s", latency_l0s((t & PCI_EXP_LNKCAP_L0S) >> 12));
+ if (aspm & 2)
+ printf("%sL1 %s", (aspm & 1) ? ", " : "",
+ latency_l1((t & PCI_EXP_LNKCAP_L1) >> 15));
+ }
+ printf("\n");
+ printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c\n",
+ FLAG(t, PCI_EXP_LNKCAP_CLOCKPM),
+ FLAG(t, PCI_EXP_LNKCAP_SURPRISE),
+ FLAG(t, PCI_EXP_LNKCAP_DLLA),
+ FLAG(t, PCI_EXP_LNKCAP_LBNC),
+ FLAG(t, PCI_EXP_LNKCAP_AOC));
+
+ w = pdev->rcd_link_ctrl;
+ printf("\t\tLnkCtl:\tASPM %s;", aspm_enabled(w & PCI_EXP_LNKCTL_ASPM));
+ printf(" Disabled%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n",
+ FLAG(w, PCI_EXP_LNKCTL_DISABLE),
+ FLAG(w, PCI_EXP_LNKCTL_CLOCK),
+ FLAG(w, PCI_EXP_LNKCTL_XSYNCH),
+ FLAG(w, PCI_EXP_LNKCTL_CLOCKPM),
+ FLAG(w, PCI_EXP_LNKCTL_HWAUTWD),
+ FLAG(w, PCI_EXP_LNKCTL_BWMIE),
+ FLAG(w, PCI_EXP_LNKCTL_AUTBWIE));
+
+ w = pdev->rcd_link_status;
+ sta_speed = w & PCI_EXP_LNKSTA_SPEED;
+ sta_width = (w & PCI_EXP_LNKSTA_WIDTH) >> 4;
+ printf("\t\tLnkSta:\tSpeed %s%s, Width x%d%s\n",
+ link_speed(sta_speed),
+ link_compare(PCI_EXP_TYPE_ROOT_INT_EP, sta_speed, cap_speed),
+ sta_width,
+ link_compare(PCI_EXP_TYPE_ROOT_INT_EP, sta_width, cap_width));
+ printf("\t\t\tTrErr%c Train%c SlotClk%c DLActive%c BWMgmt%c ABWMgmt%c\n",
+ FLAG(w, PCI_EXP_LNKSTA_TR_ERR),
+ FLAG(w, PCI_EXP_LNKSTA_TRAIN),
+ FLAG(w, PCI_EXP_LNKSTA_SL_CLK),
+ FLAG(w, PCI_EXP_LNKSTA_DL_ACT),
+ FLAG(w, PCI_EXP_LNKSTA_BWMGMT),
+ FLAG(w, PCI_EXP_LNKSTA_AUTBW));
+}
+
static int
cap_express(struct device *d, int where, int cap)
{
@@ -1454,6 +1517,9 @@ cap_express(struct device *d, int where, int cap)
cap_express_dev(d, where, type);
if (link)
cap_express_link(d, where, type);
+ else if (d->dev->rcd_link_cap)
+ cap_express_link_rcd(d);
+
if (slot)
cap_express_slot(d, where);
if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_ROOT_EC)