Merging upstream version 1.67.1+dfsg1.

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

1 files changed, 14 insertions, 16 deletions

diff --git a/src/test/ui/consts/const-float-bits-reject-conv.rs b/src/test/ui/consts/const-float-bits-reject-conv.rs
index 5bf54fdbb..c77e99abb 100644
--- a/src/test/ui/consts/const-float-bits-reject-conv.rs
+++ b/src/test/ui/consts/const-float-bits-reject-conv.rs
@@ -1,4 +1,5 @@
 // compile-flags: -Zmir-opt-level=0
+// error-pattern: cannot use f32::to_bits on a NaN
 #![feature(const_float_bits_conv)]
 #![feature(const_float_classify)]
 
@@ -25,22 +26,21 @@ fn f32() {
     // 0xA is 0b1010; 0x5 is 0b0101 -- so these two together clobbers all the mantissa bits
     // ...actually, let's just check that these break. :D
     const MASKED_NAN1: u32 = f32::NAN.to_bits() ^ 0x002A_AAAA;
+    //~^ inside
     const MASKED_NAN2: u32 = f32::NAN.to_bits() ^ 0x0055_5555;
+    //~^ inside
+
+    // The rest of the code is dead because the constants already fail to evaluate.
 
     const_assert!(f32::from_bits(MASKED_NAN1).is_nan());
-    //~^ ERROR evaluation of constant value failed
     const_assert!(f32::from_bits(MASKED_NAN1).is_nan());
-    //~^ ERROR evaluation of constant value failed
 
     // LLVM does not guarantee that loads and stores of NaNs preserve their exact bit pattern.
     // In practice, this seems to only cause a problem on x86, since the most widely used calling
     // convention mandates that floating point values are returned on the x87 FPU stack. See #73328.
-    if !cfg!(target_arch = "x86") {
-        const_assert!(f32::from_bits(MASKED_NAN1).to_bits(), MASKED_NAN1);
-        //~^ ERROR evaluation of constant value failed
-        const_assert!(f32::from_bits(MASKED_NAN2).to_bits(), MASKED_NAN2);
-        //~^ ERROR evaluation of constant value failed
-    }
+    // However, during CTFE we still preserve bit patterns (though that is not a guarantee).
+    const_assert!(f32::from_bits(MASKED_NAN1).to_bits(), MASKED_NAN1);
+    const_assert!(f32::from_bits(MASKED_NAN2).to_bits(), MASKED_NAN2);
 }
 
 fn f64() {
@@ -48,20 +48,18 @@ fn f64() {
     // 0xA is 0b1010; 0x5 is 0b0101 -- so these two together clobbers all the mantissa bits
     // ...actually, let's just check that these break. :D
     const MASKED_NAN1: u64 = f64::NAN.to_bits() ^ 0x000A_AAAA_AAAA_AAAA;
+    //~^ inside
     const MASKED_NAN2: u64 = f64::NAN.to_bits() ^ 0x0005_5555_5555_5555;
+    //~^ inside
+
+    // The rest of the code is dead because the constants already fail to evaluate.
 
     const_assert!(f64::from_bits(MASKED_NAN1).is_nan());
-    //~^ ERROR evaluation of constant value failed
     const_assert!(f64::from_bits(MASKED_NAN1).is_nan());
-    //~^ ERROR evaluation of constant value failed
 
     // See comment above.
-    if !cfg!(target_arch = "x86") {
-        const_assert!(f64::from_bits(MASKED_NAN1).to_bits(), MASKED_NAN1);
-        //~^ ERROR evaluation of constant value failed
-        const_assert!(f64::from_bits(MASKED_NAN2).to_bits(), MASKED_NAN2);
-        //~^ ERROR evaluation of constant value failed
-    }
+    const_assert!(f64::from_bits(MASKED_NAN1).to_bits(), MASKED_NAN1);
+    const_assert!(f64::from_bits(MASKED_NAN2).to_bits(), MASKED_NAN2);
 }
 
 fn main() {