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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:20:29 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-17 12:20:29 +0000
commit631cd5845e8de329d0e227aaa707d7ea228b8f8f (patch)
treea1b87c8f8cad01cf18f7c5f57a08f102771ed303 /tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff
parentAdding debian version 1.69.0+dfsg1-1. (diff)
downloadrustc-631cd5845e8de329d0e227aaa707d7ea228b8f8f.tar.xz
rustc-631cd5845e8de329d0e227aaa707d7ea228b8f8f.zip
Merging upstream version 1.70.0+dfsg1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff')
-rw-r--r--tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff22
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diff --git a/tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff b/tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff
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+++ b/tests/mir-opt/lower_intrinsics.transmute_uninhabited.LowerIntrinsics.diff
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+- // MIR for `transmute_uninhabited` before LowerIntrinsics
++ // MIR for `transmute_uninhabited` after LowerIntrinsics
+
+ fn transmute_uninhabited(_1: ()) -> Never {
+ debug u => _1; // in scope 0 at $DIR/lower_intrinsics.rs:+0:37: +0:38
+ let mut _0: Never; // return place in scope 0 at $DIR/lower_intrinsics.rs:+0:47: +0:52
+ let mut _2: (); // in scope 0 at $DIR/lower_intrinsics.rs:+1:47: +1:48
+ scope 1 {
+ }
+
+ bb0: {
+ StorageLive(_2); // scope 1 at $DIR/lower_intrinsics.rs:+1:47: +1:48
+ _2 = _1; // scope 1 at $DIR/lower_intrinsics.rs:+1:47: +1:48
+- _0 = transmute::<(), Never>(move _2) -> unwind unreachable; // scope 1 at $DIR/lower_intrinsics.rs:+1:14: +1:49
+- // mir::Constant
+- // + span: $DIR/lower_intrinsics.rs:48:14: 48:46
+- // + literal: Const { ty: unsafe extern "rust-intrinsic" fn(()) -> Never {transmute::<(), Never>}, val: Value(<ZST>) }
++ _0 = move _2 as Never (Transmute); // scope 1 at $DIR/lower_intrinsics.rs:+1:14: +1:49
++ unreachable; // scope 1 at $DIR/lower_intrinsics.rs:+1:14: +1:49
+ }
+ }
+