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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-06-19 09:25:56 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-06-19 09:25:56 +0000
commit018c4950b9406055dec02ef0fb52f132e2bb1e2c (patch)
treea835ebdf2088ef88fa681f8fad45f09922c1ae9a /vendor/cpufeatures
parentAdding debian version 1.75.0+dfsg1-5. (diff)
downloadrustc-018c4950b9406055dec02ef0fb52f132e2bb1e2c.tar.xz
rustc-018c4950b9406055dec02ef0fb52f132e2bb1e2c.zip
Merging upstream version 1.76.0+dfsg1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'vendor/cpufeatures')
-rw-r--r--vendor/cpufeatures/.cargo-checksum.json2
-rw-r--r--vendor/cpufeatures/CHANGELOG.md18
-rw-r--r--vendor/cpufeatures/Cargo.toml15
-rw-r--r--vendor/cpufeatures/README.md26
-rw-r--r--vendor/cpufeatures/src/aarch64.rs2
-rw-r--r--vendor/cpufeatures/src/lib.rs40
-rw-r--r--vendor/cpufeatures/src/loongarch64.rs106
-rw-r--r--vendor/cpufeatures/src/x86.rs2
-rw-r--r--vendor/cpufeatures/tests/aarch64.rs2
-rw-r--r--vendor/cpufeatures/tests/loongarch64.rs20
10 files changed, 219 insertions, 14 deletions
diff --git a/vendor/cpufeatures/.cargo-checksum.json b/vendor/cpufeatures/.cargo-checksum.json
index bcc82d15c..3ba9f97cb 100644
--- a/vendor/cpufeatures/.cargo-checksum.json
+++ b/vendor/cpufeatures/.cargo-checksum.json
@@ -1 +1 @@
-{"files":{"CHANGELOG.md":"688a7222c5a7a23c1095f3d38983c7b529230858e3f5600c1115baf1d81b9809","Cargo.toml":"e23fc3baf256869f019907444cce751c17c5b36d681d5e866cdccc7b1d0a12d9","LICENSE-APACHE":"a9040321c3712d8fd0b09cf52b17445de04a23a10165049ae187cd39e5c86be5","LICENSE-MIT":"904801faf3f1850328af8e1aa1047b9190cc22ed40df5c87f2d93d17f847ef67","README.md":"3a7469c8306dce5e6c1b4eb3f9d7290174e57e9118911e016a06192bc89ae67f","src/aarch64.rs":"03780cca3518699dd0f57345c9fda1cae7d73a3a77c7f1802f7f172204417694","src/lib.rs":"6e5c3f23006241c3135e8df7d25fb68ca8ee768d065a08db7910a4fcaa786a28","src/miri.rs":"acf1a7e7ae31a1de07941084c6b589a2d4c6ea5f87012c811592c865d04c02cb","src/x86.rs":"f4a17990a3a8c1e8286bdda35d19fa1372e0548341ca205f1e7e417fa3f3e966","tests/aarch64.rs":"bdabbe67316c128b57003ba5faa07707b5f339b1f3e984da4bc383cc93c2bedd","tests/x86.rs":"fcf476ca6ebd0845ab547cea4fe40c2ba2a2324c024264d9a86f666586f3a480"},"package":"03e69e28e9f7f77debdedbaafa2866e1de9ba56df55a8bd7cfc724c25a09987c"} \ No newline at end of file
+{"files":{"CHANGELOG.md":"716d1f451171228b69bdfd44e7da2a5cf55e6837ad49ab88ad45ff5cf51446ac","Cargo.toml":"32336c5ea5f8efbfaf6aab2cb40861a5cd85de14e32902d49ff1bf3bc3a9f932","LICENSE-APACHE":"a9040321c3712d8fd0b09cf52b17445de04a23a10165049ae187cd39e5c86be5","LICENSE-MIT":"904801faf3f1850328af8e1aa1047b9190cc22ed40df5c87f2d93d17f847ef67","README.md":"bc4339a8bfc78dc28ab4782cc539629bc6af72e724543f3e15d173c705e2977a","src/aarch64.rs":"ca05d0dca4bb1aad54c275934bf2761fecc92525aa045f333d55d74f23583af4","src/lib.rs":"1a192980dfc9a2658bea08a98d46f6819a0ffaca6544cabfa6870af09ae7d310","src/loongarch64.rs":"489db8bc4c3ffc3b89ae8ecf94181c5d456d139d66bb74403a597ee4cb58ca2c","src/miri.rs":"acf1a7e7ae31a1de07941084c6b589a2d4c6ea5f87012c811592c865d04c02cb","src/x86.rs":"48454ddb42ada703a7c2401b3e373c0beff1ab662c335ebf8b9a2799a1fedf5c","tests/aarch64.rs":"f6f0f55d821dbcac61e54cec8d35bf944cd09f90f3422eee2b6d55a1e9899635","tests/loongarch64.rs":"1b95140c68f673721699dcb40176540818641785f7863a99214bcad2014aa181","tests/x86.rs":"fcf476ca6ebd0845ab547cea4fe40c2ba2a2324c024264d9a86f666586f3a480"},"package":"ce420fe07aecd3e67c5f910618fe65e94158f6dcc0adf44e00d69ce2bdfe0fd0"} \ No newline at end of file
diff --git a/vendor/cpufeatures/CHANGELOG.md b/vendor/cpufeatures/CHANGELOG.md
index a0533ef40..062155da4 100644
--- a/vendor/cpufeatures/CHANGELOG.md
+++ b/vendor/cpufeatures/CHANGELOG.md
@@ -5,6 +5,24 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
+## 0.2.11 (2023-10-26)
+### Added
+- Support for AArch64's `sm4` target feature ([#972])
+
+[#972]: https://github.com/RustCrypto/utils/pull/972
+
+## 0.2.10 (2023-10-20)
+### Added
+- LoongArch64 target support ([#955])
+
+[#955]: https://github.com/RustCrypto/utils/pull/955
+
+## 0.2.9 (2023-07-05)
+### Added
+- Support for `avx512vbmi` and `avx512vbmi2` target features ([#926])
+
+[#926]: https://github.com/RustCrypto/utils/pull/926
+
## 0.2.8 (2023-06-15)
### Fixed
- Check OS register support on x86 targets ([#919])
diff --git a/vendor/cpufeatures/Cargo.toml b/vendor/cpufeatures/Cargo.toml
index 2f8eee1ad..2d8cbf673 100644
--- a/vendor/cpufeatures/Cargo.toml
+++ b/vendor/cpufeatures/Cargo.toml
@@ -12,11 +12,11 @@
[package]
edition = "2018"
name = "cpufeatures"
-version = "0.2.8"
+version = "0.2.11"
authors = ["RustCrypto Developers"]
description = """
-Lightweight runtime CPU feature detection for x86/x86_64 and aarch64 with
-no_std support and support for mobile targets including Android and iOS
+Lightweight runtime CPU feature detection for aarch64, loongarch64, and x86/x86_64 targets,
+with no_std support and support for mobile targets including Android and iOS
"""
documentation = "https://docs.rs/cpufeatures"
readme = "README.md"
@@ -32,10 +32,13 @@ license = "MIT OR Apache-2.0"
repository = "https://github.com/RustCrypto/utils"
[target.aarch64-linux-android.dependencies.libc]
-version = "0.2.95"
+version = "0.2.149"
[target."cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))".dependencies.libc]
-version = "0.2.95"
+version = "0.2.149"
[target."cfg(all(target_arch = \"aarch64\", target_vendor = \"apple\"))".dependencies.libc]
-version = "0.2.95"
+version = "0.2.149"
+
+[target."cfg(all(target_arch = \"loongarch64\", target_os = \"linux\"))".dependencies.libc]
+version = "0.2.149"
diff --git a/vendor/cpufeatures/README.md b/vendor/cpufeatures/README.md
index 273789d74..f199636a9 100644
--- a/vendor/cpufeatures/README.md
+++ b/vendor/cpufeatures/README.md
@@ -7,7 +7,7 @@
[![Project Chat][chat-image]][chat-link]
[![Build Status][build-image]][build-link]
-Lightweight and efficient runtime CPU feature detection for `aarch64` and
+Lightweight and efficient runtime CPU feature detection for `aarch64`, `loongarch64`, and
`x86`/`x86_64` targets.
Supports `no_std` as well as mobile targets including iOS and Android,
@@ -16,8 +16,6 @@ macro.
[Documentation][docs-link]
-## Supported architectures
-
# Supported target architectures
*NOTE: target features with an asterisk are unstable (nightly-only) and subject
@@ -33,6 +31,26 @@ Target features:
- `sha2`*
- `sha3`*
+## `loongarch64`
+
+Linux only (LoongArch64 does not support OS-independent feature detection)
+
+Target features:
+
+- `lam`*
+- `ual`*
+- `fpu`*
+- `lsx`*
+- `lasx`*
+- `crc32`*
+- `complex`*
+- `crypto`*
+- `lvz`*
+- `lbt.x86`*
+- `lbt.arm`*
+- `lbt.mips`*
+- `ptw`*
+
## `x86`/`x86_64`
OS independent and `no_std`-friendly
@@ -51,6 +69,8 @@ Target features:
- `avx512ifma`*
- `avx512pf`*
- `avx512vl`*
+- `avx512vbmi`*
+- `avx512vbmi2`*
- `bmi1`
- `bmi2`
- `fma`,
diff --git a/vendor/cpufeatures/src/aarch64.rs b/vendor/cpufeatures/src/aarch64.rs
index 2c9a044b0..2305d8982 100644
--- a/vendor/cpufeatures/src/aarch64.rs
+++ b/vendor/cpufeatures/src/aarch64.rs
@@ -69,6 +69,7 @@ __expand_check_macro! {
("aes", AES), // Enable AES support.
("sha2", SHA2), // Enable SHA1 and SHA256 support.
("sha3", SHA3), // Enable SHA512 and SHA3 support.
+ ("sm4", SM4), // Enable SM3 and SM4 support.
}
/// Linux hardware capabilities mapped to target features.
@@ -85,6 +86,7 @@ pub mod hwcaps {
pub const AES: c_ulong = libc::HWCAP_AES | libc::HWCAP_PMULL;
pub const SHA2: c_ulong = libc::HWCAP_SHA2;
pub const SHA3: c_ulong = libc::HWCAP_SHA3 | libc::HWCAP_SHA512;
+ pub const SM4: c_ulong = libc::HWCAP_SM3 | libc::HWCAP_SM4;
}
// Apple OS (macOS, iOS, watchOS, and tvOS) `check!` macro.
diff --git a/vendor/cpufeatures/src/lib.rs b/vendor/cpufeatures/src/lib.rs
index dfd1feab7..ba9aa25d0 100644
--- a/vendor/cpufeatures/src/lib.rs
+++ b/vendor/cpufeatures/src/lib.rs
@@ -18,6 +18,30 @@
//! - `sha2`*
//! - `sha3`*
//!
+//! Linux only
+//!
+//! - `sm4`*
+//!
+//! ## `loongarch64`
+//!
+//! Linux only (LoongArch64 does not support OS-independent feature detection)
+//!
+//! Target features:
+//!
+//! - `lam`*
+//! - `ual`*
+//! - `fpu`*
+//! - `lsx`*
+//! - `lasx`*
+//! - `crc32`*
+//! - `complex`*
+//! - `crypto`*
+//! - `lvz`*
+//! - `lbt.x86`*
+//! - `lbt.arm`*
+//! - `lbt.mips`*
+//! - `ptw`*
+//!
//! ## `x86`/`x86_64`
//!
//! OS independent and `no_std`-friendly
@@ -103,19 +127,29 @@
)]
#[cfg(not(miri))]
-#[cfg(all(target_arch = "aarch64"))]
+#[cfg(target_arch = "aarch64")]
#[doc(hidden)]
pub mod aarch64;
#[cfg(not(miri))]
+#[cfg(target_arch = "loongarch64")]
+#[doc(hidden)]
+pub mod loongarch64;
+
+#[cfg(not(miri))]
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
mod x86;
#[cfg(miri)]
mod miri;
-#[cfg(not(any(target_arch = "aarch64", target_arch = "x86", target_arch = "x86_64")))]
-compile_error!("This crate works only on `aarch64`, `x86`, and `x86-64` targets.");
+#[cfg(not(any(
+ target_arch = "aarch64",
+ target_arch = "loongarch64",
+ target_arch = "x86",
+ target_arch = "x86_64"
+)))]
+compile_error!("This crate works only on `aarch64`, `loongarch64`, `x86`, and `x86-64` targets.");
/// Create module with CPU feature detection code.
#[macro_export]
diff --git a/vendor/cpufeatures/src/loongarch64.rs b/vendor/cpufeatures/src/loongarch64.rs
new file mode 100644
index 000000000..51398d74e
--- /dev/null
+++ b/vendor/cpufeatures/src/loongarch64.rs
@@ -0,0 +1,106 @@
+//! LoongArch64 CPU feature detection support.
+//!
+//! This implementation relies on OS-specific APIs for feature detection.
+
+// Evaluate the given `$body` expression any of the supplied target features
+// are not enabled. Otherwise returns true.
+#[macro_export]
+#[doc(hidden)]
+macro_rules! __unless_target_features {
+ ($($tf:tt),+ => $body:expr ) => {
+ {
+ #[cfg(not(all($(target_feature=$tf,)*)))]
+ $body
+
+ #[cfg(all($(target_feature=$tf,)*))]
+ true
+ }
+ };
+}
+
+// Linux runtime detection of target CPU features using `getauxval`.
+#[cfg(target_os = "linux")]
+#[macro_export]
+#[doc(hidden)]
+macro_rules! __detect_target_features {
+ ($($tf:tt),+) => {{
+ let hwcaps = $crate::loongarch64::getauxval_hwcap();
+ $($crate::check!(hwcaps, $tf) & )+ true
+ }};
+}
+
+/// Linux helper function for calling `getauxval` to get `AT_HWCAP`.
+#[cfg(target_os = "linux")]
+pub fn getauxval_hwcap() -> u64 {
+ unsafe { libc::getauxval(libc::AT_HWCAP) }
+}
+
+// Linux `expand_check_macro`
+#[cfg(target_os = "linux")]
+macro_rules! __expand_check_macro {
+ ($(($name:tt, $hwcap:ident)),* $(,)?) => {
+ #[macro_export]
+ #[doc(hidden)]
+ macro_rules! check {
+ $(
+ ($hwcaps:expr, $name) => {
+ (($hwcaps & $crate::loongarch64::hwcaps::$hwcap) != 0)
+ };
+ )*
+ }
+ };
+}
+
+// Linux `expand_check_macro`
+#[cfg(target_os = "linux")]
+__expand_check_macro! {
+ ("cpucfg", CPUCFG), // Enable CPUCFG support.
+ ("lam", LAM), // Enable LAM support.
+ ("ual", UAL), // Enable UAL support.
+ ("fpu", FPU), // Enable FPU support.
+ ("lsx", LSX), // Enable LSX support.
+ ("lasx", LASX), // Enable LASX support.
+ ("crc32", CRC32), // Enable CRC32 support.
+ ("complex", COMPLEX), // Enable COMPLEX support.
+ ("crypto", CRYPTO), // Enable CRYPTO support.
+ ("lvz", LVZ), // Enable LVZ support.
+ ("lbt.x86", LBT_X86), // Enable LBT_X86 support.
+ ("lbt.arm", LBT_ARM), // Enable LBT_ARM support.
+ ("lbt.mips", LBT_MIPS), // Enable LBT_MIPS support.
+ ("ptw", PTW), // Enable PTW support.
+}
+
+/// Linux hardware capabilities mapped to target features.
+///
+/// Note that LLVM target features are coarser grained than what Linux supports
+/// and imply more capabilities under each feature. This module attempts to
+/// provide that mapping accordingly.
+#[cfg(target_os = "linux")]
+pub mod hwcaps {
+ use libc::c_ulong;
+
+ pub const CPUCFG: c_ulong = libc::HWCAP_CPUCFG;
+ pub const LAM: c_ulong = libc::HWCAP_LAM;
+ pub const UAL: c_ulong = libc::HWCAP_UAL;
+ pub const FPU: c_ulong = libc::HWCAP_FPU;
+ pub const LSX: c_ulong = libc::HWCAP_LSX;
+ pub const LASX: c_ulong = libc::HWCAP_LASX;
+ pub const CRC32: c_ulong = libc::HWCAP_CRC32;
+ pub const COMPLEX: c_ulong = libc::HWCAP_COMPLEX;
+ pub const CRYPTO: c_ulong = libc::HWCAP_CRYPTO;
+ pub const LVZ: c_ulong = libc::HWCAP_LVZ;
+ pub const LBT_X86: c_ulong = libc::HWCAP_LBT_X86;
+ pub const LBT_ARM: c_ulong = libc::HWCAP_LBT_ARM;
+ pub const LBT_MIPS: c_ulong = libc::HWCAP_LBT_MIPS;
+ pub const PTW: c_ulong = libc::HWCAP_PTW;
+}
+
+// On other targets, runtime CPU feature detection is unavailable
+#[cfg(not(target_os = "linux"))]
+#[macro_export]
+#[doc(hidden)]
+macro_rules! __detect_target_features {
+ ($($tf:tt),+) => {
+ false
+ };
+}
diff --git a/vendor/cpufeatures/src/x86.rs b/vendor/cpufeatures/src/x86.rs
index 2199f2779..958eff3ee 100644
--- a/vendor/cpufeatures/src/x86.rs
+++ b/vendor/cpufeatures/src/x86.rs
@@ -142,4 +142,6 @@ __expand_check_macro! {
("sha", "xmm", 1, ebx, 29),
("avx512bw", "zmm", 1, ebx, 30),
("avx512vl", "zmm", 1, ebx, 31),
+ ("avx512vbmi", "zmm", 1, ecx, 1),
+ ("avx512vbmi2", "zmm", 1, ecx, 6),
}
diff --git a/vendor/cpufeatures/tests/aarch64.rs b/vendor/cpufeatures/tests/aarch64.rs
index 949669bed..41a612331 100644
--- a/vendor/cpufeatures/tests/aarch64.rs
+++ b/vendor/cpufeatures/tests/aarch64.rs
@@ -2,7 +2,7 @@
#![cfg(target_arch = "aarch64")]
-cpufeatures::new!(armcaps, "aes", "sha2", "sha3");
+cpufeatures::new!(armcaps, "aes", "sha2", "sha3", "sm4");
#[test]
fn init() {
diff --git a/vendor/cpufeatures/tests/loongarch64.rs b/vendor/cpufeatures/tests/loongarch64.rs
new file mode 100644
index 000000000..fbcbe9d3b
--- /dev/null
+++ b/vendor/cpufeatures/tests/loongarch64.rs
@@ -0,0 +1,20 @@
+//! LoongArch64 tests
+
+#![cfg(target_arch = "loongarch64")]
+
+cpufeatures::new!(
+ lacaps, "cpucfg", "lam", "ual", "fpu", "lsx", "lasx", "crc32", "complex", "crypto", "lvz",
+ "lbt.x86", "lbt.arm", "lbt.mips", "ptw"
+);
+
+#[test]
+fn init() {
+ let token: lacaps::InitToken = lacaps::init();
+ assert_eq!(token.get(), lacaps::get());
+}
+
+#[test]
+fn init_get() {
+ let (token, val) = lacaps::init_get();
+ assert_eq!(val, token.get());
+}