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Diffstat (limited to 'compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs')
-rw-r--r--compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs23
1 files changed, 23 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs
new file mode 100644
index 000000000..2546ab9b7
--- /dev/null
+++ b/compiler/rustc_target/src/spec/thumbv6m_none_eabi.rs
@@ -0,0 +1,23 @@
+// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
+
+use crate::spec::{Target, TargetOptions};
+
+pub fn target() -> Target {
+ Target {
+ llvm_target: "thumbv6m-none-eabi".into(),
+ pointer_width: 32,
+ data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
+ arch: "arm".into(),
+
+ options: TargetOptions {
+ abi: "eabi".into(),
+ // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
+ // with +strict-align.
+ features: "+strict-align".into(),
+ // There are no atomic CAS instructions available in the instruction set of the ARMv6-M
+ // architecture
+ atomic_cas: false,
+ ..super::thumb_base::opts()
+ },
+ }
+}