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Diffstat (limited to '')
-rw-r--r-- | compiler/rustc_target/src/spec/thumbv8m_main_none_eabihf.rs | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/compiler/rustc_target/src/spec/thumbv8m_main_none_eabihf.rs b/compiler/rustc_target/src/spec/thumbv8m_main_none_eabihf.rs new file mode 100644 index 000000000..86c25f9e4 --- /dev/null +++ b/compiler/rustc_target/src/spec/thumbv8m_main_none_eabihf.rs @@ -0,0 +1,25 @@ +// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile), +// with the Floating Point extension. + +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "thumbv8m.main-none-eabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabihf".into(), + // If the Floating Point extension is implemented in the Cortex-M33 + // processor, the Cortex-M33 Technical Reference Manual states that + // the FPU uses the FPv5 architecture, single-precision instructions + // and 16 D registers. + // These parameters map to the following LLVM features. + features: "+fp-armv8,-fp64,-d32".into(), + max_atomic_width: Some(32), + ..super::thumb_base::opts() + }, + } +} |