diff options
Diffstat (limited to 'library/stdarch/crates/core_arch/src/x86_64/rdrand.rs')
| -rw-r--r-- | library/stdarch/crates/core_arch/src/x86_64/rdrand.rs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs b/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs index e5ec933fb..c5bb92975 100644 --- a/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs +++ b/library/stdarch/crates/core_arch/src/x86_64/rdrand.rs @@ -18,7 +18,7 @@ use stdarch_test::assert_instr; /// Read a hardware generated 64-bit random value and store the result in val. /// Returns 1 if a random value was generated, and 0 otherwise. /// -/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdrand64_step) +/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdrand64_step) #[inline] #[target_feature(enable = "rdrand")] #[cfg_attr(test, assert_instr(rdrand))] @@ -32,7 +32,7 @@ pub unsafe fn _rdrand64_step(val: &mut u64) -> i32 { /// Read a 64-bit NIST SP800-90B and SP800-90C compliant random value and store /// in val. Return 1 if a random value was generated, and 0 otherwise. /// -/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_rdseed64_step) +/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_rdseed64_step) #[inline] #[target_feature(enable = "rdseed")] #[cfg_attr(test, assert_instr(rdseed))] |