228 files changed, 1113 insertions, 1149 deletions

diff --git a/vendor/packed_simd/.cargo-checksum.json b/vendor/packed_simd/.cargo-checksum.json
new file mode 100644
index 000000000..0d75492f0
--- /dev/null
+++ b/vendor/packed_simd/.cargo-checksum.json
@@ -0,0 +1 @@
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f53bded9599","src/v64.rs":"0b8079881b71575e3414be0b7f8f7eaba65281ba6732f2b2f61f73e95b6f48f7","src/vPtr.rs":"8b3e433d487180bb4304ff71245ecad90f0010f43e139a72027b672abe58facc","src/vSize.rs":"eda5aa020706cbf94d15bada41a0c2a35fc8f3f37cb7c2cd6f34d201399a495e","tests/endianness.rs":"5147f86d224c4c540b772033da2f994cad9bc9c035f38ec21e23bc4e55f8a759"},"package":"1f9f08af0c877571712e2e3e686ad79efad9657dbf0f7c3c8ba943ff6c38932d"}
\ No newline at end of file
diff --git a/vendor/packed_simd/Cargo.toml b/vendor/packed_simd/Cargo.toml
new file mode 100644
index 000000000..77fc096b0
--- /dev/null
+++ b/vendor/packed_simd/Cargo.toml
@@ -0,0 +1,83 @@
+# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+#
+# When uploading crates to the registry Cargo will automatically
+# "normalize" Cargo.toml files for maximal compatibility
+# with all versions of Cargo and also rewrite `path` dependencies
+# to registry (e.g., crates.io) dependencies.
+#
+# If you are reading this file be aware that the original Cargo.toml
+# will likely look very different (and much more reasonable).
+# See Cargo.toml.orig for the original contents.
+
+[package]
+edition = "2018"
+name = "packed_simd"
+version = "0.3.9"
+build = "build.rs"
+description = "Portable Packed SIMD vectors"
+homepage = "https://github.com/rust-lang/packed_simd"
+documentation = "https://docs.rs/crate/packed_simd/"
+readme = "README.md"
+keywords = [
+    "simd",
+    "vector",
+    "portability",
+]
+categories = [
+    "hardware-support",
+    "concurrency",
+    "no-std",
+    "data-structures",
+]
+license = "MIT OR Apache-2.0"
+repository = "https://github.com/rust-lang/packed_simd"
+
+[package.metadata.docs.rs]
+features = ["into_bits"]
+rustdoc-args = [
+    "--cfg",
+    "doc_cfg",
+]
+
+[dependencies.cfg-if]
+version = "1.0.0"
+
+[dependencies.core_arch]
+version = "0.1.5"
+optional = true
+
+[dependencies.num-traits]
+version = "0.2.14"
+features = ["libm"]
+default-features = false
+
+[dev-dependencies.arrayvec]
+version = "^0.5"
+default-features = false
+
+[dev-dependencies.paste]
+version = "^1"
+
+[features]
+default = []
+into_bits = []
+libcore_neon = []
+
+[target."cfg(target_arch = \"x86_64\")".dependencies.sleef-sys]
+version = "0.1.2"
+optional = true
+
+[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen]
+version = "=0.2.87"
+
+[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen-test]
+version = "=0.3.37"
+
+[badges.is-it-maintained-issue-resolution]
+repository = "rust-lang/packed_simd"
+
+[badges.is-it-maintained-open-issues]
+repository = "rust-lang/packed_simd"
+
+[badges.maintenance]
+status = "experimental"
diff --git a/vendor/packed_simd_2/LICENSE-APACHE b/vendor/packed_simd/LICENSE-APACHE
index 16fe87b06..16fe87b06 100644
--- a/vendor/packed_simd_2/LICENSE-APACHE
+++ b/vendor/packed_simd/LICENSE-APACHE
diff --git a/vendor/packed_simd_2/LICENSE-MIT b/vendor/packed_simd/LICENSE-MIT
index 39d4bdb5a..39d4bdb5a 100644
--- a/vendor/packed_simd_2/LICENSE-MIT
+++ b/vendor/packed_simd/LICENSE-MIT
diff --git a/vendor/packed_simd/README.md b/vendor/packed_simd/README.md
new file mode 100644
index 000000000..59db13fe4
--- /dev/null
+++ b/vendor/packed_simd/README.md
@@ -0,0 +1,144 @@
+# `Simd<[T; N]>`
+
+## Implementation of [Rust RFC #2366: `std::simd`][rfc2366]
+
+[![Latest Version]][crates.io] [![docs]][master_docs]
+
+**WARNING**: this crate only supports the most recent nightly Rust toolchain
+and will be superseded by [`#![feature(portable_simd)]`](https://github.com/rust-lang/portable-simd).
+
+## Documentation
+
+* [API docs (`master` branch)][master_docs]
+* [Performance guide][perf_guide]
+* [API docs (`docs.rs`)][docs.rs]
+* [RFC2366 `std::simd`][rfc2366]: - contains motivation, design rationale,
+  discussion, etc.
+
+## Examples
+
+Most of the examples come with both a scalar and a vectorized implementation.
+
+* [`aobench`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/aobench)
+* [`fannkuch_redux`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/fannkuch_redux)
+* [`matrix inverse`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/matrix_inverse)
+* [`mandelbrot`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/mandelbrot)
+* [`n-body`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/nbody)
+* [`options_pricing`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/options_pricing)
+* [`spectral_norm`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/spectral_norm)
+* [`triangle transform`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/triangle_xform)
+* [`stencil`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/stencil)
+* [`vector dot product`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/dot_product)
+
+## Cargo features
+
+* `into_bits` (default: disabled): enables `FromBits`/`IntoBits` trait
+  implementations for the vector types. These allow reinterpreting the bits of a
+  vector type as those of another vector type safely by just using the
+  `.into_bits()` method.
+
+## Performance
+
+The following [ISPC] examples are also part of `packed_simd`'s
+[`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/)
+directory, where `packed_simd`+[`rayon`][rayon] are used to emulate [ISPC]'s
+Single-Program-Multiple-Data (SPMD) programming model. The performance results
+on different hardware is shown in the `readme.md` of each example. The following
+table summarizes the performance ranges, where `+` means speed-up and `-`
+slowdown:
+
+* `aobench`: `[-1.02x, +1.53x]`,
+* `stencil`: `[+1.06x, +1.72x]`,
+* `mandelbrot`: `[-1.74x, +1.2x]`,
+* `options_pricing`:
+   * `black_scholes`: `+1.0x`
+   * `binomial_put`: `+1.4x`
+
+ While SPMD is not the intended use case for `packed_simd`, it is possible to
+ combine the library with [`rayon`][rayon] to poorly emulate [ISPC]'s SPMD programming
+ model in Rust. Writing performant code is not as straightforward as with
+ [ISPC], but with some care (e.g. see the [Performance Guide][perf_guide]) one
+ can easily match and often out-perform [ISPC]'s "default performance".
+
+## Platform support
+
+The following table describes the supported platforms: `build` shows whether
+the library compiles without issues for a given target, while `run` shows
+whether the test suite passes for a given target.
+
+| **Linux**                             | **build** | **run** |
+|---------------------------------------|-----------|---------|
+| `i586-unknown-linux-gnu`              | ✓         | ✗       |
+| `i686-unknown-linux-gnu`              | ✓         | ✗       |
+| `x86_64-unknown-linux-gnu`            | ✓         | ✓       |
+| `arm-unknown-linux-gnueabihf`         | ✓         | ✓       |
+| `armv7-unknown-linux-gnueabi`         | ✓         | ✓       |
+| `aarch64-unknown-linux-gnu`           | ✓         | ✓       |
+| `powerpc-unknown-linux-gnu`           | ✓         | ✗       |
+| `powerpc64-unknown-linux-gnu`         | ✓         | ✗       |
+| `powerpc64le-unknown-linux-gnu`       | ✓         | ✓       |
+| `s390x-unknown-linux-gnu`             | ✓         | ✗       |
+| `sparc64-unknown-linux-gnu`           | ✓         | ✗       |
+| `thumbv7neon-unknown-linux-gnueabihf` | ✓         | ✓       |
+| **MacOSX**                            | **build** | **run** |
+| `x86_64-apple-darwin`                 | ✓         | ✓       |
+| **Android**                           | **build** | **run** |
+| `x86_64-linux-android`                | ✓         | ✓       |
+| `armv7-linux-androideabi`             | ✓         | ✗       |
+| `aarch64-linux-android`               | ✓         | ✗       |
+| `thumbv7neon-linux-androideabi`       | ✓         | ✗       |
+| **iOS**                               | **build** | **run** |
+| `x86_64-apple-ios`                    | ✗         | ✗       |
+| `aarch64-apple-ios`                   | ✗         | ✗       |
+
+
+## Machine code verification
+
+The
+[`verify/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/verify)
+crate tests disassembles the portable packed vector APIs at run-time and
+compares the generated machine code against the desired one to make sure that
+this crate remains efficient.
+
+## License
+
+This project is licensed under either of
+
+* [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)
+  ([LICENSE-APACHE](LICENSE-APACHE))
+
+* [MIT License](http://opensource.org/licenses/MIT)
+  ([LICENSE-MIT](LICENSE-MIT))
+
+at your option.
+
+## Contributing
+
+We welcome all people who want to contribute.
+Please see the [contributing instructions] for more information.
+
+Contributions in any form (issues, pull requests, etc.) to this project
+must adhere to Rust's [Code of Conduct].
+
+Unless you explicitly state otherwise, any contribution intentionally submitted
+for inclusion in `packed_simd` by you, as defined in the Apache-2.0 license, shall be
+dual licensed as above, without any additional terms or conditions.
+
+[travis]: https://travis-ci.com/rust-lang/packed_simd
+[Travis-CI Status]: https://travis-ci.com/rust-lang/packed_simd.svg?branch=master
+[appveyor]: https://ci.appveyor.com/project/gnzlbg/packed-simd
+[Appveyor Status]: https://ci.appveyor.com/api/projects/status/hd7v9dvr442hgdix?svg=true
+[Latest Version]: https://img.shields.io/crates/v/packed_simd.svg
+[crates.io]: https://crates.io/crates/packed_simd
+[docs]: https://docs.rs/packed_simd/badge.svg
+[docs.rs]: https://docs.rs/packed_simd
+[master_docs]: https://rust-lang-nursery.github.io/packed_simd/packed_simd/
+[perf_guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/
+[rfc2366]: https://github.com/rust-lang/rfcs/pull/2366
+[ISPC]: https://ispc.github.io/
+[rayon]: https://crates.io/crates/rayon
+[boost_license]: https://www.boost.org/LICENSE_1_0.txt
+[SLEEF]: https://sleef.org/
+[sleef_sys]: https://crates.io/crates/sleef-sys
+[contributing instructions]: contributing.md
+[Code of Conduct]: https://www.rust-lang.org/en-US/conduct.html
diff --git a/vendor/packed_simd_2/bors.toml b/vendor/packed_simd/bors.toml
index 6d302dc85..6d302dc85 100644
--- a/vendor/packed_simd_2/bors.toml
+++ b/vendor/packed_simd/bors.toml
diff --git a/vendor/packed_simd_2/build.rs b/vendor/packed_simd/build.rs
index e87298a2d..e87298a2d 100644
--- a/vendor/packed_simd_2/build.rs
+++ b/vendor/packed_simd/build.rs
diff --git a/vendor/packed_simd_2/ci/all.sh b/vendor/packed_simd/ci/all.sh
index 55a1fa2ef..55a1fa2ef 100755
--- a/vendor/packed_simd_2/ci/all.sh
+++ b/vendor/packed_simd/ci/all.sh
diff --git a/vendor/packed_simd/ci/android-install-ndk.sh b/vendor/packed_simd/ci/android-install-ndk.sh
new file mode 100644
index 000000000..537085393
--- /dev/null
+++ b/vendor/packed_simd/ci/android-install-ndk.sh
@@ -0,0 +1,21 @@
+#!/usr/bin/env sh
+# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
+# file at the top-level directory of this distribution and at
+# http://rust-lang.org/COPYRIGHT.
+#
+# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
+# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
+# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
+# option. This file may not be copied, modified, or distributed
+# except according to those terms.
+
+set -ex
+
+ANDROID_NDK_URL=https://dl.google.com/android/repository
+ANDROID_NDK_ARCHIVE=android-ndk-r25b-linux.zip
+
+curl -fO "$ANDROID_NDK_URL/$ANDROID_NDK_ARCHIVE"
+unzip -q $ANDROID_NDK_ARCHIVE
+rm $ANDROID_NDK_ARCHIVE
+mv android-ndk-* ndk
+rm -rf android-ndk-*
diff --git a/vendor/packed_simd_2/ci/android-install-sdk.sh b/vendor/packed_simd/ci/android-install-sdk.sh
index 6b5ac09ab..6b5ac09ab 100644
--- a/vendor/packed_simd_2/ci/android-install-sdk.sh
+++ b/vendor/packed_simd/ci/android-install-sdk.sh
diff --git a/vendor/packed_simd_2/ci/android-sysimage.sh b/vendor/packed_simd/ci/android-sysimage.sh
index 9eabd7c8d..9eabd7c8d 100644
--- a/vendor/packed_simd_2/ci/android-sysimage.sh
+++ b/vendor/packed_simd/ci/android-sysimage.sh
diff --git a/vendor/packed_simd_2/ci/benchmark.sh b/vendor/packed_simd/ci/benchmark.sh
index 3635b9e37..3635b9e37 100755
--- a/vendor/packed_simd_2/ci/benchmark.sh
+++ b/vendor/packed_simd/ci/benchmark.sh
diff --git a/vendor/packed_simd_2/ci/deploy_and_run_on_ios_simulator.rs b/vendor/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
index c0fe52c35..c0fe52c35 100644
--- a/vendor/packed_simd_2/ci/deploy_and_run_on_ios_simulator.rs
+++ b/vendor/packed_simd/ci/deploy_and_run_on_ios_simulator.rs
diff --git a/vendor/packed_simd_2/ci/docker/aarch64-linux-android/Dockerfile b/vendor/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
index 27bde89c5..27bde89c5 100644
--- a/vendor/packed_simd_2/ci/docker/aarch64-linux-android/Dockerfile
+++ b/vendor/packed_simd/ci/docker/aarch64-linux-android/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/aarch64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
index 41ff4729a..41ff4729a 100644
--- a/vendor/packed_simd_2/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
+++ b/vendor/packed_simd/ci/docker/aarch64-unknown-linux-gnu/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/arm-unknown-linux-gnueabi/Dockerfile b/vendor/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
index e1c591dd9..e1c591dd9 100644
--- a/vendor/packed_simd_2/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
+++ b/vendor/packed_simd/ci/docker/arm-unknown-linux-gnueabi/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile b/vendor/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile
index 757b79e7e..757b79e7e 100644
--- a/vendor/packed_simd_2/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile
+++ b/vendor/packed_simd/ci/docker/arm-unknown-linux-gnueabihf/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/arm-linux-androideabi/Dockerfile b/vendor/packed_simd/ci/docker/armv7-linux-androideabi/Dockerfile
index 995a9e30e..995a9e30e 100644
--- a/vendor/packed_simd_2/ci/docker/arm-linux-androideabi/Dockerfile
+++ b/vendor/packed_simd/ci/docker/armv7-linux-androideabi/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile b/vendor/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile
index 253906293..253906293 100644
--- a/vendor/packed_simd_2/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile
+++ b/vendor/packed_simd/ci/docker/armv7-unknown-linux-gnueabihf/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/i586-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile
index 01093698f..01093698f 100644
--- a/vendor/packed_simd_2/ci/docker/i586-unknown-linux-gnu/Dockerfile
+++ b/vendor/packed_simd/ci/docker/i586-unknown-linux-gnu/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/i686-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile
index 01093698f..01093698f 100644
--- a/vendor/packed_simd_2/ci/docker/i686-unknown-linux-gnu/Dockerfile
+++ b/vendor/packed_simd/ci/docker/i686-unknown-linux-gnu/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/mips-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile
index 3bd471e87..3bd471e87 100644
--- a/vendor/packed_simd_2/ci/docker/mips-unknown-linux-gnu/Dockerfile
+++ b/vendor/packed_simd/ci/docker/mips-unknown-linux-gnu/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile b/vendor/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile
index f26f1f38e..f26f1f38e 100644
--- a/vendor/packed_simd_2/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile
+++ b/vendor/packed_simd/ci/docker/mips64-unknown-linux-gnuabi64/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile b/vendor/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile
index 7d9f0bd99..7d9f0bd99 100644
--- a/vendor/packed_simd_2/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile
+++ b/vendor/packed_simd/ci/docker/mips64el-unknown-linux-gnuabi64/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/mipsel-unknown-linux-musl/Dockerfile b/vendor/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile
index 7488662ef..7488662ef 100644
--- a/vendor/packed_simd_2/ci/docker/mipsel-unknown-linux-musl/Dockerfile
+++ b/vendor/packed_simd/ci/docker/mipsel-unknown-linux-musl/Dockerfile
diff --git a/vendor/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
new file mode 100644
index 000000000..15ba58e60
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,13 @@
+FROM ubuntu:22.04
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-powerpc-linux-gnu libc6-dev-powerpc-cross \
+        qemu-system-ppc \
+        make \
+        file
+
+ENV CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_LINKER=powerpc-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu Vger -L /usr/powerpc-linux-gnu" \
+    CC=powerpc-linux-gnu-gcc \
+    OBJDUMP=powerpc-linux-gnu-objdump
diff --git a/vendor/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
new file mode 100644
index 000000000..21c296dc4
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,17 @@
+FROM ubuntu:22.04
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+    gcc \
+    ca-certificates \
+    libc6-dev \
+    gcc-powerpc64-linux-gnu \
+    libc6-dev-ppc64-cross \
+    qemu-user  \
+    qemu-system-ppc \
+    make \
+    file 
+
+ENV CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_LINKER=powerpc64-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64 -L /usr/powerpc64-linux-gnu" \
+    CC=powerpc64-linux-gnu-gcc \
+    OBJDUMP=powerpc64-linux-gnu-objdump
diff --git a/vendor/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
new file mode 100644
index 000000000..8034145fc
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,11 @@
+FROM ubuntu:22.04
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        gcc libc6-dev qemu-user ca-certificates \
+        gcc-powerpc64le-linux-gnu libc6-dev-ppc64el-cross \
+        qemu-system-ppc file make
+
+ENV CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_LINKER=powerpc64le-linux-gnu-gcc \
+    CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -L /usr/powerpc64le-linux-gnu" \
+    CC=powerpc64le-linux-gnu-gcc \
+    OBJDUMP=powerpc64le-linux-gnu-objdump
diff --git a/vendor/packed_simd/ci/docker/s390x-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/s390x-unknown-linux-gnu/Dockerfile
new file mode 100644
index 000000000..e785ca370
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/s390x-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,20 @@
+FROM ubuntu:22.04
+
+RUN apt-get update && \
+    apt-get install -y --no-install-recommends \
+    ca-certificates \
+    curl \
+    cmake \
+    gcc \
+    libc6-dev \
+    g++-s390x-linux-gnu \
+    libc6-dev-s390x-cross \
+    qemu-user \
+    make \
+    file
+
+ENV CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_LINKER=s390x-linux-gnu-gcc \
+    CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_RUNNER="qemu-s390x -L /usr/s390x-linux-gnu" \
+    CC_s390x_unknown_linux_gnu=s390x-linux-gnu-gcc \
+    CXX_s390x_unknown_linux_gnu=s390x-linux-gnu-g++ \
+    OBJDUMP=s390x-linux-gnu-objdump
diff --git a/vendor/packed_simd/ci/docker/sparc64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
new file mode 100644
index 000000000..c35f4d8f3
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
@@ -0,0 +1,18 @@
+FROM debian:bookworm
+
+RUN apt-get update && apt-get install -y --no-install-recommends \
+        curl ca-certificates \
+        gcc libc6-dev \
+        gcc-sparc64-linux-gnu libc6-dev-sparc64-cross \
+        qemu-system-sparc64 openbios-sparc seabios ipxe-qemu \
+        p7zip-full cpio
+
+COPY linux-sparc64.sh /
+RUN bash /linux-sparc64.sh
+
+COPY test-runner-linux /
+
+ENV CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_LINKER=sparc64-linux-gnu-gcc \
+    CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_RUNNER="/test-runner-linux sparc64" \
+    CC_sparc64_unknown_linux_gnu=sparc64-linux-gnu-gcc \
+    PATH=$PATH:/rust/bin
diff --git a/vendor/packed_simd_2/ci/docker/thumbv7neon-linux-androideabi/Dockerfile b/vendor/packed_simd/ci/docker/thumbv7neon-linux-androideabi/Dockerfile
index c1da77109..c1da77109 100644
--- a/vendor/packed_simd_2/ci/docker/thumbv7neon-linux-androideabi/Dockerfile
+++ b/vendor/packed_simd/ci/docker/thumbv7neon-linux-androideabi/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile b/vendor/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile
index 588d23c65..588d23c65 100644
--- a/vendor/packed_simd_2/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile
+++ b/vendor/packed_simd/ci/docker/thumbv7neon-unknown-linux-gnueabihf/Dockerfile
diff --git a/vendor/packed_simd/ci/docker/wasm32-unknown-unknown/Dockerfile b/vendor/packed_simd/ci/docker/wasm32-unknown-unknown/Dockerfile
new file mode 100644
index 000000000..51ee13e6c
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/wasm32-unknown-unknown/Dockerfile
@@ -0,0 +1,39 @@
+FROM ubuntu:22.04
+
+RUN apt-get update -y && apt-get install -y --no-install-recommends \
+  ca-certificates \
+  clang \
+  cmake \
+  curl \
+  git \
+  libc6-dev \
+  make \
+  ninja-build \
+  python-is-python3 \
+  xz-utils
+
+# Install `wasm2wat`
+RUN git clone --recursive https://github.com/WebAssembly/wabt
+RUN make -C wabt -j$(nproc)
+ENV PATH=$PATH:/wabt/bin
+
+# Install `wasm-bindgen-test-runner`
+RUN curl -L https://github.com/rustwasm/wasm-bindgen/releases/download/0.2.87/wasm-bindgen-0.2.87-x86_64-unknown-linux-musl.tar.gz \
+  | tar xzf -
+# Keep in sync with the version on Cargo.toml.
+ENV PATH=$PATH:/wasm-bindgen-0.2.87-x86_64-unknown-linux-musl
+ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_RUNNER=wasm-bindgen-test-runner
+
+# Install `node`
+RUN curl https://nodejs.org/dist/v14.16.0/node-v14.16.0-linux-x64.tar.xz | tar xJf -
+ENV PATH=$PATH:/node-v14.16.0-linux-x64/bin
+
+# We use a shim linker that removes `--strip-debug` when passed to LLD. While
+# this typically results in invalid debug information in release mode it doesn't
+# result in an invalid names section which is what we're interested in.
+COPY lld-shim.rs /
+ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_LINKER=/tmp/lld-shim
+
+# Rustc isn't available until this container starts, so defer compilation of the
+# shim.
+ENTRYPOINT /rust/bin/rustc /lld-shim.rs -o /tmp/lld-shim && exec bash "$@"
diff --git a/vendor/packed_simd/ci/docker/x86_64-linux-android/Dockerfile b/vendor/packed_simd/ci/docker/x86_64-linux-android/Dockerfile
new file mode 100644
index 000000000..785936d34
--- /dev/null
+++ b/vendor/packed_simd/ci/docker/x86_64-linux-android/Dockerfile
@@ -0,0 +1,31 @@
+FROM ubuntu:20.04
+
+RUN apt-get update && \
+    apt-get install -y --no-install-recommends \
+  ca-certificates \
+  curl \
+  gcc \
+  libc-dev \
+  python \
+  unzip \
+  file \
+  make
+
+WORKDIR /android/
+ENV ANDROID_ARCH=x86_64
+COPY android-install-ndk.sh /android/
+RUN sh /android/android-install-ndk.sh
+
+ENV STDARCH_ASSERT_INSTR_LIMIT=30
+
+# We do not run x86_64-linux-android tests on an android emulator.
+# See ci/android-sysimage.sh for informations about how tests are run.
+COPY android-sysimage.sh /android/
+RUN bash /android/android-sysimage.sh x86_64 x86_64-24_r07.zip
+
+ENV PATH=$PATH:/rust/bin:/android/ndk/toolchains/llvm/prebuilt/linux-x86_64/bin \
+    CARGO_TARGET_X86_64_LINUX_ANDROID_LINKER=x86_64-linux-android21-clang \
+    CC_x86_64_linux_android=x86_64-linux-android21-clang \
+    CXX_x86_64_linux_android=x86_64-linux-android21-clang++ \
+    OBJDUMP=llvm-objdump \
+    HOME=/tmp
diff --git a/vendor/packed_simd_2/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile b/vendor/packed_simd/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
index a6bbe6653..a6bbe6653 100644
--- a/vendor/packed_simd_2/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
+++ b/vendor/packed_simd/ci/docker/x86_64-unknown-linux-gnu-emulated/Dockerfile
diff --git a/vendor/packed_simd_2/ci/docker/x86_64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile
index ce5bb88e6..ce5bb88e6 100644
--- a/vendor/packed_simd_2/ci/docker/x86_64-unknown-linux-gnu/Dockerfile
+++ b/vendor/packed_simd/ci/docker/x86_64-unknown-linux-gnu/Dockerfile
diff --git a/vendor/packed_simd_2/ci/dox.sh b/vendor/packed_simd/ci/dox.sh
index 560eaadcc..560eaadcc 100755
--- a/vendor/packed_simd_2/ci/dox.sh
+++ b/vendor/packed_simd/ci/dox.sh
diff --git a/vendor/packed_simd_2/ci/linux-s390x.sh b/vendor/packed_simd/ci/linux-s390x.sh
index 972abeec5..972abeec5 100644
--- a/vendor/packed_simd_2/ci/linux-s390x.sh
+++ b/vendor/packed_simd/ci/linux-s390x.sh
diff --git a/vendor/packed_simd_2/ci/linux-sparc64.sh b/vendor/packed_simd/ci/linux-sparc64.sh
index 4452b120e..4452b120e 100644
--- a/vendor/packed_simd_2/ci/linux-sparc64.sh
+++ b/vendor/packed_simd/ci/linux-sparc64.sh
diff --git a/vendor/packed_simd_2/ci/lld-shim.rs b/vendor/packed_simd/ci/lld-shim.rs
index 10263869e..10263869e 100644
--- a/vendor/packed_simd_2/ci/lld-shim.rs
+++ b/vendor/packed_simd/ci/lld-shim.rs
diff --git a/vendor/packed_simd_2/ci/max_line_width.sh b/vendor/packed_simd/ci/max_line_width.sh
index f70639b6f..f70639b6f 100755
--- a/vendor/packed_simd_2/ci/max_line_width.sh
+++ b/vendor/packed_simd/ci/max_line_width.sh
diff --git a/vendor/packed_simd_2/ci/run-docker.sh b/vendor/packed_simd/ci/run-docker.sh
index abdd6852f..abdd6852f 100755
--- a/vendor/packed_simd_2/ci/run-docker.sh
+++ b/vendor/packed_simd/ci/run-docker.sh
diff --git a/vendor/packed_simd/ci/run.sh b/vendor/packed_simd/ci/run.sh
new file mode 100755
index 000000000..b1b22ebd7
--- /dev/null
+++ b/vendor/packed_simd/ci/run.sh
@@ -0,0 +1,99 @@
+#!/usr/bin/env bash
+
+set -ex
+
+: ${TARGET?"The TARGET environment variable must be set."}
+
+# Tests are all super fast anyway, and they fault often enough on travis that
+# having only one thread increases debuggability to be worth it.
+#export RUST_TEST_THREADS=1
+#export RUST_BACKTRACE=full
+#export RUST_TEST_NOCAPTURE=1
+
+# Some appveyor builds run out-of-memory; this attempts to mitigate that:
+# https://github.com/rust-lang-nursery/packed_simd/issues/39
+# export RUSTFLAGS="${RUSTFLAGS} -C codegen-units=1"
+# export CARGO_BUILD_JOBS=1
+
+export CARGO_SUBCMD=test
+if [[ "${NORUN}" == "1" ]]; then
+    export CARGO_SUBCMD=build
+fi
+
+if [[ ${TARGET} == "x86_64-apple-ios" ]] || [[ ${TARGET} == "i386-apple-ios" ]]; then
+    export RUSTFLAGS="${RUSTFLAGS} -Clink-arg=-mios-simulator-version-min=7.0"
+    rustc ./ci/deploy_and_run_on_ios_simulator.rs -o $HOME/runtest
+    export CARGO_TARGET_X86_64_APPLE_IOS_RUNNER=$HOME/runtest
+    export CARGO_TARGET_I386_APPLE_IOS_RUNNER=$HOME/runtest
+fi
+
+# The source directory is read-only. Need to copy internal crates to the target
+# directory for their Cargo.lock to be properly written.
+mkdir target || true
+
+rustc --version
+cargo --version
+echo "TARGET=${TARGET}"
+echo "HOST=${HOST}"
+echo "RUSTFLAGS=${RUSTFLAGS}"
+echo "NORUN=${NORUN}"
+echo "NOVERIFY=${NOVERIFY}"
+echo "CARGO_SUBCMD=${CARGO_SUBCMD}"
+echo "CARGO_BUILD_JOBS=${CARGO_BUILD_JOBS}"
+echo "CARGO_INCREMENTAL=${CARGO_INCREMENTAL}"
+echo "RUST_TEST_THREADS=${RUST_TEST_THREADS}"
+echo "RUST_BACKTRACE=${RUST_BACKTRACE}"
+echo "RUST_TEST_NOCAPTURE=${RUST_TEST_NOCAPTURE}"
+
+cargo_test() {
+    cmd="cargo ${CARGO_SUBCMD} --verbose --target=${TARGET} ${@}"
+    if [ "${NORUN}" != "1" ]
+    then
+        if [ "$TARGET" != "wasm32-unknown-unknown" ]
+        then
+            cmd="$cmd -- --quiet"
+        fi
+    fi
+    mkdir target || true
+    ${cmd} 2>&1 | tee > target/output
+    if [[ ${PIPESTATUS[0]} != 0 ]]; then
+        cat target/output
+        return 1
+    fi
+}
+
+cargo_test_impl() {
+    ORIGINAL_RUSTFLAGS=${RUSTFLAGS}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v16  --cfg test_v32 --cfg test_v64" cargo_test ${@}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v128 --cfg test_v256" cargo_test ${@}
+    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v512" cargo_test ${@}
+    RUSTFLAGS=${ORIGINAL_RUSTFLAGS}
+}
+
+# Debug run:
+if [[ "${TARGET}" != "wasm32-unknown-unknown" ]]; then
+   # Run wasm32-unknown-unknown in release mode only
+   cargo_test_impl
+fi
+
+if [[ "${TARGET}" == "x86_64-unknown-linux-gnu" ]] || [[ "${TARGET}" == "x86_64-pc-windows-msvc" ]]; then
+    # use sleef on linux and windows x86_64 builds
+    # FIXME: Use `core_arch,sleef-sys` features once they works again
+    cargo_test_impl --release --features=into_bits
+else
+    # FIXME: Use `core_arch` feature once it works again
+    cargo_test_impl --release --features=into_bits
+fi
+
+# Verify code generation
+if [[ "${NOVERIFY}" != "1" ]]; then
+    cp -r verify/verify target/verify
+    export STDSIMD_ASSERT_INSTR_LIMIT=30
+    if [[ "${TARGET}" == "i586-unknown-linux-gnu" ]]; then
+        export STDSIMD_ASSERT_INSTR_LIMIT=50
+    fi
+    cargo_test --release --manifest-path=target/verify/Cargo.toml
+fi
+
+# FIXME: Figure out which examples take too long to run and ignore or adjust those
+#. ci/run_examples.sh
diff --git a/vendor/packed_simd_2/ci/run_examples.sh b/vendor/packed_simd/ci/run_examples.sh
index 5b26b18af..5b26b18af 100644
--- a/vendor/packed_simd_2/ci/run_examples.sh
+++ b/vendor/packed_simd/ci/run_examples.sh
diff --git a/vendor/packed_simd_2/ci/runtest-android.rs b/vendor/packed_simd/ci/runtest-android.rs
index ed1cd80c8..ed1cd80c8 100644
--- a/vendor/packed_simd_2/ci/runtest-android.rs
+++ b/vendor/packed_simd/ci/runtest-android.rs
diff --git a/vendor/packed_simd_2/ci/setup_benchmarks.sh b/vendor/packed_simd/ci/setup_benchmarks.sh
index cd41a7851..cd41a7851 100755
--- a/vendor/packed_simd_2/ci/setup_benchmarks.sh
+++ b/vendor/packed_simd/ci/setup_benchmarks.sh
diff --git a/vendor/packed_simd_2/ci/test-runner-linux b/vendor/packed_simd/ci/test-runner-linux
index 0654f63bf..0654f63bf 100755
--- a/vendor/packed_simd_2/ci/test-runner-linux
+++ b/vendor/packed_simd/ci/test-runner-linux
diff --git a/vendor/packed_simd_2/contributing.md b/vendor/packed_simd/contributing.md
index 79af8c199..79af8c199 100644
--- a/vendor/packed_simd_2/contributing.md
+++ b/vendor/packed_simd/contributing.md
diff --git a/vendor/packed_simd_2/perf-guide/book.toml b/vendor/packed_simd/perf-guide/book.toml
index 69ba3053c..69ba3053c 100644
--- a/vendor/packed_simd_2/perf-guide/book.toml
+++ b/vendor/packed_simd/perf-guide/book.toml
diff --git a/vendor/packed_simd_2/perf-guide/src/SUMMARY.md b/vendor/packed_simd/perf-guide/src/SUMMARY.md
index 1e7689886..1e7689886 100644
--- a/vendor/packed_simd_2/perf-guide/src/SUMMARY.md
+++ b/vendor/packed_simd/perf-guide/src/SUMMARY.md
diff --git a/vendor/packed_simd_2/perf-guide/src/ascii.css b/vendor/packed_simd/perf-guide/src/ascii.css
index 4c0265119..4c0265119 100644
--- a/vendor/packed_simd_2/perf-guide/src/ascii.css
+++ b/vendor/packed_simd/perf-guide/src/ascii.css
diff --git a/vendor/packed_simd_2/perf-guide/src/bound_checks.md b/vendor/packed_simd/perf-guide/src/bound_checks.md
index 2eeedb5ac..2eeedb5ac 100644
--- a/vendor/packed_simd_2/perf-guide/src/bound_checks.md
+++ b/vendor/packed_simd/perf-guide/src/bound_checks.md
diff --git a/vendor/packed_simd_2/perf-guide/src/float-math/approx.md b/vendor/packed_simd/perf-guide/src/float-math/approx.md
index 2237c67ec..2237c67ec 100644
--- a/vendor/packed_simd_2/perf-guide/src/float-math/approx.md
+++ b/vendor/packed_simd/perf-guide/src/float-math/approx.md
diff --git a/vendor/packed_simd_2/perf-guide/src/float-math/fma.md b/vendor/packed_simd/perf-guide/src/float-math/fma.md
index 357748383..357748383 100644
--- a/vendor/packed_simd_2/perf-guide/src/float-math/fma.md
+++ b/vendor/packed_simd/perf-guide/src/float-math/fma.md
diff --git a/vendor/packed_simd_2/perf-guide/src/float-math/fp.md b/vendor/packed_simd/perf-guide/src/float-math/fp.md
index 711fcc4fd..711fcc4fd 100644
--- a/vendor/packed_simd_2/perf-guide/src/float-math/fp.md
+++ b/vendor/packed_simd/perf-guide/src/float-math/fp.md
diff --git a/vendor/packed_simd_2/perf-guide/src/float-math/svml.md b/vendor/packed_simd/perf-guide/src/float-math/svml.md
index 266c2531c..266c2531c 100644
--- a/vendor/packed_simd_2/perf-guide/src/float-math/svml.md
+++ b/vendor/packed_simd/perf-guide/src/float-math/svml.md
diff --git a/vendor/packed_simd_2/perf-guide/src/introduction.md b/vendor/packed_simd/perf-guide/src/introduction.md
index 7243e19c8..7243e19c8 100644
--- a/vendor/packed_simd_2/perf-guide/src/introduction.md
+++ b/vendor/packed_simd/perf-guide/src/introduction.md
diff --git a/vendor/packed_simd_2/perf-guide/src/prof/linux.md b/vendor/packed_simd/perf-guide/src/prof/linux.md
index 96c7d67bc..96c7d67bc 100644
--- a/vendor/packed_simd_2/perf-guide/src/prof/linux.md
+++ b/vendor/packed_simd/perf-guide/src/prof/linux.md
diff --git a/vendor/packed_simd_2/perf-guide/src/prof/mca.md b/vendor/packed_simd/perf-guide/src/prof/mca.md
index 65ddf1a4e..65ddf1a4e 100644
--- a/vendor/packed_simd_2/perf-guide/src/prof/mca.md
+++ b/vendor/packed_simd/perf-guide/src/prof/mca.md
diff --git a/vendor/packed_simd_2/perf-guide/src/prof/profiling.md b/vendor/packed_simd/perf-guide/src/prof/profiling.md
index 02ba78d2f..02ba78d2f 100644
--- a/vendor/packed_simd_2/perf-guide/src/prof/profiling.md
+++ b/vendor/packed_simd/perf-guide/src/prof/profiling.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/attribute.md b/vendor/packed_simd/perf-guide/src/target-feature/attribute.md
index ee670fea5..ee670fea5 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/attribute.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/attribute.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/features.md b/vendor/packed_simd/perf-guide/src/target-feature/features.md
index b93030ca6..b93030ca6 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/features.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/features.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/inlining.md b/vendor/packed_simd/perf-guide/src/target-feature/inlining.md
index 86705102a..86705102a 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/inlining.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/inlining.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/practice.md b/vendor/packed_simd/perf-guide/src/target-feature/practice.md
index 5b55c61c2..5b55c61c2 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/practice.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/practice.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/runtime.md b/vendor/packed_simd/perf-guide/src/target-feature/runtime.md
index 47ddcc866..47ddcc866 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/runtime.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/runtime.md
diff --git a/vendor/packed_simd_2/perf-guide/src/target-feature/rustflags.md b/vendor/packed_simd/perf-guide/src/target-feature/rustflags.md
index f4c1d1304..f4c1d1304 100644
--- a/vendor/packed_simd_2/perf-guide/src/target-feature/rustflags.md
+++ b/vendor/packed_simd/perf-guide/src/target-feature/rustflags.md
diff --git a/vendor/packed_simd_2/perf-guide/src/vert-hor-ops.md b/vendor/packed_simd/perf-guide/src/vert-hor-ops.md
index d0dd1be12..d0dd1be12 100644
--- a/vendor/packed_simd_2/perf-guide/src/vert-hor-ops.md
+++ b/vendor/packed_simd/perf-guide/src/vert-hor-ops.md
diff --git a/vendor/packed_simd/rust-toolchain b/vendor/packed_simd/rust-toolchain
new file mode 100644
index 000000000..bf867e0ae
--- /dev/null
+++ b/vendor/packed_simd/rust-toolchain
@@ -0,0 +1 @@
+nightly
diff --git a/vendor/packed_simd_2/rustfmt.toml b/vendor/packed_simd/rustfmt.toml
index 7316518b9..7316518b9 100644
--- a/vendor/packed_simd_2/rustfmt.toml
+++ b/vendor/packed_simd/rustfmt.toml
diff --git a/vendor/packed_simd_2/src/api.rs b/vendor/packed_simd/src/api.rs
index 262fc4ee6..262fc4ee6 100644
--- a/vendor/packed_simd_2/src/api.rs
+++ b/vendor/packed_simd/src/api.rs
diff --git a/vendor/packed_simd_2/src/api/bit_manip.rs b/vendor/packed_simd/src/api/bit_manip.rs
index 6d8865706..c1e90bb0f 100644
--- a/vendor/packed_simd_2/src/api/bit_manip.rs
+++ b/vendor/packed_simd/src/api/bit_manip.rs
@@ -34,7 +34,7 @@ macro_rules! impl_bit_manip {
 
         test_if! {
             $test_tt:
-            paste::item_with_macros! {
+            paste::item! {
                 #[allow(overflowing_literals)]
                 pub mod [<$id _bit_manip>] {
                     #![allow(const_item_mutation)]
diff --git a/vendor/packed_simd_2/src/api/bitmask.rs b/vendor/packed_simd/src/api/bitmask.rs
index a06ff0fab..8f4868f32 100644
--- a/vendor/packed_simd_2/src/api/bitmask.rs
+++ b/vendor/packed_simd/src/api/bitmask.rs
@@ -17,13 +17,10 @@ macro_rules! impl_bitmask {
         test_if! {
             $test_tt:
             paste::item! {
-                #[cfg(not(any(
+                #[cfg(not(
                     // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/210
-                    all(target_arch = "mips", target_endian = "big"),
-                    all(target_arch = "mips64", target_endian = "big"),
-                    target_arch = "sparc64",
-                    target_arch = "s390x",
-                )))]
+                    target_endian = "big"
+                ))]
                 pub mod [<$id _bitmask>] {
                     use super::*;
                     #[cfg_attr(not(target_arch = "wasm32"), test)]
diff --git a/vendor/packed_simd_2/src/api/cast.rs b/vendor/packed_simd/src/api/cast.rs
index f1c32ca1a..f1c32ca1a 100644
--- a/vendor/packed_simd_2/src/api/cast.rs
+++ b/vendor/packed_simd/src/api/cast.rs
diff --git a/vendor/packed_simd_2/src/api/cast/macros.rs b/vendor/packed_simd/src/api/cast/macros.rs
index 3bb29f0b8..3bb29f0b8 100644
--- a/vendor/packed_simd_2/src/api/cast/macros.rs
+++ b/vendor/packed_simd/src/api/cast/macros.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v128.rs b/vendor/packed_simd/src/api/cast/v128.rs
index 2e10b97b7..2e10b97b7 100644
--- a/vendor/packed_simd_2/src/api/cast/v128.rs
+++ b/vendor/packed_simd/src/api/cast/v128.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v16.rs b/vendor/packed_simd/src/api/cast/v16.rs
index 896febacb..896febacb 100644
--- a/vendor/packed_simd_2/src/api/cast/v16.rs
+++ b/vendor/packed_simd/src/api/cast/v16.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v256.rs b/vendor/packed_simd/src/api/cast/v256.rs
index fe0c835e3..fe0c835e3 100644
--- a/vendor/packed_simd_2/src/api/cast/v256.rs
+++ b/vendor/packed_simd/src/api/cast/v256.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v32.rs b/vendor/packed_simd/src/api/cast/v32.rs
index 4ad1cbf74..4ad1cbf74 100644
--- a/vendor/packed_simd_2/src/api/cast/v32.rs
+++ b/vendor/packed_simd/src/api/cast/v32.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v512.rs b/vendor/packed_simd/src/api/cast/v512.rs
index b64605045..b64605045 100644
--- a/vendor/packed_simd_2/src/api/cast/v512.rs
+++ b/vendor/packed_simd/src/api/cast/v512.rs
diff --git a/vendor/packed_simd_2/src/api/cast/v64.rs b/vendor/packed_simd/src/api/cast/v64.rs
index b23d1a491..b23d1a491 100644
--- a/vendor/packed_simd_2/src/api/cast/v64.rs
+++ b/vendor/packed_simd/src/api/cast/v64.rs
diff --git a/vendor/packed_simd_2/src/api/cmp.rs b/vendor/packed_simd/src/api/cmp.rs
index 6d5301ddd..6d5301ddd 100644
--- a/vendor/packed_simd_2/src/api/cmp.rs
+++ b/vendor/packed_simd/src/api/cmp.rs
diff --git a/vendor/packed_simd_2/src/api/cmp/eq.rs b/vendor/packed_simd/src/api/cmp/eq.rs
index 3c55d0dce..3c55d0dce 100644
--- a/vendor/packed_simd_2/src/api/cmp/eq.rs
+++ b/vendor/packed_simd/src/api/cmp/eq.rs
diff --git a/vendor/packed_simd_2/src/api/cmp/ord.rs b/vendor/packed_simd/src/api/cmp/ord.rs
index e54ba3bfd..e54ba3bfd 100644
--- a/vendor/packed_simd_2/src/api/cmp/ord.rs
+++ b/vendor/packed_simd/src/api/cmp/ord.rs
diff --git a/vendor/packed_simd_2/src/api/cmp/partial_eq.rs b/vendor/packed_simd/src/api/cmp/partial_eq.rs
index d69dd4742..d69dd4742 100644
--- a/vendor/packed_simd_2/src/api/cmp/partial_eq.rs
+++ b/vendor/packed_simd/src/api/cmp/partial_eq.rs
diff --git a/vendor/packed_simd_2/src/api/cmp/partial_ord.rs b/vendor/packed_simd/src/api/cmp/partial_ord.rs
index 76ed9ebe4..76ed9ebe4 100644
--- a/vendor/packed_simd_2/src/api/cmp/partial_ord.rs
+++ b/vendor/packed_simd/src/api/cmp/partial_ord.rs
diff --git a/vendor/packed_simd_2/src/api/cmp/vertical.rs b/vendor/packed_simd/src/api/cmp/vertical.rs
index ea4a0d1a3..ea4a0d1a3 100644
--- a/vendor/packed_simd_2/src/api/cmp/vertical.rs
+++ b/vendor/packed_simd/src/api/cmp/vertical.rs
diff --git a/vendor/packed_simd_2/src/api/default.rs b/vendor/packed_simd/src/api/default.rs
index 7af55ea77..7af55ea77 100644
--- a/vendor/packed_simd_2/src/api/default.rs
+++ b/vendor/packed_simd/src/api/default.rs
diff --git a/vendor/packed_simd_2/src/api/fmt.rs b/vendor/packed_simd/src/api/fmt.rs
index f3f55c401..f3f55c401 100644
--- a/vendor/packed_simd_2/src/api/fmt.rs
+++ b/vendor/packed_simd/src/api/fmt.rs
diff --git a/vendor/packed_simd_2/src/api/fmt/binary.rs b/vendor/packed_simd/src/api/fmt/binary.rs
index 91c082555..91c082555 100644
--- a/vendor/packed_simd_2/src/api/fmt/binary.rs
+++ b/vendor/packed_simd/src/api/fmt/binary.rs
diff --git a/vendor/packed_simd_2/src/api/fmt/debug.rs b/vendor/packed_simd/src/api/fmt/debug.rs
index 1e209b3bf..1e209b3bf 100644
--- a/vendor/packed_simd_2/src/api/fmt/debug.rs
+++ b/vendor/packed_simd/src/api/fmt/debug.rs
diff --git a/vendor/packed_simd_2/src/api/fmt/lower_hex.rs b/vendor/packed_simd/src/api/fmt/lower_hex.rs
index 8f11d3119..8f11d3119 100644
--- a/vendor/packed_simd_2/src/api/fmt/lower_hex.rs
+++ b/vendor/packed_simd/src/api/fmt/lower_hex.rs
diff --git a/vendor/packed_simd_2/src/api/fmt/octal.rs b/vendor/packed_simd/src/api/fmt/octal.rs
index e708e094c..e708e094c 100644
--- a/vendor/packed_simd_2/src/api/fmt/octal.rs
+++ b/vendor/packed_simd/src/api/fmt/octal.rs
diff --git a/vendor/packed_simd_2/src/api/fmt/upper_hex.rs b/vendor/packed_simd/src/api/fmt/upper_hex.rs
index 5ad455706..5ad455706 100644
--- a/vendor/packed_simd_2/src/api/fmt/upper_hex.rs
+++ b/vendor/packed_simd/src/api/fmt/upper_hex.rs
diff --git a/vendor/packed_simd_2/src/api/from.rs b/vendor/packed_simd/src/api/from.rs
index c30c4d6e2..c30c4d6e2 100644
--- a/vendor/packed_simd_2/src/api/from.rs
+++ b/vendor/packed_simd/src/api/from.rs
diff --git a/vendor/packed_simd_2/src/api/from/from_array.rs b/vendor/packed_simd/src/api/from/from_array.rs
index b83f93816..5c7801dda 100644
--- a/vendor/packed_simd_2/src/api/from/from_array.rs
+++ b/vendor/packed_simd/src/api/from/from_array.rs
@@ -61,6 +61,7 @@ macro_rules! impl_from_array {
                 mod [<$id _from>] {
                     use super::*;
                     #[test]
+                    #[cfg_attr(miri, ignore)]
                     fn array() {
                         let vec: $id = Default::default();
 
diff --git a/vendor/packed_simd_2/src/api/from/from_vector.rs b/vendor/packed_simd/src/api/from/from_vector.rs
index 55f70016d..55f70016d 100644
--- a/vendor/packed_simd_2/src/api/from/from_vector.rs
+++ b/vendor/packed_simd/src/api/from/from_vector.rs
diff --git a/vendor/packed_simd_2/src/api/hash.rs b/vendor/packed_simd/src/api/hash.rs
index ee80eff93..ee80eff93 100644
--- a/vendor/packed_simd_2/src/api/hash.rs
+++ b/vendor/packed_simd/src/api/hash.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits.rs b/vendor/packed_simd/src/api/into_bits.rs
index 32b6d2ddc..03fbe4bff 100644
--- a/vendor/packed_simd_2/src/api/into_bits.rs
+++ b/vendor/packed_simd/src/api/into_bits.rs
@@ -1,12 +1,14 @@
 //! Implementation of `FromBits` and `IntoBits`.
 
 /// Safe lossless bitwise conversion from `T` to `Self`.
+#[cfg_attr(doc_cfg, doc(cfg(feature = "into_bits")))]
 pub trait FromBits<T>: crate::marker::Sized {
     /// Safe lossless bitwise transmute from `T` to `Self`.
     fn from_bits(t: T) -> Self;
 }
 
 /// Safe lossless bitwise conversion from `Self` to `T`.
+#[cfg_attr(doc_cfg, doc(cfg(feature = "into_bits")))]
 pub trait IntoBits<T>: crate::marker::Sized {
     /// Safe lossless bitwise transmute from `self` to `T`.
     fn into_bits(self) -> T;
diff --git a/vendor/packed_simd_2/src/api/into_bits/arch_specific.rs b/vendor/packed_simd/src/api/into_bits/arch_specific.rs
index bfac91557..bfac91557 100644
--- a/vendor/packed_simd_2/src/api/into_bits/arch_specific.rs
+++ b/vendor/packed_simd/src/api/into_bits/arch_specific.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/macros.rs b/vendor/packed_simd/src/api/into_bits/macros.rs
index 265ab34ae..265ab34ae 100644
--- a/vendor/packed_simd_2/src/api/into_bits/macros.rs
+++ b/vendor/packed_simd/src/api/into_bits/macros.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v128.rs b/vendor/packed_simd/src/api/into_bits/v128.rs
index 639c09c2c..639c09c2c 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v128.rs
+++ b/vendor/packed_simd/src/api/into_bits/v128.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v16.rs b/vendor/packed_simd/src/api/into_bits/v16.rs
index e44d0e7f9..e44d0e7f9 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v16.rs
+++ b/vendor/packed_simd/src/api/into_bits/v16.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v256.rs b/vendor/packed_simd/src/api/into_bits/v256.rs
index e432bbbc9..e432bbbc9 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v256.rs
+++ b/vendor/packed_simd/src/api/into_bits/v256.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v32.rs b/vendor/packed_simd/src/api/into_bits/v32.rs
index 5dba38a17..5dba38a17 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v32.rs
+++ b/vendor/packed_simd/src/api/into_bits/v32.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v512.rs b/vendor/packed_simd/src/api/into_bits/v512.rs
index f6e9bb8bf..f6e9bb8bf 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v512.rs
+++ b/vendor/packed_simd/src/api/into_bits/v512.rs
diff --git a/vendor/packed_simd_2/src/api/into_bits/v64.rs b/vendor/packed_simd/src/api/into_bits/v64.rs
index 5b065f1bd..5b065f1bd 100644
--- a/vendor/packed_simd_2/src/api/into_bits/v64.rs
+++ b/vendor/packed_simd/src/api/into_bits/v64.rs
diff --git a/vendor/packed_simd_2/src/api/math.rs b/vendor/packed_simd/src/api/math.rs
index e7a8d256b..e7a8d256b 100644
--- a/vendor/packed_simd_2/src/api/math.rs
+++ b/vendor/packed_simd/src/api/math.rs
diff --git a/vendor/packed_simd_2/src/api/math/float.rs b/vendor/packed_simd/src/api/math/float.rs
index d5d2bee2e..d5d2bee2e 100644
--- a/vendor/packed_simd_2/src/api/math/float.rs
+++ b/vendor/packed_simd/src/api/math/float.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/abs.rs b/vendor/packed_simd/src/api/math/float/abs.rs
index 1865bdb68..1865bdb68 100644
--- a/vendor/packed_simd_2/src/api/math/float/abs.rs
+++ b/vendor/packed_simd/src/api/math/float/abs.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/consts.rs b/vendor/packed_simd/src/api/math/float/consts.rs
index 7f41acbf1..7f41acbf1 100644
--- a/vendor/packed_simd_2/src/api/math/float/consts.rs
+++ b/vendor/packed_simd/src/api/math/float/consts.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/cos.rs b/vendor/packed_simd/src/api/math/float/cos.rs
index e5b8f4603..e5b8f4603 100644
--- a/vendor/packed_simd_2/src/api/math/float/cos.rs
+++ b/vendor/packed_simd/src/api/math/float/cos.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/exp.rs b/vendor/packed_simd/src/api/math/float/exp.rs
index e3356d853..e3356d853 100644
--- a/vendor/packed_simd_2/src/api/math/float/exp.rs
+++ b/vendor/packed_simd/src/api/math/float/exp.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/ln.rs b/vendor/packed_simd/src/api/math/float/ln.rs
index 5ceb9173a..5ceb9173a 100644
--- a/vendor/packed_simd_2/src/api/math/float/ln.rs
+++ b/vendor/packed_simd/src/api/math/float/ln.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/mul_add.rs b/vendor/packed_simd/src/api/math/float/mul_add.rs
index 4b170ee2b..4b170ee2b 100644
--- a/vendor/packed_simd_2/src/api/math/float/mul_add.rs
+++ b/vendor/packed_simd/src/api/math/float/mul_add.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/mul_adde.rs b/vendor/packed_simd/src/api/math/float/mul_adde.rs
index c5b27110f..c5b27110f 100644
--- a/vendor/packed_simd_2/src/api/math/float/mul_adde.rs
+++ b/vendor/packed_simd/src/api/math/float/mul_adde.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/powf.rs b/vendor/packed_simd/src/api/math/float/powf.rs
index 83dc9ff9c..83dc9ff9c 100644
--- a/vendor/packed_simd_2/src/api/math/float/powf.rs
+++ b/vendor/packed_simd/src/api/math/float/powf.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/recpre.rs b/vendor/packed_simd/src/api/math/float/recpre.rs
index 127f0b2ff..127f0b2ff 100644
--- a/vendor/packed_simd_2/src/api/math/float/recpre.rs
+++ b/vendor/packed_simd/src/api/math/float/recpre.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/rsqrte.rs b/vendor/packed_simd/src/api/math/float/rsqrte.rs
index c77977f7b..c77977f7b 100644
--- a/vendor/packed_simd_2/src/api/math/float/rsqrte.rs
+++ b/vendor/packed_simd/src/api/math/float/rsqrte.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/sin.rs b/vendor/packed_simd/src/api/math/float/sin.rs
index 49908319b..49908319b 100644
--- a/vendor/packed_simd_2/src/api/math/float/sin.rs
+++ b/vendor/packed_simd/src/api/math/float/sin.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/sqrt.rs b/vendor/packed_simd/src/api/math/float/sqrt.rs
index ae624122d..ae624122d 100644
--- a/vendor/packed_simd_2/src/api/math/float/sqrt.rs
+++ b/vendor/packed_simd/src/api/math/float/sqrt.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/sqrte.rs b/vendor/packed_simd/src/api/math/float/sqrte.rs
index f7ffad748..f7ffad748 100644
--- a/vendor/packed_simd_2/src/api/math/float/sqrte.rs
+++ b/vendor/packed_simd/src/api/math/float/sqrte.rs
diff --git a/vendor/packed_simd_2/src/api/math/float/tanh.rs b/vendor/packed_simd/src/api/math/float/tanh.rs
index acfd93caa..acfd93caa 100644
--- a/vendor/packed_simd_2/src/api/math/float/tanh.rs
+++ b/vendor/packed_simd/src/api/math/float/tanh.rs
diff --git a/vendor/packed_simd_2/src/api/minimal.rs b/vendor/packed_simd/src/api/minimal.rs
index 840d9e325..840d9e325 100644
--- a/vendor/packed_simd_2/src/api/minimal.rs
+++ b/vendor/packed_simd/src/api/minimal.rs
diff --git a/vendor/packed_simd_2/src/api/minimal/iuf.rs b/vendor/packed_simd/src/api/minimal/iuf.rs
index a155ac178..a155ac178 100644
--- a/vendor/packed_simd_2/src/api/minimal/iuf.rs
+++ b/vendor/packed_simd/src/api/minimal/iuf.rs
diff --git a/vendor/packed_simd_2/src/api/minimal/mask.rs b/vendor/packed_simd/src/api/minimal/mask.rs
index a420060b4..a420060b4 100644
--- a/vendor/packed_simd_2/src/api/minimal/mask.rs
+++ b/vendor/packed_simd/src/api/minimal/mask.rs
diff --git a/vendor/packed_simd_2/src/api/minimal/ptr.rs b/vendor/packed_simd/src/api/minimal/ptr.rs
index c3d61fbf6..d9e47c9cc 100644
--- a/vendor/packed_simd_2/src/api/minimal/ptr.rs
+++ b/vendor/packed_simd/src/api/minimal/ptr.rs
@@ -583,7 +583,7 @@ macro_rules! impl_minimal_p {
             pub fn from_slice_aligned(slice: &[$elem_ty]) -> Self {
                 unsafe {
                     assert!(slice.len() >= $elem_count);
-                    let target_ptr = slice.get_unchecked(0) as *const $elem_ty;
+                    let target_ptr = slice.as_ptr();
                     assert!(
                         target_ptr.align_offset(crate::mem::align_of::<Self>())
                             == 0
@@ -615,7 +615,7 @@ macro_rules! impl_minimal_p {
             pub unsafe fn from_slice_aligned_unchecked(slice: &[$elem_ty])
                                                        -> Self {
                 #[allow(clippy::cast_ptr_alignment)]
-                *(slice.get_unchecked(0) as *const $elem_ty as *const Self)
+                *(slice.as_ptr().cast())
             }
 
             /// Instantiates a new vector with the values of the `slice`.
@@ -628,8 +628,7 @@ macro_rules! impl_minimal_p {
                 slice: &[$elem_ty],
             ) -> Self {
                 use crate::mem::size_of;
-                let target_ptr =
-                    slice.get_unchecked(0) as *const $elem_ty as *const u8;
+                let target_ptr = slice.as_ptr().cast();
                 let mut x = Self::splat(crate::ptr::null_mut() as $elem_ty);
                 let self_ptr = &mut x as *mut Self as *mut u8;
                 crate::ptr::copy_nonoverlapping(
@@ -798,8 +797,7 @@ macro_rules! impl_minimal_p {
             pub fn write_to_slice_aligned(self, slice: &mut [$elem_ty]) {
                 unsafe {
                     assert!(slice.len() >= $elem_count);
-                    let target_ptr =
-                        slice.get_unchecked_mut(0) as *mut $elem_ty;
+                    let target_ptr = slice.as_mut_ptr();
                     assert!(
                         target_ptr.align_offset(crate::mem::align_of::<Self>())
                             == 0
@@ -833,8 +831,7 @@ macro_rules! impl_minimal_p {
                 self, slice: &mut [$elem_ty],
             ) {
                 #[allow(clippy::cast_ptr_alignment)]
-                *(slice.get_unchecked_mut(0) as *mut $elem_ty as *mut Self) =
-                    self;
+                *(slice.as_mut_ptr().cast()) = self;
             }
 
             /// Writes the values of the vector to the `slice`.
@@ -846,8 +843,7 @@ macro_rules! impl_minimal_p {
             pub unsafe fn write_to_slice_unaligned_unchecked(
                 self, slice: &mut [$elem_ty],
             ) {
-                let target_ptr =
-                    slice.get_unchecked_mut(0) as *mut $elem_ty as *mut u8;
+                let target_ptr = slice.as_mut_ptr().cast();
                 let self_ptr = &self as *const Self as *const u8;
                 crate::ptr::copy_nonoverlapping(
                     self_ptr,
diff --git a/vendor/packed_simd_2/src/api/ops.rs b/vendor/packed_simd/src/api/ops.rs
index f71c98795..f71c98795 100644
--- a/vendor/packed_simd_2/src/api/ops.rs
+++ b/vendor/packed_simd/src/api/ops.rs
diff --git a/vendor/packed_simd_2/src/api/ops/scalar_arithmetic.rs b/vendor/packed_simd/src/api/ops/scalar_arithmetic.rs
index da1a2037e..da1a2037e 100644
--- a/vendor/packed_simd_2/src/api/ops/scalar_arithmetic.rs
+++ b/vendor/packed_simd/src/api/ops/scalar_arithmetic.rs
diff --git a/vendor/packed_simd_2/src/api/ops/scalar_bitwise.rs b/vendor/packed_simd/src/api/ops/scalar_bitwise.rs
index 88216769a..88216769a 100644
--- a/vendor/packed_simd_2/src/api/ops/scalar_bitwise.rs
+++ b/vendor/packed_simd/src/api/ops/scalar_bitwise.rs
diff --git a/vendor/packed_simd_2/src/api/ops/scalar_mask_bitwise.rs b/vendor/packed_simd/src/api/ops/scalar_mask_bitwise.rs
index 523a85207..523a85207 100644
--- a/vendor/packed_simd_2/src/api/ops/scalar_mask_bitwise.rs
+++ b/vendor/packed_simd/src/api/ops/scalar_mask_bitwise.rs
diff --git a/vendor/packed_simd_2/src/api/ops/scalar_shifts.rs b/vendor/packed_simd/src/api/ops/scalar_shifts.rs
index 4a7a09626..4a7a09626 100644
--- a/vendor/packed_simd_2/src/api/ops/scalar_shifts.rs
+++ b/vendor/packed_simd/src/api/ops/scalar_shifts.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_arithmetic.rs b/vendor/packed_simd/src/api/ops/vector_arithmetic.rs
index 7057f52d0..7057f52d0 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_arithmetic.rs
+++ b/vendor/packed_simd/src/api/ops/vector_arithmetic.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_bitwise.rs b/vendor/packed_simd/src/api/ops/vector_bitwise.rs
index 7be9603fa..7be9603fa 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_bitwise.rs
+++ b/vendor/packed_simd/src/api/ops/vector_bitwise.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_float_min_max.rs b/vendor/packed_simd/src/api/ops/vector_float_min_max.rs
index 8310667b7..8310667b7 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_float_min_max.rs
+++ b/vendor/packed_simd/src/api/ops/vector_float_min_max.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_int_min_max.rs b/vendor/packed_simd/src/api/ops/vector_int_min_max.rs
index 36ea98e6b..36ea98e6b 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_int_min_max.rs
+++ b/vendor/packed_simd/src/api/ops/vector_int_min_max.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_mask_bitwise.rs b/vendor/packed_simd/src/api/ops/vector_mask_bitwise.rs
index 295fc1ca8..295fc1ca8 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_mask_bitwise.rs
+++ b/vendor/packed_simd/src/api/ops/vector_mask_bitwise.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_neg.rs b/vendor/packed_simd/src/api/ops/vector_neg.rs
index e2d91fd2f..e2d91fd2f 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_neg.rs
+++ b/vendor/packed_simd/src/api/ops/vector_neg.rs
diff --git a/vendor/packed_simd_2/src/api/ops/vector_rotates.rs b/vendor/packed_simd/src/api/ops/vector_rotates.rs
index 147fc2e37..6c4bed72a 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_rotates.rs
+++ b/vendor/packed_simd/src/api/ops/vector_rotates.rs
@@ -23,8 +23,8 @@ macro_rules! impl_ops_vector_rotates {
             /// amount in the corresponding lane of `n`, wrapping the
             /// truncated bits to the beginning of the resulting integer.
             ///
-            /// Note: this is neither the same operation as `<<` nor equivalent
-            /// to `slice::rotate_left`.
+            /// Note: this is neither the same operation as `>>` nor equivalent
+            /// to `slice::rotate_right`.
             #[inline]
             pub fn rotate_right(self, n: $id) -> $id {
                 const LANE_WIDTH: $elem_ty =
diff --git a/vendor/packed_simd_2/src/api/ops/vector_shifts.rs b/vendor/packed_simd/src/api/ops/vector_shifts.rs
index 8bb5ac2fc..8bb5ac2fc 100644
--- a/vendor/packed_simd_2/src/api/ops/vector_shifts.rs
+++ b/vendor/packed_simd/src/api/ops/vector_shifts.rs
diff --git a/vendor/packed_simd_2/src/api/ptr.rs b/vendor/packed_simd/src/api/ptr.rs
index d2e523a49..d2e523a49 100644
--- a/vendor/packed_simd_2/src/api/ptr.rs
+++ b/vendor/packed_simd/src/api/ptr.rs
diff --git a/vendor/packed_simd_2/src/api/ptr/gather_scatter.rs b/vendor/packed_simd/src/api/ptr/gather_scatter.rs
index 374482ac3..374482ac3 100644
--- a/vendor/packed_simd_2/src/api/ptr/gather_scatter.rs
+++ b/vendor/packed_simd/src/api/ptr/gather_scatter.rs
diff --git a/vendor/packed_simd_2/src/api/reductions.rs b/vendor/packed_simd/src/api/reductions.rs
index 54d2f0cc7..54d2f0cc7 100644
--- a/vendor/packed_simd_2/src/api/reductions.rs
+++ b/vendor/packed_simd/src/api/reductions.rs
diff --git a/vendor/packed_simd_2/src/api/reductions/bitwise.rs b/vendor/packed_simd/src/api/reductions/bitwise.rs
index 5bad4f474..5bad4f474 100644
--- a/vendor/packed_simd_2/src/api/reductions/bitwise.rs
+++ b/vendor/packed_simd/src/api/reductions/bitwise.rs
diff --git a/vendor/packed_simd_2/src/api/reductions/float_arithmetic.rs b/vendor/packed_simd/src/api/reductions/float_arithmetic.rs
index 9dc8783db..9dc8783db 100644
--- a/vendor/packed_simd_2/src/api/reductions/float_arithmetic.rs
+++ b/vendor/packed_simd/src/api/reductions/float_arithmetic.rs
diff --git a/vendor/packed_simd_2/src/api/reductions/integer_arithmetic.rs b/vendor/packed_simd/src/api/reductions/integer_arithmetic.rs
index e99e6cb5d..e99e6cb5d 100644
--- a/vendor/packed_simd_2/src/api/reductions/integer_arithmetic.rs
+++ b/vendor/packed_simd/src/api/reductions/integer_arithmetic.rs
diff --git a/vendor/packed_simd_2/src/api/reductions/mask.rs b/vendor/packed_simd/src/api/reductions/mask.rs
index 0dd6a84e7..0dd6a84e7 100644
--- a/vendor/packed_simd_2/src/api/reductions/mask.rs
+++ b/vendor/packed_simd/src/api/reductions/mask.rs
diff --git a/vendor/packed_simd_2/src/api/reductions/min_max.rs b/vendor/packed_simd/src/api/reductions/min_max.rs
index a3ce13a45..a3ce13a45 100644
--- a/vendor/packed_simd_2/src/api/reductions/min_max.rs
+++ b/vendor/packed_simd/src/api/reductions/min_max.rs
diff --git a/vendor/packed_simd_2/src/api/select.rs b/vendor/packed_simd/src/api/select.rs
index daf629472..daf629472 100644
--- a/vendor/packed_simd_2/src/api/select.rs
+++ b/vendor/packed_simd/src/api/select.rs
diff --git a/vendor/packed_simd_2/src/api/shuffle.rs b/vendor/packed_simd/src/api/shuffle.rs
index fda29ccdd..1c17bd766 100644
--- a/vendor/packed_simd_2/src/api/shuffle.rs
+++ b/vendor/packed_simd/src/api/shuffle.rs
@@ -27,7 +27,7 @@
 /// Shuffling elements of two vectors:
 ///
 /// ```
-/// # use packed_simd_2::*;
+/// # use packed_simd::*;
 /// # fn main() {
 /// // Shuffle allows reordering the elements:
 /// let x = i32x4::new(1, 2, 3, 4);
@@ -49,7 +49,7 @@
 /// Shuffling elements of one vector:
 ///
 /// ```
-/// # use packed_simd_2::*;
+/// # use packed_simd::*;
 /// # fn main() {
 /// // Shuffle allows reordering the elements of a vector:
 /// let x = i32x4::new(1, 2, 3, 4);
diff --git a/vendor/packed_simd_2/src/api/shuffle1_dyn.rs b/vendor/packed_simd/src/api/shuffle1_dyn.rs
index 64536be6c..64536be6c 100644
--- a/vendor/packed_simd_2/src/api/shuffle1_dyn.rs
+++ b/vendor/packed_simd/src/api/shuffle1_dyn.rs
diff --git a/vendor/packed_simd_2/src/api/slice.rs b/vendor/packed_simd/src/api/slice.rs
index 526b848b5..526b848b5 100644
--- a/vendor/packed_simd_2/src/api/slice.rs
+++ b/vendor/packed_simd/src/api/slice.rs
diff --git a/vendor/packed_simd_2/src/api/slice/from_slice.rs b/vendor/packed_simd/src/api/slice/from_slice.rs
index 50f3914f7..cafd6f821 100644
--- a/vendor/packed_simd_2/src/api/slice/from_slice.rs
+++ b/vendor/packed_simd/src/api/slice/from_slice.rs
@@ -13,7 +13,7 @@ macro_rules! impl_slice_from_slice {
             pub fn from_slice_aligned(slice: &[$elem_ty]) -> Self {
                 unsafe {
                     assert!(slice.len() >= $elem_count);
-                    let target_ptr = slice.get_unchecked(0) as *const $elem_ty;
+                    let target_ptr = slice.as_ptr();
                     assert_eq!(target_ptr.align_offset(crate::mem::align_of::<Self>()), 0);
                     Self::from_slice_aligned_unchecked(slice)
                 }
@@ -41,7 +41,7 @@ macro_rules! impl_slice_from_slice {
             #[inline]
             pub unsafe fn from_slice_aligned_unchecked(slice: &[$elem_ty]) -> Self {
                 debug_assert!(slice.len() >= $elem_count);
-                let target_ptr = slice.get_unchecked(0) as *const $elem_ty;
+                let target_ptr = slice.as_ptr();
                 debug_assert_eq!(target_ptr.align_offset(crate::mem::align_of::<Self>()), 0);
 
                 #[allow(clippy::cast_ptr_alignment)]
@@ -57,7 +57,7 @@ macro_rules! impl_slice_from_slice {
             pub unsafe fn from_slice_unaligned_unchecked(slice: &[$elem_ty]) -> Self {
                 use crate::mem::size_of;
                 debug_assert!(slice.len() >= $elem_count);
-                let target_ptr = slice.get_unchecked(0) as *const $elem_ty as *const u8;
+                let target_ptr = slice.as_ptr().cast();
                 let mut x = Self::splat(0 as $elem_ty);
                 let self_ptr = &mut x as *mut Self as *mut u8;
                 crate::ptr::copy_nonoverlapping(target_ptr, self_ptr, size_of::<Self>());
diff --git a/vendor/packed_simd_2/src/api/slice/write_to_slice.rs b/vendor/packed_simd/src/api/slice/write_to_slice.rs
index dd04a2634..5abd4916e 100644
--- a/vendor/packed_simd_2/src/api/slice/write_to_slice.rs
+++ b/vendor/packed_simd/src/api/slice/write_to_slice.rs
@@ -13,7 +13,7 @@ macro_rules! impl_slice_write_to_slice {
             pub fn write_to_slice_aligned(self, slice: &mut [$elem_ty]) {
                 unsafe {
                     assert!(slice.len() >= $elem_count);
-                    let target_ptr = slice.get_unchecked_mut(0) as *mut $elem_ty;
+                    let target_ptr = slice.as_mut_ptr();
                     assert_eq!(target_ptr.align_offset(crate::mem::align_of::<Self>()), 0);
                     self.write_to_slice_aligned_unchecked(slice);
                 }
@@ -42,7 +42,7 @@ macro_rules! impl_slice_write_to_slice {
             #[inline]
             pub unsafe fn write_to_slice_aligned_unchecked(self, slice: &mut [$elem_ty]) {
                 debug_assert!(slice.len() >= $elem_count);
-                let target_ptr = slice.get_unchecked_mut(0) as *mut $elem_ty;
+                let target_ptr = slice.as_mut_ptr();
                 debug_assert_eq!(target_ptr.align_offset(crate::mem::align_of::<Self>()), 0);
 
                 #[allow(clippy::cast_ptr_alignment)]
@@ -60,7 +60,7 @@ macro_rules! impl_slice_write_to_slice {
             #[inline]
             pub unsafe fn write_to_slice_unaligned_unchecked(self, slice: &mut [$elem_ty]) {
                 debug_assert!(slice.len() >= $elem_count);
-                let target_ptr = slice.get_unchecked_mut(0) as *mut $elem_ty as *mut u8;
+                let target_ptr = slice.as_mut_ptr().cast();
                 let self_ptr = &self as *const Self as *const u8;
                 crate::ptr::copy_nonoverlapping(self_ptr, target_ptr, crate::mem::size_of::<Self>());
             }
diff --git a/vendor/packed_simd_2/src/api/swap_bytes.rs b/vendor/packed_simd/src/api/swap_bytes.rs
index 53bba25bd..4649ed679 100644
--- a/vendor/packed_simd_2/src/api/swap_bytes.rs
+++ b/vendor/packed_simd/src/api/swap_bytes.rs
@@ -76,7 +76,7 @@ macro_rules! impl_swap_bytes {
 
         test_if! {
             $test_tt:
-            paste::item_with_macros! {
+            paste::item! {
                 pub mod [<$id _swap_bytes>] {
                     use super::*;
 
diff --git a/vendor/packed_simd_2/src/codegen.rs b/vendor/packed_simd/src/codegen.rs
index 8a9e97148..8a9e97148 100644
--- a/vendor/packed_simd_2/src/codegen.rs
+++ b/vendor/packed_simd/src/codegen.rs
diff --git a/vendor/packed_simd_2/src/codegen/bit_manip.rs b/vendor/packed_simd/src/codegen/bit_manip.rs
index 32d8d717a..32d8d717a 100644
--- a/vendor/packed_simd_2/src/codegen/bit_manip.rs
+++ b/vendor/packed_simd/src/codegen/bit_manip.rs
diff --git a/vendor/packed_simd/src/codegen/llvm.rs b/vendor/packed_simd/src/codegen/llvm.rs
new file mode 100644
index 000000000..bb482fac6
--- /dev/null
+++ b/vendor/packed_simd/src/codegen/llvm.rs
@@ -0,0 +1,122 @@
+//! LLVM's platform intrinsics
+#![allow(dead_code)]
+
+use crate::sealed::Shuffle;
+#[allow(unused_imports)] // FIXME: spurious warning?
+use crate::sealed::Simd;
+
+extern "platform-intrinsic" {
+    fn simd_shuffle<T, I, U>(x: T, y: T, idx: I) -> U;
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector2<const IDX: [u32; 2], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 2], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector4<const IDX: [u32; 4], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 4], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector8<const IDX: [u32; 8], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 8], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector16<const IDX: [u32; 16], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 16], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector32<const IDX: [u32; 32], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 32], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+#[allow(clippy::missing_safety_doc)]
+#[inline]
+pub unsafe fn __shuffle_vector64<const IDX: [u32; 64], T, U>(x: T, y: T) -> U
+where
+    T: Simd,
+    <T as Simd>::Element: Shuffle<[u32; 64], Output = U>,
+{
+    simd_shuffle(x, y, IDX)
+}
+
+extern "platform-intrinsic" {
+    pub(crate) fn simd_eq<T, U>(x: T, y: T) -> U;
+    pub(crate) fn simd_ne<T, U>(x: T, y: T) -> U;
+    pub(crate) fn simd_lt<T, U>(x: T, y: T) -> U;
+    pub(crate) fn simd_le<T, U>(x: T, y: T) -> U;
+    pub(crate) fn simd_gt<T, U>(x: T, y: T) -> U;
+    pub(crate) fn simd_ge<T, U>(x: T, y: T) -> U;
+
+    pub(crate) fn simd_insert<T, U>(x: T, idx: u32, val: U) -> T;
+    pub(crate) fn simd_extract<T, U>(x: T, idx: u32) -> U;
+
+    pub(crate) fn simd_cast<T, U>(x: T) -> U;
+
+    pub(crate) fn simd_add<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_sub<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_mul<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_div<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_rem<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_shl<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_shr<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_and<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_or<T>(x: T, y: T) -> T;
+    pub(crate) fn simd_xor<T>(x: T, y: T) -> T;
+
+    pub(crate) fn simd_reduce_add_unordered<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_mul_unordered<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_add_ordered<T, U>(x: T, acc: U) -> U;
+    pub(crate) fn simd_reduce_mul_ordered<T, U>(x: T, acc: U) -> U;
+    pub(crate) fn simd_reduce_min<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_max<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_min_nanless<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_max_nanless<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_and<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_or<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_xor<T, U>(x: T) -> U;
+    pub(crate) fn simd_reduce_all<T>(x: T) -> bool;
+    pub(crate) fn simd_reduce_any<T>(x: T) -> bool;
+
+    pub(crate) fn simd_select<M, T>(m: M, a: T, b: T) -> T;
+
+    pub(crate) fn simd_fmin<T>(a: T, b: T) -> T;
+    pub(crate) fn simd_fmax<T>(a: T, b: T) -> T;
+
+    pub(crate) fn simd_fsqrt<T>(a: T) -> T;
+    pub(crate) fn simd_fma<T>(a: T, b: T, c: T) -> T;
+
+    pub(crate) fn simd_gather<T, P, M>(value: T, pointers: P, mask: M) -> T;
+    pub(crate) fn simd_scatter<T, P, M>(value: T, pointers: P, mask: M);
+
+    pub(crate) fn simd_bitmask<T, U>(value: T) -> U;
+}
diff --git a/vendor/packed_simd_2/src/codegen/math.rs b/vendor/packed_simd/src/codegen/math.rs
index 9a0ea7a4e..9a0ea7a4e 100644
--- a/vendor/packed_simd_2/src/codegen/math.rs
+++ b/vendor/packed_simd/src/codegen/math.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float.rs b/vendor/packed_simd/src/codegen/math/float.rs
index 10d21831f..10d21831f 100644
--- a/vendor/packed_simd_2/src/codegen/math/float.rs
+++ b/vendor/packed_simd/src/codegen/math/float.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/abs.rs b/vendor/packed_simd/src/codegen/math/float/abs.rs
index 34aacc25b..34aacc25b 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/abs.rs
+++ b/vendor/packed_simd/src/codegen/math/float/abs.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/cos.rs b/vendor/packed_simd/src/codegen/math/float/cos.rs
index dec390cb7..dec390cb7 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/cos.rs
+++ b/vendor/packed_simd/src/codegen/math/float/cos.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/cos_pi.rs b/vendor/packed_simd/src/codegen/math/float/cos_pi.rs
index e283280ee..e283280ee 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/cos_pi.rs
+++ b/vendor/packed_simd/src/codegen/math/float/cos_pi.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/exp.rs b/vendor/packed_simd/src/codegen/math/float/exp.rs
index a7b20580e..a7b20580e 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/exp.rs
+++ b/vendor/packed_simd/src/codegen/math/float/exp.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/ln.rs b/vendor/packed_simd/src/codegen/math/float/ln.rs
index a5e38cb40..a5e38cb40 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/ln.rs
+++ b/vendor/packed_simd/src/codegen/math/float/ln.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/macros.rs b/vendor/packed_simd/src/codegen/math/float/macros.rs
index 8daee1afe..8daee1afe 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/macros.rs
+++ b/vendor/packed_simd/src/codegen/math/float/macros.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/mul_add.rs b/vendor/packed_simd/src/codegen/math/float/mul_add.rs
index d37f30fa8..d37f30fa8 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/mul_add.rs
+++ b/vendor/packed_simd/src/codegen/math/float/mul_add.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/mul_adde.rs b/vendor/packed_simd/src/codegen/math/float/mul_adde.rs
index c0baeacec..c0baeacec 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/mul_adde.rs
+++ b/vendor/packed_simd/src/codegen/math/float/mul_adde.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/powf.rs b/vendor/packed_simd/src/codegen/math/float/powf.rs
index 89ca52e96..89ca52e96 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/powf.rs
+++ b/vendor/packed_simd/src/codegen/math/float/powf.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/sin.rs b/vendor/packed_simd/src/codegen/math/float/sin.rs
index d88141590..d88141590 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/sin.rs
+++ b/vendor/packed_simd/src/codegen/math/float/sin.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/sin_cos_pi.rs b/vendor/packed_simd/src/codegen/math/float/sin_cos_pi.rs
index b283d1111..b283d1111 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/sin_cos_pi.rs
+++ b/vendor/packed_simd/src/codegen/math/float/sin_cos_pi.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/sin_pi.rs b/vendor/packed_simd/src/codegen/math/float/sin_pi.rs
index 0c8f6bb12..0c8f6bb12 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/sin_pi.rs
+++ b/vendor/packed_simd/src/codegen/math/float/sin_pi.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/sqrt.rs b/vendor/packed_simd/src/codegen/math/float/sqrt.rs
index 67bb0a2a9..67bb0a2a9 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/sqrt.rs
+++ b/vendor/packed_simd/src/codegen/math/float/sqrt.rs
diff --git a/vendor/packed_simd_2/src/codegen/math/float/sqrte.rs b/vendor/packed_simd/src/codegen/math/float/sqrte.rs
index 58a1de1f4..58a1de1f4 100644
--- a/vendor/packed_simd_2/src/codegen/math/float/sqrte.rs
+++ b/vendor/packed_simd/src/codegen/math/float/sqrte.rs
diff --git a/vendor/packed_simd/src/codegen/math/float/tanh.rs b/vendor/packed_simd/src/codegen/math/float/tanh.rs
new file mode 100644
index 000000000..4243b0d88
--- /dev/null
+++ b/vendor/packed_simd/src/codegen/math/float/tanh.rs
@@ -0,0 +1,120 @@
+//! Vertical floating-point `tanh`
+#![allow(unused)]
+
+// FIXME 64-bit 1 elem vectors tanh
+
+#[cfg(not(feature = "std"))]
+use num_traits::Float;
+
+use crate::*;
+
+pub(crate) trait Tanh {
+    fn tanh(self) -> Self;
+}
+
+macro_rules! define_tanh {
+    ($name:ident, $basetype:ty, $simdtype:ty, $lanes:expr, $trait:path) => {
+        fn $name(x: $simdtype) -> $simdtype {
+            use core::intrinsics::transmute;
+            let mut buf: [$basetype; $lanes] = unsafe { transmute(x) };
+            for elem in &mut buf {
+                *elem = <$basetype as $trait>::tanh(*elem);
+            }
+            unsafe { transmute(buf) }
+        }
+    };
+
+    (f32 => $name:ident, $type:ty, $lanes:expr) => {
+        define_tanh!($name, f32, $type, $lanes, Float);
+    };
+
+    (f64 => $name:ident, $type:ty, $lanes:expr) => {
+        define_tanh!($name, f64, $type, $lanes, Float);
+    };
+}
+
+// llvm does not seem to expose the hyperbolic versions of trigonometric
+// functions; we thus call the classical rust versions on all of them (which
+// stem from cmath).
+define_tanh!(f32 => tanh_v2f32, f32x2, 2);
+define_tanh!(f32 => tanh_v4f32, f32x4, 4);
+define_tanh!(f32 => tanh_v8f32, f32x8, 8);
+define_tanh!(f32 => tanh_v16f32, f32x16, 16);
+
+define_tanh!(f64 => tanh_v2f64, f64x2, 2);
+define_tanh!(f64 => tanh_v4f64, f64x4, 4);
+define_tanh!(f64 => tanh_v8f64, f64x8, 8);
+
+fn tanh_f32(x: f32) -> f32 {
+    Float::tanh(x)
+}
+
+fn tanh_f64(x: f64) -> f64 {
+    Float::tanh(x)
+}
+
+gen_unary_impl_table!(Tanh, tanh);
+
+cfg_if! {
+    if #[cfg(target_arch = "s390x")] {
+        // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/14
+        impl_unary!(f32x2[f32; 2]: tanh_f32);
+        impl_unary!(f32x4[f32; 4]: tanh_f32);
+        impl_unary!(f32x8[f32; 8]: tanh_f32);
+        impl_unary!(f32x16[f32; 16]: tanh_f32);
+
+        impl_unary!(f64x2[f64; 2]: tanh_f64);
+        impl_unary!(f64x4[f64; 4]: tanh_f64);
+        impl_unary!(f64x8[f64; 8]: tanh_f64);
+    } else if #[cfg(all(target_arch = "x86_64", feature = "sleef-sys"))] {
+        use sleef_sys::*;
+        cfg_if! {
+            if #[cfg(target_feature = "avx2")] {
+                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10avx2128);
+                impl_unary!(f32x16[h => f32x8]: Sleef_tanhf8_u10avx2);
+                impl_unary!(f64x8[h => f64x4]: Sleef_tanhd4_u10avx2);
+
+                impl_unary!(f32x4: Sleef_tanhf4_u10avx2128);
+                impl_unary!(f32x8: Sleef_tanhf8_u10avx2);
+                impl_unary!(f64x2: Sleef_tanhd2_u10avx2128);
+                impl_unary!(f64x4: Sleef_tanhd4_u10avx2);
+            } else if #[cfg(target_feature = "avx")] {
+                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10sse4);
+                impl_unary!(f32x16[h => f32x8]: Sleef_tanhf8_u10avx);
+                impl_unary!(f64x8[h => f64x4]: Sleef_tanhd4_u10avx);
+
+                impl_unary!(f32x4: Sleef_tanhf4_u10sse4);
+                impl_unary!(f32x8: Sleef_tanhf8_u10avx);
+                impl_unary!(f64x2: Sleef_tanhd2_u10sse4);
+                impl_unary!(f64x4: Sleef_tanhd4_u10avx);
+            } else if #[cfg(target_feature = "sse4.2")] {
+                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10sse4);
+                impl_unary!(f32x16[q => f32x4]: Sleef_tanhf4_u10sse4);
+                impl_unary!(f64x8[q => f64x2]: Sleef_tanhd2_u10sse4);
+
+                impl_unary!(f32x4: Sleef_tanhf4_u10sse4);
+                impl_unary!(f32x8[h => f32x4]: Sleef_tanhf4_u10sse4);
+                impl_unary!(f64x2: Sleef_tanhd2_u10sse4);
+                impl_unary!(f64x4[h => f64x2]: Sleef_tanhd2_u10sse4);
+            } else {
+                impl_unary!(f32x2[f32; 2]: tanh_f32);
+                impl_unary!(f32x16: tanh_v16f32);
+                impl_unary!(f64x8: tanh_v8f64);
+
+                impl_unary!(f32x4: tanh_v4f32);
+                impl_unary!(f32x8: tanh_v8f32);
+                impl_unary!(f64x2: tanh_v2f64);
+                impl_unary!(f64x4: tanh_v4f64);
+            }
+        }
+    } else {
+        impl_unary!(f32x2[f32; 2]: tanh_f32);
+        impl_unary!(f32x4: tanh_v4f32);
+        impl_unary!(f32x8: tanh_v8f32);
+        impl_unary!(f32x16: tanh_v16f32);
+
+        impl_unary!(f64x2: tanh_v2f64);
+        impl_unary!(f64x4: tanh_v4f64);
+        impl_unary!(f64x8: tanh_v8f64);
+    }
+}
diff --git a/vendor/packed_simd_2/src/codegen/pointer_sized_int.rs b/vendor/packed_simd/src/codegen/pointer_sized_int.rs
index 55cbc297a..55cbc297a 100644
--- a/vendor/packed_simd_2/src/codegen/pointer_sized_int.rs
+++ b/vendor/packed_simd/src/codegen/pointer_sized_int.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions.rs b/vendor/packed_simd/src/codegen/reductions.rs
index 302ca6d88..302ca6d88 100644
--- a/vendor/packed_simd_2/src/codegen/reductions.rs
+++ b/vendor/packed_simd/src/codegen/reductions.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask.rs b/vendor/packed_simd/src/codegen/reductions/mask.rs
index a78bcc563..a78bcc563 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/aarch64.rs b/vendor/packed_simd/src/codegen/reductions/mask/aarch64.rs
index b2db52c89..b2db52c89 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/aarch64.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/aarch64.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs b/vendor/packed_simd/src/codegen/reductions/mask/arm.rs
index 41c3cbc58..41c3cbc58 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/arm.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/arm.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/fallback.rs b/vendor/packed_simd/src/codegen/reductions/mask/fallback.rs
index 4c377a687..4c377a687 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/fallback.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/fallback.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/fallback_impl.rs b/vendor/packed_simd/src/codegen/reductions/mask/fallback_impl.rs
index 0d246e2fd..0d246e2fd 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/fallback_impl.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/fallback_impl.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs b/vendor/packed_simd/src/codegen/reductions/mask/x86.rs
index 4bf509806..4bf509806 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/x86.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs b/vendor/packed_simd/src/codegen/reductions/mask/x86/avx.rs
index 61f352d22..61f352d22 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/x86/avx.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx2.rs b/vendor/packed_simd/src/codegen/reductions/mask/x86/avx2.rs
index d37d02342..d37d02342 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx2.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/x86/avx2.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs b/vendor/packed_simd/src/codegen/reductions/mask/x86/sse.rs
index e0c9aee92..e0c9aee92 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/x86/sse.rs
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs b/vendor/packed_simd/src/codegen/reductions/mask/x86/sse2.rs
index bbb52fa47..bbb52fa47 100644
--- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs
+++ b/vendor/packed_simd/src/codegen/reductions/mask/x86/sse2.rs
diff --git a/vendor/packed_simd_2/src/codegen/shuffle.rs b/vendor/packed_simd/src/codegen/shuffle.rs
index d3acd48f5..d3acd48f5 100644
--- a/vendor/packed_simd_2/src/codegen/shuffle.rs
+++ b/vendor/packed_simd/src/codegen/shuffle.rs
diff --git a/vendor/packed_simd_2/src/codegen/shuffle1_dyn.rs b/vendor/packed_simd/src/codegen/shuffle1_dyn.rs
index 19d457a45..19d457a45 100644
--- a/vendor/packed_simd_2/src/codegen/shuffle1_dyn.rs
+++ b/vendor/packed_simd/src/codegen/shuffle1_dyn.rs
diff --git a/vendor/packed_simd_2/src/codegen/swap_bytes.rs b/vendor/packed_simd/src/codegen/swap_bytes.rs
index 9cf34a3e0..9cf34a3e0 100644
--- a/vendor/packed_simd_2/src/codegen/swap_bytes.rs
+++ b/vendor/packed_simd/src/codegen/swap_bytes.rs
diff --git a/vendor/packed_simd_2/src/codegen/v128.rs b/vendor/packed_simd/src/codegen/v128.rs
index 9506424fa..9506424fa 100644
--- a/vendor/packed_simd_2/src/codegen/v128.rs
+++ b/vendor/packed_simd/src/codegen/v128.rs
diff --git a/vendor/packed_simd_2/src/codegen/v16.rs b/vendor/packed_simd/src/codegen/v16.rs
index 4d55a6d89..4d55a6d89 100644
--- a/vendor/packed_simd_2/src/codegen/v16.rs
+++ b/vendor/packed_simd/src/codegen/v16.rs
diff --git a/vendor/packed_simd_2/src/codegen/v256.rs b/vendor/packed_simd/src/codegen/v256.rs
index 5ca4759f0..5ca4759f0 100644
--- a/vendor/packed_simd_2/src/codegen/v256.rs
+++ b/vendor/packed_simd/src/codegen/v256.rs
diff --git a/vendor/packed_simd_2/src/codegen/v32.rs b/vendor/packed_simd/src/codegen/v32.rs
index ae1dabd00..ae1dabd00 100644
--- a/vendor/packed_simd_2/src/codegen/v32.rs
+++ b/vendor/packed_simd/src/codegen/v32.rs
diff --git a/vendor/packed_simd_2/src/codegen/v512.rs b/vendor/packed_simd/src/codegen/v512.rs
index bf9511034..bf9511034 100644
--- a/vendor/packed_simd_2/src/codegen/v512.rs
+++ b/vendor/packed_simd/src/codegen/v512.rs
diff --git a/vendor/packed_simd_2/src/codegen/v64.rs b/vendor/packed_simd/src/codegen/v64.rs
index 3cfb67c1a..3cfb67c1a 100644
--- a/vendor/packed_simd_2/src/codegen/v64.rs
+++ b/vendor/packed_simd/src/codegen/v64.rs
diff --git a/vendor/packed_simd_2/src/codegen/vPtr.rs b/vendor/packed_simd/src/codegen/vPtr.rs
index abd3aa877..abd3aa877 100644
--- a/vendor/packed_simd_2/src/codegen/vPtr.rs
+++ b/vendor/packed_simd/src/codegen/vPtr.rs
diff --git a/vendor/packed_simd_2/src/codegen/vSize.rs b/vendor/packed_simd/src/codegen/vSize.rs
index d5db03991..d5db03991 100644
--- a/vendor/packed_simd_2/src/codegen/vSize.rs
+++ b/vendor/packed_simd/src/codegen/vSize.rs
diff --git a/vendor/packed_simd/src/lib.rs b/vendor/packed_simd/src/lib.rs
new file mode 100644
index 000000000..867cc10e9
--- /dev/null
+++ b/vendor/packed_simd/src/lib.rs
@@ -0,0 +1,348 @@
+//! # Portable packed SIMD vectors
+//!
+//! This crate is proposed for stabilization as `std::packed_simd` in [RFC2366:
+//! `std::simd`](https://github.com/rust-lang/rfcs/pull/2366) .
+//!
+//! The examples available in the
+//! [`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples)
+//! sub-directory of the crate showcase how to use the library in practice.
+//!
+//! ## Table of contents
+//!
+//! - [Introduction](#introduction)
+//! - [Vector types](#vector-types)
+//! - [Conditional operations](#conditional-operations)
+//! - [Conversions](#conversions)
+//! - [Hardware Features](#hardware-features)
+//! - [Performance guide](https://rust-lang-nursery.github.io/packed_simd/perf-guide/)
+//!
+//! ## Introduction
+//!
+//! This crate exports [`Simd<[T; N]>`][`Simd`]: a packed vector of `N`
+//! elements of type `T` as well as many type aliases for this type: for
+//! example, [`f32x4`], which is just an alias for `Simd<[f32; 4]>`.
+//!
+//! The operations on packed vectors are, by default, "vertical", that is, they
+//! are applied to each vector lane in isolation of the others:
+//!
+//! ```
+//! # use packed_simd::*;
+//! let a = i32x4::new(1, 2, 3, 4);
+//! let b = i32x4::new(5, 6, 7, 8);
+//! assert_eq!(a + b, i32x4::new(6, 8, 10, 12));
+//! ```
+//!
+//! Many "horizontal" operations are also provided:
+//!
+//! ```
+//! # use packed_simd::*;
+//! # let a = i32x4::new(1, 2, 3, 4);
+//! assert_eq!(a.wrapping_sum(), 10);
+//! ```
+//!
+//! In virtually all architectures vertical operations are fast, while
+//! horizontal operations are, by comparison, much slower. That is, the
+//! most portably-efficient way of performing a reduction over a slice
+//! is to collect the results into a vector using vertical operations,
+//! and performing a single horizontal operation at the end:
+//!
+//! ```
+//! # use packed_simd::*;
+//! fn reduce(x: &[i32]) -> i32 {
+//!     assert_eq!(x.len() % 4, 0);
+//!     let mut sum = i32x4::splat(0); // [0, 0, 0, 0]
+//!     for i in (0..x.len()).step_by(4) {
+//!         sum += i32x4::from_slice_unaligned(&x[i..]);
+//!     }
+//!     sum.wrapping_sum()
+//! }
+//!
+//! let x = [0, 1, 2, 3, 4, 5, 6, 7];
+//! assert_eq!(reduce(&x), 28);
+//! ```
+//!
+//! ## Vector types
+//!
+//! The vector type aliases are named according to the following scheme:
+//!
+//! > `{element_type}x{number_of_lanes} == Simd<[element_type;
+//! number_of_lanes]>`
+//!
+//! where the following element types are supported:
+//!
+//! * `i{element_width}`: signed integer
+//! * `u{element_width}`: unsigned integer
+//! * `f{element_width}`: float
+//! * `m{element_width}`: mask (see below)
+//! * `*{const,mut} T`: `const` and `mut` pointers
+//!
+//! ## Basic operations
+//!
+//! ```
+//! # use packed_simd::*;
+//! // Sets all elements to `0`:
+//! let a = i32x4::splat(0);
+//!
+//! // Reads a vector from a slice:
+//! let mut arr = [0, 0, 0, 1, 2, 3, 4, 5];
+//! let b = i32x4::from_slice_unaligned(&arr);
+//!
+//! // Reads the 4-th element of a vector:
+//! assert_eq!(b.extract(3), 1);
+//!
+//! // Returns a new vector where the 4-th element is replaced with `1`:
+//! let a = a.replace(3, 1);
+//! assert_eq!(a, b);
+//!
+//! // Writes a vector to a slice:
+//! let a = a.replace(2, 1);
+//! a.write_to_slice_unaligned(&mut arr[4..]);
+//! assert_eq!(arr, [0, 0, 0, 1, 0, 0, 1, 1]);
+//! ```
+//!
+//! ## Conditional operations
+//!
+//! One often needs to perform an operation on some lanes of the vector. Vector
+//! masks, like `m32x4`, allow selecting on which vector lanes an operation is
+//! to be performed:
+//!
+//! ```
+//! # use packed_simd::*;
+//! let a = i32x4::new(1, 1, 2, 2);
+//!
+//! // Add `1` to the first two lanes of the vector.
+//! let m = m16x4::new(true, true, false, false);
+//! let a = m.select(a + 1, a);
+//! assert_eq!(a, i32x4::splat(2));
+//! ```
+//!
+//! The elements of a vector mask are either `true` or `false`. Here `true`
+//! means that a lane is "selected", while `false` means that a lane is not
+//! selected.
+//!
+//! All vector masks implement a `mask.select(a: T, b: T) -> T` method that
+//! works on all vectors that have the same number of lanes as the mask. The
+//! resulting vector contains the elements of `a` for those lanes for which the
+//! mask is `true`, and the elements of `b` otherwise.
+//!
+//! The example constructs a mask with the first two lanes set to `true` and
+//! the last two lanes set to `false`. This selects the first two lanes of `a +
+//! 1` and the last two lanes of `a`, producing a vector where the first two
+//! lanes have been incremented by `1`.
+//!
+//! > note: mask `select` can be used on vector types that have the same number
+//! > of lanes as the mask. The example shows this by using [`m16x4`] instead
+//! > of [`m32x4`]. It is _typically_ more performant to use a mask element
+//! > width equal to the element width of the vectors being operated upon.
+//! > This is, however, not true for 512-bit wide vectors when targeting
+//! > AVX-512, where the most efficient masks use only 1-bit per element.
+//!
+//! All vertical comparison operations returns masks:
+//!
+//! ```
+//! # use packed_simd::*;
+//! let a = i32x4::new(1, 1, 3, 3);
+//! let b = i32x4::new(2, 2, 0, 0);
+//!
+//! // ge: >= (Greater Eequal; see also lt, le, gt, eq, ne).
+//! let m = a.ge(i32x4::splat(2));
+//!
+//! if m.any() {
+//!     // all / any / none allow coherent control flow
+//!     let d = m.select(a, b);
+//!     assert_eq!(d, i32x4::new(2, 2, 3, 3));
+//! }
+//! ```
+//!
+//! ## Conversions
+//!
+//! * **lossless widening conversions**: [`From`]/[`Into`] are implemented for
+//!   vectors with the same number of lanes when the conversion is value
+//! preserving   (same as in `std`).
+//!
+//! * **safe bitwise conversions**: The cargo feature `into_bits` provides the
+//!   `IntoBits/FromBits` traits (`x.into_bits()`). These perform safe bitwise
+//!   `transmute`s when all bit patterns of the source type are valid bit
+//!   patterns of the target type and are also implemented for the
+//!   architecture-specific vector types of `std::arch`. For example, `let x:
+//!   u8x8 = m8x8::splat(true).into_bits();` is provided because all `m8x8` bit
+//!   patterns are valid `u8x8` bit patterns. However, the opposite is not
+//! true,   not all `u8x8` bit patterns are valid `m8x8` bit-patterns, so this
+//!   operation cannot be performed safely using `x.into_bits()`; one needs to
+//!   use `unsafe { crate::mem::transmute(x) }` for that, making sure that the
+//!   value in the `u8x8` is a valid bit-pattern of `m8x8`.
+//!
+//! * **numeric casts** (`as`): are performed using [`FromCast`]/[`Cast`]
+//! (`x.cast()`), just like `as`:
+//!
+//!   * casting integer vectors whose lane types have the same size (e.g.
+//! `i32xN`     -> `u32xN`) is a **no-op**,
+//!
+//!   * casting from a larger integer to a smaller integer (e.g. `u32xN` ->
+//! `u8xN`)     will **truncate**,
+//!
+//!   * casting from a smaller integer to a larger integer     (e.g. `u8xN` ->
+//!     `u32xN`) will:
+//!        * **zero-extend** if the source is unsigned, or
+//!        * **sign-extend** if the source is signed,
+//!
+//!   * casting from a float to an integer will **round the float towards
+//! zero**,
+//!
+//!   * casting from an integer to float will produce the floating point
+//!     representation of the integer, **rounding to nearest, ties to even**,
+//!
+//!   * casting from an `f32` to an `f64` is perfect and lossless,
+//!
+//!   * casting from an `f64` to an `f32` **rounds to nearest, ties to even**.
+//!
+//!   Numeric casts are not very "precise": sometimes lossy, sometimes value
+//!   preserving, etc.
+//!
+//! ## Hardware Features
+//!
+//! This crate can use different hardware features based on your configured
+//! `RUSTFLAGS`. For example, with no configured `RUSTFLAGS`, `u64x8` on
+//! x86_64 will use SSE2 operations like `PCMPEQD`. If you configure
+//! `RUSTFLAGS='-C target-feature=+avx2,+avx'` on supported x86_64 hardware
+//! the same `u64x8` may use wider AVX2 operations like `VPCMPEQQ`. It is
+//! important for performance and for hardware support requirements that
+//! you choose an appropriate set of `target-feature` and `target-cpu`
+//! options during builds. For more information, see the [Performance
+//! guide](https://rust-lang-nursery.github.io/packed_simd/perf-guide/)
+
+#![feature(
+    adt_const_params,
+    repr_simd,
+    rustc_attrs,
+    platform_intrinsics,
+    stdsimd,
+    arm_target_feature,
+    link_llvm_intrinsics,
+    core_intrinsics,
+    stmt_expr_attributes,
+    custom_inner_attributes,
+)]
+#![allow(non_camel_case_types, non_snake_case,
+        // FIXME: these types are unsound in C FFI already
+        // See https://github.com/rust-lang/rust/issues/53346
+        improper_ctypes_definitions,
+        incomplete_features,
+        clippy::cast_possible_truncation,
+        clippy::cast_lossless,
+        clippy::cast_possible_wrap,
+        clippy::cast_precision_loss,
+        // TODO: manually add the `#[must_use]` attribute where appropriate
+        clippy::must_use_candidate,
+        // This lint is currently broken for generic code
+        // See https://github.com/rust-lang/rust-clippy/issues/3410
+        clippy::use_self,
+        clippy::wrong_self_convention,
+        clippy::from_over_into,
+)]
+#![cfg_attr(test, feature(hashmap_internals))]
+#![cfg_attr(doc_cfg, feature(doc_cfg))]
+#![deny(rust_2018_idioms, clippy::missing_inline_in_public_items)]
+#![no_std]
+
+use cfg_if::cfg_if;
+
+cfg_if! {
+    if #[cfg(feature = "core_arch")] {
+        #[allow(unused_imports)]
+        use core_arch as arch;
+    } else {
+        #[allow(unused_imports)]
+        use core::arch;
+    }
+}
+
+#[cfg(all(target_arch = "wasm32", test))]
+use wasm_bindgen_test::*;
+
+#[allow(unused_imports)]
+use core::{
+    /* arch (handled above), */ cmp, f32, f64, fmt, hash, hint, i128, i16, i32, i64, i8, intrinsics,
+    isize, iter, marker, mem, ops, ptr, slice, u128, u16, u32, u64, u8, usize,
+};
+
+#[macro_use]
+mod testing;
+#[macro_use]
+mod api;
+mod codegen;
+mod sealed;
+
+pub use crate::sealed::{Mask, Shuffle, Simd as SimdVector, SimdArray};
+
+/// Packed SIMD vector type.
+///
+/// # Examples
+///
+/// ```
+/// # use packed_simd::Simd;
+/// let v = Simd::<[i32; 4]>::new(0, 1, 2, 3);
+/// assert_eq!(v.extract(2), 2);
+/// ```
+#[repr(transparent)]
+#[derive(Copy, Clone)]
+pub struct Simd<A: sealed::SimdArray>(
+    // FIXME: this type should be private,
+    // but it currently must be public for the
+    // `shuffle!` macro to work: it needs to
+    // access the internal `repr(simd)` type
+    // to call the shuffle intrinsics.
+    #[doc(hidden)] pub <A as sealed::SimdArray>::Tuple,
+);
+
+impl<A: sealed::SimdArray> sealed::Seal for Simd<A> {}
+
+/// Wrapper over `T` implementing a lexicoraphical order via the `PartialOrd`
+/// and/or `Ord` traits.
+#[repr(transparent)]
+#[derive(Copy, Clone, Debug)]
+#[allow(clippy::missing_inline_in_public_items)]
+pub struct LexicographicallyOrdered<T>(T);
+
+mod masks;
+pub use self::masks::*;
+
+mod v16;
+pub use self::v16::*;
+
+mod v32;
+pub use self::v32::*;
+
+mod v64;
+pub use self::v64::*;
+
+mod v128;
+pub use self::v128::*;
+
+mod v256;
+pub use self::v256::*;
+
+mod v512;
+pub use self::v512::*;
+
+mod vSize;
+pub use self::vSize::*;
+
+mod vPtr;
+pub use self::vPtr::*;
+
+pub use self::api::cast::*;
+
+#[cfg(feature = "into_bits")]
+pub use self::api::into_bits::*;
+
+// Re-export the shuffle intrinsics required by the `shuffle!` macro.
+#[doc(hidden)]
+pub use self::codegen::llvm::{
+    __shuffle_vector16, __shuffle_vector2, __shuffle_vector32, __shuffle_vector4, __shuffle_vector64,
+    __shuffle_vector8,
+};
+
+pub(crate) mod llvm {
+    pub(crate) use crate::codegen::llvm::*;
+}
diff --git a/vendor/packed_simd_2/src/masks.rs b/vendor/packed_simd/src/masks.rs
index 04534eab2..04534eab2 100644
--- a/vendor/packed_simd_2/src/masks.rs
+++ b/vendor/packed_simd/src/masks.rs
diff --git a/vendor/packed_simd_2/src/sealed.rs b/vendor/packed_simd/src/sealed.rs
index 0ec20300f..0ec20300f 100644
--- a/vendor/packed_simd_2/src/sealed.rs
+++ b/vendor/packed_simd/src/sealed.rs
diff --git a/vendor/packed_simd_2/src/testing.rs b/vendor/packed_simd/src/testing.rs
index 6320b2805..6320b2805 100644
--- a/vendor/packed_simd_2/src/testing.rs
+++ b/vendor/packed_simd/src/testing.rs
diff --git a/vendor/packed_simd_2/src/testing/macros.rs b/vendor/packed_simd/src/testing/macros.rs
index 7bc4268b9..7bc4268b9 100644
--- a/vendor/packed_simd_2/src/testing/macros.rs
+++ b/vendor/packed_simd/src/testing/macros.rs
diff --git a/vendor/packed_simd_2/src/testing/utils.rs b/vendor/packed_simd/src/testing/utils.rs
index 7d8f39573..7d8f39573 100644
--- a/vendor/packed_simd_2/src/testing/utils.rs
+++ b/vendor/packed_simd/src/testing/utils.rs
diff --git a/vendor/packed_simd_2/src/v128.rs b/vendor/packed_simd/src/v128.rs
index 7949f6619..7949f6619 100644
--- a/vendor/packed_simd_2/src/v128.rs
+++ b/vendor/packed_simd/src/v128.rs
diff --git a/vendor/packed_simd_2/src/v16.rs b/vendor/packed_simd/src/v16.rs
index 4ca5afb2a..4ca5afb2a 100644
--- a/vendor/packed_simd_2/src/v16.rs
+++ b/vendor/packed_simd/src/v16.rs
diff --git a/vendor/packed_simd_2/src/v256.rs b/vendor/packed_simd/src/v256.rs
index f0c3bc281..f0c3bc281 100644
--- a/vendor/packed_simd_2/src/v256.rs
+++ b/vendor/packed_simd/src/v256.rs
diff --git a/vendor/packed_simd_2/src/v32.rs b/vendor/packed_simd/src/v32.rs
index 75a1838e5..75a1838e5 100644
--- a/vendor/packed_simd_2/src/v32.rs
+++ b/vendor/packed_simd/src/v32.rs
diff --git a/vendor/packed_simd_2/src/v512.rs b/vendor/packed_simd/src/v512.rs
index 4c8c71338..4c8c71338 100644
--- a/vendor/packed_simd_2/src/v512.rs
+++ b/vendor/packed_simd/src/v512.rs
diff --git a/vendor/packed_simd_2/src/v64.rs b/vendor/packed_simd/src/v64.rs
index bf6b9de61..bf6b9de61 100644
--- a/vendor/packed_simd_2/src/v64.rs
+++ b/vendor/packed_simd/src/v64.rs
diff --git a/vendor/packed_simd_2/src/vPtr.rs b/vendor/packed_simd/src/vPtr.rs
index e34cb170e..e34cb170e 100644
--- a/vendor/packed_simd_2/src/vPtr.rs
+++ b/vendor/packed_simd/src/vPtr.rs
diff --git a/vendor/packed_simd_2/src/vSize.rs b/vendor/packed_simd/src/vSize.rs
index b5d891006..b5d891006 100644
--- a/vendor/packed_simd_2/src/vSize.rs
+++ b/vendor/packed_simd/src/vSize.rs
diff --git a/vendor/packed_simd_2/tests/endianness.rs b/vendor/packed_simd/tests/endianness.rs
index da12c2338..17a7796b1 100644
--- a/vendor/packed_simd_2/tests/endianness.rs
+++ b/vendor/packed_simd/tests/endianness.rs
@@ -1,7 +1,7 @@
 #[cfg(target_arch = "wasm32")]
 use wasm_bindgen_test::*;
 
-use packed_simd_2::*;
+use packed_simd::*;
 use std::{mem, slice};
 
 #[cfg_attr(not(target_arch = "wasm32"), test)]
diff --git a/vendor/packed_simd_2/.cargo-checksum.json b/vendor/packed_simd_2/.cargo-checksum.json
deleted file mode 100644
index e235b36c3..000000000
--- a/vendor/packed_simd_2/.cargo-checksum.json
+++ /dev/null
@@ -1 +0,0 @@
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3bded9599","src/v64.rs":"0b8079881b71575e3414be0b7f8f7eaba65281ba6732f2b2f61f73e95b6f48f7","src/vPtr.rs":"8b3e433d487180bb4304ff71245ecad90f0010f43e139a72027b672abe58facc","src/vSize.rs":"eda5aa020706cbf94d15bada41a0c2a35fc8f3f37cb7c2cd6f34d201399a495e","tests/endianness.rs":"2783d727e8ff8789211e03120634cd3ad9f8972fc484012681b5b63cf89408a7"},"package":"a1914cd452d8fccd6f9db48147b29fd4ae05bea9dc5d9ad578509f72415de282"}
\ No newline at end of file
diff --git a/vendor/packed_simd_2/Cargo.toml b/vendor/packed_simd_2/Cargo.toml
deleted file mode 100644
index 86239f96c..000000000
--- a/vendor/packed_simd_2/Cargo.toml
+++ /dev/null
@@ -1,83 +0,0 @@
-# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
-#
-# When uploading crates to the registry Cargo will automatically
-# "normalize" Cargo.toml files for maximal compatibility
-# with all versions of Cargo and also rewrite `path` dependencies
-# to registry (e.g., crates.io) dependencies.
-#
-# If you are reading this file be aware that the original Cargo.toml
-# will likely look very different (and much more reasonable).
-# See Cargo.toml.orig for the original contents.
-
-[package]
-edition = "2018"
-name = "packed_simd_2"
-version = "0.3.8"
-build = "build.rs"
-description = "Portable Packed SIMD vectors"
-homepage = "https://github.com/rust-lang/packed_simd"
-documentation = "https://docs.rs/crate/packed_simd/"
-readme = "README.md"
-keywords = [
-    "simd",
-    "vector",
-    "portability",
-]
-categories = [
-    "hardware-support",
-    "concurrency",
-    "no-std",
-    "data-structures",
-]
-license = "MIT OR Apache-2.0"
-repository = "https://github.com/rust-lang/packed_simd"
-
-[dependencies.cfg-if]
-version = "1.0.0"
-
-[dependencies.core_arch]
-version = "0.1.5"
-optional = true
-
-[dependencies.libm]
-version = "0.1.4"
-
-[dev-dependencies.arrayvec]
-version = "^0.5"
-default-features = false
-
-[dev-dependencies.paste]
-version = "^0.1.3"
-
-[features]
-default = []
-into_bits = []
-libcore_neon = []
-
-[target."cfg(target_arch = \"x86_64\")".dependencies.sleef-sys]
-version = "0.1.2"
-optional = true
-
-[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen]
-version = "=0.2.73"
-
-[target.wasm32-unknown-unknown.dev-dependencies.wasm-bindgen-test]
-version = "=0.3.23"
-
-[badges.appveyor]
-repository = "rust-lang/packed_simd"
-
-[badges.codecov]
-repository = "rust-lang/packed_simd"
-
-[badges.is-it-maintained-issue-resolution]
-repository = "rust-lang/packed_simd"
-
-[badges.is-it-maintained-open-issues]
-repository = "rust-lang/packed_simd"
-
-[badges.maintenance]
-status = "experimental"
-
-[badges.travis-ci]
-repository = "rust-lang/packed_simd"
diff --git a/vendor/packed_simd_2/README.md b/vendor/packed_simd_2/README.md
deleted file mode 100644
index eb3101c33..000000000
--- a/vendor/packed_simd_2/README.md
+++ /dev/null
@@ -1,162 +0,0 @@
-# The Crates.io Version Can No Longer Be Updated!
-
-The original maintainer is out of contact, and the new maintainers (the Portable SIMD Project Group) do not have the appropriate crates.io permissions to issue updates.
-
-We are aware that the version available on crates.io is currently broken, and will not build.
-
-If you need to continue to use the crate, we have published a "next version" under an alternative name.
-
-Adjust your `[dependencies]` section of `Cargo.toml` to be the following:
-```toml
-packed_simd = { version = "0.3.8", package = "packed_simd_2" }
-```
-
-# `Simd<[T; N]>`
-
-## Implementation of [Rust RFC #2366: `std::simd`][rfc2366]
-
-[![Travis-CI Status]][travis] <!-- [![Appveyor Status]][appveyor] --> [![Latest Version]][crates.io] [![docs]][master_docs]
-
-**WARNING**: this crate only supports the most recent nightly Rust toolchain
-and will be superseded by [stdsimd](https://github.com/rust-lang/stdsimd).
-
-## Documentation
-
-* [API docs (`master` branch)][master_docs]
-* [Performance guide][perf_guide]
-* [API docs (`docs.rs`)][docs.rs]
-* [RFC2366 `std::simd`][rfc2366]: - contains motivation, design rationale,
-  discussion, etc.
-
-## Examples
-
-Most of the examples come with both a scalar and a vectorized implementation.
-
-* [`aobench`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/aobench)
-* [`fannkuch_redux`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/fannkuch_redux)
-* [`matrix inverse`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/matrix_inverse)
-* [`mandelbrot`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/mandelbrot)
-* [`n-body`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/nbody)
-* [`options_pricing`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/options_pricing)
-* [`spectral_norm`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/spectral_norm)
-* [`triangle transform`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/triangle_xform)
-* [`stencil`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/stencil)
-* [`vector dot product`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/dot_product)
-
-## Cargo features
-
-* `into_bits` (default: disabled): enables `FromBits`/`IntoBits` trait
-  implementations for the vector types. These allow reinterpreting the bits of a
-  vector type as those of another vector type safely by just using the
-  `.into_bits()` method.
-
-## Performance
-
-The following [ISPC] examples are also part of `packed_simd`'s
-[`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples/)
-directory, where `packed_simd`+[`rayon`][rayon] are used to emulate [ISPC]'s
-Single-Program-Multiple-Data (SPMD) programming model. The performance results
-on different hardware is shown in the `readme.md` of each example. The following
-table summarizes the performance ranges, where `+` means speed-up and `-`
-slowdown:
-
-* `aobench`: `[-1.02x, +1.53x]`,
-* `stencil`: `[+1.06x, +1.72x]`,
-* `mandelbrot`: `[-1.74x, +1.2x]`,
-* `options_pricing`:
-   * `black_scholes`: `+1.0x`
-   * `binomial_put`: `+1.4x`
-
- While SPMD is not the intended use case for `packed_simd`, it is possible to
- combine the library with [`rayon`][rayon] to poorly emulate [ISPC]'s SPMD programming
- model in Rust. Writing performant code is not as straightforward as with
- [ISPC], but with some care (e.g. see the [Performance Guide][perf_guide]) one
- can easily match and often out-perform [ISPC]'s "default performance".
-
-## Platform support
-
-The following table describes the supported platforms: `build` shows whether
-the library compiles without issues for a given target, while `run` shows
-whether the test suite passes for a given target.
-
-| **Linux**                             | **build** | **run** |
-|---------------------------------------|-----------|---------|
-| `i586-unknown-linux-gnu`              | ✓         | ✗       |
-| `i686-unknown-linux-gnu`              | ✓         | ✗       |
-| `x86_64-unknown-linux-gnu`            | ✓         | ✓       |
-| `arm-unknown-linux-gnueabi`           | ✗         | ✗       |
-| `arm-unknown-linux-gnueabihf`         | ✓         | ✓       |
-| `armv7-unknown-linux-gnueabi`         | ✓         | ✓       |
-| `aarch64-unknown-linux-gnu`           | ✓         | ✓       |
-| `mips-unknown-linux-gnu`              | ✓         | ✗       |
-| `mipsel-unknown-linux-musl`           | ✓         | ✗       |
-| `mips64-unknown-linux-gnuabi64`       | ✓         | ✗       |
-| `mips64el-unknown-linux-gnuabi64`     | ✓         | ✗       |
-| `powerpc-unknown-linux-gnu`           | ✗         | ✗       |
-| `powerpc64-unknown-linux-gnu`         | ✗         | ✗       |
-| `powerpc64le-unknown-linux-gnu`       | ✓         | ✓       |
-| `s390x-unknown-linux-gnu`             | ✗         | ✗       |
-| `sparc64-unknown-linux-gnu`           | ✓         | ✗       |
-| `thumbv7neon-unknown-linux-gnueabihf` | ✓         | ✓       |
-| **MacOSX**                            | **build** | **run** |
-| `x86_64-apple-darwin`                 | ✓         | ✓       |
-| **Android**                           | **build** | **run** |
-| `x86_64-linux-android`                | ✓         | ✓       |
-| `arm-linux-androideabi`               | ✓         | ✓       |
-| `aarch64-linux-android`               | ✓         | ✓       |
-| `thumbv7neon-linux-androideabi`       | ✗         | ✗       |
-| **iOS**                               | **build** | **run** |
-| `x86_64-apple-ios`                    | ✓         | ✗       |
-| `aarch64-apple-ios`                   | ✓         | ✗       |
-
-
-## Machine code verification
-
-The
-[`verify/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/verify)
-crate tests disassembles the portable packed vector APIs at run-time and
-compares the generated machine code against the desired one to make sure that
-this crate remains efficient.
-
-## License
-
-This project is licensed under either of
-
-* [Apache License, Version 2.0](http://www.apache.org/licenses/LICENSE-2.0)
-  ([LICENSE-APACHE](LICENSE-APACHE))
-
-* [MIT License](http://opensource.org/licenses/MIT)
-  ([LICENSE-MIT](LICENSE-MIT))
-
-at your option.
-
-## Contributing
-
-We welcome all people who want to contribute.
-Please see the [contributing instructions] for more information.
-
-Contributions in any form (issues, pull requests, etc.) to this project
-must adhere to Rust's [Code of Conduct].
-
-Unless you explicitly state otherwise, any contribution intentionally submitted
-for inclusion in `packed_simd` by you, as defined in the Apache-2.0 license, shall be
-dual licensed as above, without any additional terms or conditions.
-
-[travis]: https://travis-ci.com/rust-lang/packed_simd
-[Travis-CI Status]: https://travis-ci.com/rust-lang/packed_simd.svg?branch=master
-[appveyor]: https://ci.appveyor.com/project/gnzlbg/packed-simd
-[Appveyor Status]: https://ci.appveyor.com/api/projects/status/hd7v9dvr442hgdix?svg=true
-[Latest Version]: https://img.shields.io/crates/v/packed_simd_2.svg
-[crates.io]: https://crates.io/crates/packed_simd_2
-[docs]: https://docs.rs/packed_simd_2/badge.svg
-[docs.rs]: https://docs.rs/packed_simd_2
-[master_docs]: https://rust-lang-nursery.github.io/packed_simd/packed_simd_2/
-[perf_guide]: https://rust-lang-nursery.github.io/packed_simd/perf-guide/
-[rfc2366]: https://github.com/rust-lang/rfcs/pull/2366
-[ISPC]: https://ispc.github.io/
-[rayon]: https://crates.io/crates/rayon
-[boost_license]: https://www.boost.org/LICENSE_1_0.txt
-[SLEEF]: https://sleef.org/
-[sleef_sys]: https://crates.io/crates/sleef-sys
-[contributing instructions]: contributing.md
-[Code of Conduct]: https://www.rust-lang.org/en-US/conduct.html
diff --git a/vendor/packed_simd_2/ci/android-install-ndk.sh b/vendor/packed_simd_2/ci/android-install-ndk.sh
deleted file mode 100644
index 818e78446..000000000
--- a/vendor/packed_simd_2/ci/android-install-ndk.sh
+++ /dev/null
@@ -1,37 +0,0 @@
-#!/usr/bin/env sh
-# Copyright 2016 The Rust Project Developers. See the COPYRIGHT
-# file at the top-level directory of this distribution and at
-# http://rust-lang.org/COPYRIGHT.
-#
-# Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or
-# http://www.apache.org/licenses/LICENSE-2.0> or the MIT license
-# <LICENSE-MIT or http://opensource.org/licenses/MIT>, at your
-# option. This file may not be copied, modified, or distributed
-# except according to those terms.
-
-set -ex
-
-curl --retry 5 -O https://dl.google.com/android/repository/android-ndk-r15b-linux-x86_64.zip
-unzip -q android-ndk-r15b-linux-x86_64.zip
-
-case "$1" in
-    aarch64)
-        arch=arm64
-        ;;
-
-    i686)
-        arch=x86
-        ;;
-
-    *)
-        arch=$1
-        ;;
-esac;
-
-android-ndk-r15b/build/tools/make_standalone_toolchain.py \
-    --unified-headers \
-    --install-dir "/android/ndk-${1}" \
-    --arch "${arch}" \
-    --api 24
-
-rm -rf ./android-ndk-r15b-linux-x86_64.zip ./android-ndk-r15b
diff --git a/vendor/packed_simd_2/ci/docker/powerpc-unknown-linux-gnu/Dockerfile b/vendor/packed_simd_2/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
deleted file mode 100644
index 80cfee8ab..000000000
--- a/vendor/packed_simd_2/ci/docker/powerpc-unknown-linux-gnu/Dockerfile
+++ /dev/null
@@ -1,13 +0,0 @@
-FROM ubuntu:18.04
-
-RUN apt-get update && apt-get install -y --no-install-recommends \
-        gcc libc6-dev qemu-user ca-certificates \
-        gcc-powerpc-linux-gnu libc6-dev-powerpc-cross \
-        qemu-system-ppc \
-        make \
-        file
-
-ENV CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_LINKER=powerpc-linux-gnu-gcc \
-    CARGO_TARGET_POWERPC_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc -cpu Vger -L /usr/powerpc-linux-gnu" \
-    CC=powerpc-linux-gnu-gcc \
-    OBJDUMP=powerpc-linux-gnu-objdump
diff --git a/vendor/packed_simd_2/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd_2/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
deleted file mode 100644
index 74031a2a3..000000000
--- a/vendor/packed_simd_2/ci/docker/powerpc64-unknown-linux-gnu/Dockerfile
+++ /dev/null
@@ -1,17 +0,0 @@
-FROM ubuntu:18.04
-
-RUN apt-get update && apt-get install -y --no-install-recommends \
-    gcc \
-    ca-certificates \
-    libc6-dev \
-    gcc-powerpc64-linux-gnu \
-    libc6-dev-ppc64-cross \
-    qemu-user  \
-    qemu-system-ppc \
-    make \
-    file 
-
-ENV CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_LINKER=powerpc64-linux-gnu-gcc \
-    CARGO_TARGET_POWERPC64_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64 -L /usr/powerpc64-linux-gnu" \
-    CC=powerpc64-linux-gnu-gcc \
-    OBJDUMP=powerpc64-linux-gnu-objdump
diff --git a/vendor/packed_simd_2/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile b/vendor/packed_simd_2/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
deleted file mode 100644
index 471a7d965..000000000
--- a/vendor/packed_simd_2/ci/docker/powerpc64le-unknown-linux-gnu/Dockerfile
+++ /dev/null
@@ -1,11 +0,0 @@
-FROM ubuntu:18.04
-
-RUN apt-get update && apt-get install -y --no-install-recommends \
-        gcc libc6-dev qemu-user ca-certificates \
-        gcc-powerpc64le-linux-gnu libc6-dev-ppc64el-cross \
-        qemu-system-ppc file make
-
-ENV CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_LINKER=powerpc64le-linux-gnu-gcc \
-    CARGO_TARGET_POWERPC64LE_UNKNOWN_LINUX_GNU_RUNNER="qemu-ppc64le -L /usr/powerpc64le-linux-gnu" \
-    CC=powerpc64le-linux-gnu-gcc \
-    OBJDUMP=powerpc64le-linux-gnu-objdump
diff --git a/vendor/packed_simd_2/ci/docker/s390x-unknown-linux-gnu/Dockerfile b/vendor/packed_simd_2/ci/docker/s390x-unknown-linux-gnu/Dockerfile
deleted file mode 100644
index c645b0bcc..000000000
--- a/vendor/packed_simd_2/ci/docker/s390x-unknown-linux-gnu/Dockerfile
+++ /dev/null
@@ -1,20 +0,0 @@
-FROM ubuntu:18.10
-
-RUN apt-get update && \
-    apt-get install -y --no-install-recommends \
-    ca-certificates \
-    curl \
-    cmake \
-    gcc \
-    libc6-dev \
-    g++-s390x-linux-gnu \
-    libc6-dev-s390x-cross \
-    qemu-user \
-    make \
-    file
-
-ENV CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_LINKER=s390x-linux-gnu-gcc \
-    CARGO_TARGET_S390X_UNKNOWN_LINUX_GNU_RUNNER="qemu-s390x -L /usr/s390x-linux-gnu" \
-    CC_s390x_unknown_linux_gnu=s390x-linux-gnu-gcc \
-    CXX_s390x_unknown_linux_gnu=s390x-linux-gnu-g++ \
-    OBJDUMP=s390x-linux-gnu-objdump
\ No newline at end of file
diff --git a/vendor/packed_simd_2/ci/docker/sparc64-unknown-linux-gnu/Dockerfile b/vendor/packed_simd_2/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
deleted file mode 100644
index fe12af14d..000000000
--- a/vendor/packed_simd_2/ci/docker/sparc64-unknown-linux-gnu/Dockerfile
+++ /dev/null
@@ -1,18 +0,0 @@
-FROM debian:stretch
-
-RUN apt-get update && apt-get install -y --no-install-recommends \
-        curl ca-certificates \
-        gcc libc6-dev \
-        gcc-sparc64-linux-gnu libc6-dev-sparc64-cross \
-        qemu-system-sparc64 openbios-sparc seabios ipxe-qemu \
-        p7zip-full cpio
-
-COPY linux-sparc64.sh /
-RUN bash /linux-sparc64.sh
-
-COPY test-runner-linux /
-
-ENV CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_LINKER=sparc64-linux-gnu-gcc \
-    CARGO_TARGET_SPARC64_UNKNOWN_LINUX_GNU_RUNNER="/test-runner-linux sparc64" \
-    CC_sparc64_unknown_linux_gnu=sparc64-linux-gnu-gcc \
-    PATH=$PATH:/rust/bin
\ No newline at end of file
diff --git a/vendor/packed_simd_2/ci/docker/wasm32-unknown-unknown/Dockerfile b/vendor/packed_simd_2/ci/docker/wasm32-unknown-unknown/Dockerfile
deleted file mode 100644
index bd97170bc..000000000
--- a/vendor/packed_simd_2/ci/docker/wasm32-unknown-unknown/Dockerfile
+++ /dev/null
@@ -1,38 +0,0 @@
-FROM ubuntu:18.04
-
-RUN apt-get update -y && apt-get install -y --no-install-recommends \
-  ca-certificates \
-  clang \
-  cmake \
-  curl \
-  git \
-  libc6-dev \
-  make \
-  python \
-  xz-utils
-
-# Install `wasm2wat`
-RUN git clone --recursive https://github.com/WebAssembly/wabt
-RUN make -C wabt -j$(nproc)
-ENV PATH=$PATH:/wabt/bin
-
-# Install `wasm-bindgen-test-runner`
-RUN curl -L https://github.com/rustwasm/wasm-bindgen/releases/download/0.2.73/wasm-bindgen-0.2.73-x86_64-unknown-linux-musl.tar.gz \
-  | tar xzf -
-# Keep in sync with the version on Cargo.toml.
-ENV PATH=$PATH:/wasm-bindgen-0.2.73-x86_64-unknown-linux-musl
-ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_RUNNER=wasm-bindgen-test-runner
-
-# Install `node`
-RUN curl https://nodejs.org/dist/v14.16.0/node-v14.16.0-linux-x64.tar.xz | tar xJf -
-ENV PATH=$PATH:/node-v14.16.0-linux-x64/bin
-
-# We use a shim linker that removes `--strip-debug` when passed to LLD. While
-# this typically results in invalid debug information in release mode it doesn't
-# result in an invalid names section which is what we're interested in.
-COPY lld-shim.rs /
-ENV CARGO_TARGET_WASM32_UNKNOWN_UNKNOWN_LINKER=/tmp/lld-shim
-
-# Rustc isn't available until this container starts, so defer compilation of the
-# shim.
-ENTRYPOINT /rust/bin/rustc /lld-shim.rs -o /tmp/lld-shim && exec bash "$@"
diff --git a/vendor/packed_simd_2/ci/docker/x86_64-linux-android/Dockerfile b/vendor/packed_simd_2/ci/docker/x86_64-linux-android/Dockerfile
deleted file mode 100644
index d52dd45b1..000000000
--- a/vendor/packed_simd_2/ci/docker/x86_64-linux-android/Dockerfile
+++ /dev/null
@@ -1,29 +0,0 @@
-FROM ubuntu:16.04
-
-RUN apt-get update && \
-    apt-get install -y --no-install-recommends \
-  ca-certificates \
-  curl \
-  gcc \
-  libc-dev \
-  python \
-  unzip \
-  file \
-  make
-
-WORKDIR /android/
-ENV ANDROID_ARCH=x86_64
-COPY android-install-ndk.sh /android/
-RUN sh /android/android-install-ndk.sh $ANDROID_ARCH
-
-# We do not run x86_64-linux-android tests on an android emulator.
-# See ci/android-sysimage.sh for informations about how tests are run.
-COPY android-sysimage.sh /android/
-RUN bash /android/android-sysimage.sh x86_64 x86_64-24_r07.zip
-
-ENV PATH=$PATH:/rust/bin:/android/ndk-$ANDROID_ARCH/bin \
-    CARGO_TARGET_X86_64_LINUX_ANDROID_LINKER=x86_64-linux-android-gcc \
-    CC_x86_64_linux_android=x86_64-linux-android-gcc \
-    CXX_x86_64_linux_android=x86_64-linux-android-g++ \
-    OBJDUMP=x86_64-linux-android-objdump \
-    HOME=/tmp
diff --git a/vendor/packed_simd_2/ci/run.sh b/vendor/packed_simd_2/ci/run.sh
deleted file mode 100755
index 428a5d890..000000000
--- a/vendor/packed_simd_2/ci/run.sh
+++ /dev/null
@@ -1,98 +0,0 @@
-#!/usr/bin/env bash
-
-set -ex
-
-: ${TARGET?"The TARGET environment variable must be set."}
-
-# Tests are all super fast anyway, and they fault often enough on travis that
-# having only one thread increases debuggability to be worth it.
-#export RUST_TEST_THREADS=1
-#export RUST_BACKTRACE=full
-#export RUST_TEST_NOCAPTURE=1
-
-# Some appveyor builds run out-of-memory; this attempts to mitigate that:
-# https://github.com/rust-lang-nursery/packed_simd/issues/39
-# export RUSTFLAGS="${RUSTFLAGS} -C codegen-units=1"
-# export CARGO_BUILD_JOBS=1
-
-export CARGO_SUBCMD=test
-if [[ "${NORUN}" == "1" ]]; then
-    export CARGO_SUBCMD=build
-fi
-
-if [[ ${TARGET} == "x86_64-apple-ios" ]] || [[ ${TARGET} == "i386-apple-ios" ]]; then
-    export RUSTFLAGS="${RUSTFLAGS} -Clink-arg=-mios-simulator-version-min=7.0"
-    rustc ./ci/deploy_and_run_on_ios_simulator.rs -o $HOME/runtest
-    export CARGO_TARGET_X86_64_APPLE_IOS_RUNNER=$HOME/runtest
-    export CARGO_TARGET_I386_APPLE_IOS_RUNNER=$HOME/runtest
-fi
-
-# The source directory is read-only. Need to copy internal crates to the target
-# directory for their Cargo.lock to be properly written.
-mkdir target || true
-
-rustc --version
-cargo --version
-echo "TARGET=${TARGET}"
-echo "HOST=${HOST}"
-echo "RUSTFLAGS=${RUSTFLAGS}"
-echo "NORUN=${NORUN}"
-echo "NOVERIFY=${NOVERIFY}"
-echo "CARGO_SUBCMD=${CARGO_SUBCMD}"
-echo "CARGO_BUILD_JOBS=${CARGO_BUILD_JOBS}"
-echo "CARGO_INCREMENTAL=${CARGO_INCREMENTAL}"
-echo "RUST_TEST_THREADS=${RUST_TEST_THREADS}"
-echo "RUST_BACKTRACE=${RUST_BACKTRACE}"
-echo "RUST_TEST_NOCAPTURE=${RUST_TEST_NOCAPTURE}"
-
-cargo_test() {
-    cmd="cargo ${CARGO_SUBCMD} --verbose --target=${TARGET} ${@}"
-    if [ "${NORUN}" != "1" ]
-    then
-        if [ "$TARGET" != "wasm32-unknown-unknown" ]
-        then
-            cmd="$cmd -- --quiet"
-        fi
-    fi
-    mkdir target || true
-    ${cmd} 2>&1 | tee > target/output
-    if [[ ${PIPESTATUS[0]} != 0 ]]; then
-        cat target/output
-        return 1
-    fi
-}
-
-cargo_test_impl() {
-    ORIGINAL_RUSTFLAGS=${RUSTFLAGS}
-    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v16  --cfg test_v32 --cfg test_v64" cargo_test ${@}
-    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v128 --cfg test_v256" cargo_test ${@}
-    RUSTFLAGS="${ORIGINAL_RUSTFLAGS} --cfg test_v512" cargo_test ${@}
-    RUSTFLAGS=${ORIGINAL_RUSTFLAGS}
-}
-
-# Debug run:
-if [[ "${TARGET}" != "wasm32-unknown-unknown" ]]; then
-   # Run wasm32-unknown-unknown in release mode only
-   cargo_test_impl
-fi
-
-if [[ "${TARGET}" == "x86_64-unknown-linux-gnu" ]] || [[ "${TARGET}" == "x86_64-pc-windows-msvc" ]]; then
-    # use sleef on linux and windows x86_64 builds
-    # FIXME: Use `core_arch,sleef-sys` features once they works again
-    cargo_test_impl --release --features=into_bits
-else
-    # FIXME: Use `core_arch` feature once it works again
-    cargo_test_impl --release --features=into_bits
-fi
-
-# Verify code generation
-if [[ "${NOVERIFY}" != "1" ]]; then
-    cp -r verify/verify target/verify
-    export STDSIMD_ASSERT_INSTR_LIMIT=30
-    if [[ "${TARGET}" == "i586-unknown-linux-gnu" ]]; then
-        export STDSIMD_ASSERT_INSTR_LIMIT=50
-    fi
-    cargo_test --release --manifest-path=target/verify/Cargo.toml
-fi
-
-. ci/run_examples.sh
diff --git a/vendor/packed_simd_2/rust-toolchain b/vendor/packed_simd_2/rust-toolchain
deleted file mode 100644
index 07ade694b..000000000
--- a/vendor/packed_simd_2/rust-toolchain
+++ /dev/null
@@ -1 +0,0 @@
-nightly
\ No newline at end of file
diff --git a/vendor/packed_simd_2/src/codegen/llvm.rs b/vendor/packed_simd_2/src/codegen/llvm.rs
deleted file mode 100644
index b4c09849b..000000000
--- a/vendor/packed_simd_2/src/codegen/llvm.rs
+++ /dev/null
@@ -1,128 +0,0 @@
-//! LLVM's platform intrinsics
-#![allow(dead_code)]
-
-use crate::sealed::Shuffle;
-#[allow(unused_imports)] // FIXME: spurious warning?
-use crate::sealed::Simd;
-
-// Shuffle intrinsics: expanded in users' crates, therefore public.
-extern "platform-intrinsic" {
-    pub fn simd_shuffle2<T, U>(x: T, y: T, idx: [u32; 2]) -> U;
-    pub fn simd_shuffle4<T, U>(x: T, y: T, idx: [u32; 4]) -> U;
-    pub fn simd_shuffle8<T, U>(x: T, y: T, idx: [u32; 8]) -> U;
-    pub fn simd_shuffle16<T, U>(x: T, y: T, idx: [u32; 16]) -> U;
-    pub fn simd_shuffle32<T, U>(x: T, y: T, idx: [u32; 32]) -> U;
-    pub fn simd_shuffle64<T, U>(x: T, y: T, idx: [u32; 64]) -> U;
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector2<const IDX: [u32; 2], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 2], Output = U>,
-{
-    simd_shuffle2(x, y, IDX)
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector4<const IDX: [u32; 4], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 4], Output = U>,
-{
-    simd_shuffle4(x, y, IDX)
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector8<const IDX: [u32; 8], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 8], Output = U>,
-{
-    simd_shuffle8(x, y, IDX)
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector16<const IDX: [u32; 16], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 16], Output = U>,
-{
-    simd_shuffle16(x, y, IDX)
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector32<const IDX: [u32; 32], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 32], Output = U>,
-{
-    simd_shuffle32(x, y, IDX)
-}
-
-#[allow(clippy::missing_safety_doc)]
-#[inline]
-pub unsafe fn __shuffle_vector64<const IDX: [u32; 64], T, U>(x: T, y: T) -> U
-where
-    T: Simd,
-    <T as Simd>::Element: Shuffle<[u32; 64], Output = U>,
-{
-    simd_shuffle64(x, y, IDX)
-}
-
-extern "platform-intrinsic" {
-    pub(crate) fn simd_eq<T, U>(x: T, y: T) -> U;
-    pub(crate) fn simd_ne<T, U>(x: T, y: T) -> U;
-    pub(crate) fn simd_lt<T, U>(x: T, y: T) -> U;
-    pub(crate) fn simd_le<T, U>(x: T, y: T) -> U;
-    pub(crate) fn simd_gt<T, U>(x: T, y: T) -> U;
-    pub(crate) fn simd_ge<T, U>(x: T, y: T) -> U;
-
-    pub(crate) fn simd_insert<T, U>(x: T, idx: u32, val: U) -> T;
-    pub(crate) fn simd_extract<T, U>(x: T, idx: u32) -> U;
-
-    pub(crate) fn simd_cast<T, U>(x: T) -> U;
-
-    pub(crate) fn simd_add<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_sub<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_mul<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_div<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_rem<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_shl<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_shr<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_and<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_or<T>(x: T, y: T) -> T;
-    pub(crate) fn simd_xor<T>(x: T, y: T) -> T;
-
-    pub(crate) fn simd_reduce_add_unordered<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_mul_unordered<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_add_ordered<T, U>(x: T, acc: U) -> U;
-    pub(crate) fn simd_reduce_mul_ordered<T, U>(x: T, acc: U) -> U;
-    pub(crate) fn simd_reduce_min<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_max<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_min_nanless<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_max_nanless<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_and<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_or<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_xor<T, U>(x: T) -> U;
-    pub(crate) fn simd_reduce_all<T>(x: T) -> bool;
-    pub(crate) fn simd_reduce_any<T>(x: T) -> bool;
-
-    pub(crate) fn simd_select<M, T>(m: M, a: T, b: T) -> T;
-
-    pub(crate) fn simd_fmin<T>(a: T, b: T) -> T;
-    pub(crate) fn simd_fmax<T>(a: T, b: T) -> T;
-
-    pub(crate) fn simd_fsqrt<T>(a: T) -> T;
-    pub(crate) fn simd_fma<T>(a: T, b: T, c: T) -> T;
-
-    pub(crate) fn simd_gather<T, P, M>(value: T, pointers: P, mask: M) -> T;
-    pub(crate) fn simd_scatter<T, P, M>(value: T, pointers: P, mask: M);
-
-    pub(crate) fn simd_bitmask<T, U>(value: T) -> U;
-}
diff --git a/vendor/packed_simd_2/src/codegen/math/float/tanh.rs b/vendor/packed_simd_2/src/codegen/math/float/tanh.rs
deleted file mode 100644
index 2c0dd3dc3..000000000
--- a/vendor/packed_simd_2/src/codegen/math/float/tanh.rs
+++ /dev/null
@@ -1,117 +0,0 @@
-//! Vertical floating-point `tanh`
-#![allow(unused)]
-
-// FIXME 64-bit 1 elem vectors tanh
-
-use crate::*;
-
-pub(crate) trait Tanh {
-    fn tanh(self) -> Self;
-}
-
-macro_rules! define_tanh {
-    ($name:ident, $basetype:ty, $simdtype:ty, $lanes:expr, $trait:path) => {
-        fn $name(x: $simdtype) -> $simdtype {
-            use core::intrinsics::transmute;
-            let mut buf: [$basetype; $lanes] = unsafe { transmute(x) };
-            for elem in &mut buf {
-                *elem = <$basetype as $trait>::tanh(*elem);
-            }
-            unsafe { transmute(buf) }
-        }
-    };
-
-    (f32 => $name:ident, $type:ty, $lanes:expr) => {
-        define_tanh!($name, f32, $type, $lanes, libm::F32Ext);
-    };
-
-    (f64 => $name:ident, $type:ty, $lanes:expr) => {
-        define_tanh!($name, f64, $type, $lanes, libm::F64Ext);
-    };
-}
-
-// llvm does not seem to expose the hyperbolic versions of trigonometric
-// functions; we thus call the classical rust versions on all of them (which
-// stem from cmath).
-define_tanh!(f32 => tanh_v2f32, f32x2, 2);
-define_tanh!(f32 => tanh_v4f32, f32x4, 4);
-define_tanh!(f32 => tanh_v8f32, f32x8, 8);
-define_tanh!(f32 => tanh_v16f32, f32x16, 16);
-
-define_tanh!(f64 => tanh_v2f64, f64x2, 2);
-define_tanh!(f64 => tanh_v4f64, f64x4, 4);
-define_tanh!(f64 => tanh_v8f64, f64x8, 8);
-
-fn tanh_f32(x: f32) -> f32 {
-    libm::F32Ext::tanh(x)
-}
-
-fn tanh_f64(x: f64) -> f64 {
-    libm::F64Ext::tanh(x)
-}
-
-gen_unary_impl_table!(Tanh, tanh);
-
-cfg_if! {
-    if #[cfg(target_arch = "s390x")] {
-        // FIXME: https://github.com/rust-lang-nursery/packed_simd/issues/14
-        impl_unary!(f32x2[f32; 2]: tanh_f32);
-        impl_unary!(f32x4[f32; 4]: tanh_f32);
-        impl_unary!(f32x8[f32; 8]: tanh_f32);
-        impl_unary!(f32x16[f32; 16]: tanh_f32);
-
-        impl_unary!(f64x2[f64; 2]: tanh_f64);
-        impl_unary!(f64x4[f64; 4]: tanh_f64);
-        impl_unary!(f64x8[f64; 8]: tanh_f64);
-    } else if #[cfg(all(target_arch = "x86_64", feature = "sleef-sys"))] {
-        use sleef_sys::*;
-        cfg_if! {
-            if #[cfg(target_feature = "avx2")] {
-                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10avx2128);
-                impl_unary!(f32x16[h => f32x8]: Sleef_tanhf8_u10avx2);
-                impl_unary!(f64x8[h => f64x4]: Sleef_tanhd4_u10avx2);
-
-                impl_unary!(f32x4: Sleef_tanhf4_u10avx2128);
-                impl_unary!(f32x8: Sleef_tanhf8_u10avx2);
-                impl_unary!(f64x2: Sleef_tanhd2_u10avx2128);
-                impl_unary!(f64x4: Sleef_tanhd4_u10avx2);
-            } else if #[cfg(target_feature = "avx")] {
-                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10sse4);
-                impl_unary!(f32x16[h => f32x8]: Sleef_tanhf8_u10avx);
-                impl_unary!(f64x8[h => f64x4]: Sleef_tanhd4_u10avx);
-
-                impl_unary!(f32x4: Sleef_tanhf4_u10sse4);
-                impl_unary!(f32x8: Sleef_tanhf8_u10avx);
-                impl_unary!(f64x2: Sleef_tanhd2_u10sse4);
-                impl_unary!(f64x4: Sleef_tanhd4_u10avx);
-            } else if #[cfg(target_feature = "sse4.2")] {
-                impl_unary!(f32x2[t => f32x4]: Sleef_tanhf4_u10sse4);
-                impl_unary!(f32x16[q => f32x4]: Sleef_tanhf4_u10sse4);
-                impl_unary!(f64x8[q => f64x2]: Sleef_tanhd2_u10sse4);
-
-                impl_unary!(f32x4: Sleef_tanhf4_u10sse4);
-                impl_unary!(f32x8[h => f32x4]: Sleef_tanhf4_u10sse4);
-                impl_unary!(f64x2: Sleef_tanhd2_u10sse4);
-                impl_unary!(f64x4[h => f64x2]: Sleef_tanhd2_u10sse4);
-            } else {
-                impl_unary!(f32x2[f32; 2]: tanh_f32);
-                impl_unary!(f32x16: tanh_v16f32);
-                impl_unary!(f64x8: tanh_v8f64);
-
-                impl_unary!(f32x4: tanh_v4f32);
-                impl_unary!(f32x8: tanh_v8f32);
-                impl_unary!(f64x2: tanh_v2f64);
-                impl_unary!(f64x4: tanh_v4f64);
-            }
-        }
-    } else {
-        impl_unary!(f32x2[f32; 2]: tanh_f32);
-        impl_unary!(f32x4: tanh_v4f32);
-        impl_unary!(f32x8: tanh_v8f32);
-        impl_unary!(f32x16: tanh_v16f32);
-
-        impl_unary!(f64x2: tanh_v2f64);
-        impl_unary!(f64x4: tanh_v4f64);
-        impl_unary!(f64x8: tanh_v8f64);
-    }
-}
diff --git a/vendor/packed_simd_2/src/lib.rs b/vendor/packed_simd_2/src/lib.rs
deleted file mode 100644
index 277cc818b..000000000
--- a/vendor/packed_simd_2/src/lib.rs
+++ /dev/null
@@ -1,347 +0,0 @@
-//! # Portable packed SIMD vectors
-//!
-//! This crate is proposed for stabilization as `std::packed_simd` in [RFC2366:
-//! `std::simd`](https://github.com/rust-lang/rfcs/pull/2366) .
-//!
-//! The examples available in the
-//! [`examples/`](https://github.com/rust-lang-nursery/packed_simd/tree/master/examples)
-//! sub-directory of the crate showcase how to use the library in practice.
-//!
-//! ## Table of contents
-//!
-//! - [Introduction](#introduction)
-//! - [Vector types](#vector-types)
-//! - [Conditional operations](#conditional-operations)
-//! - [Conversions](#conversions)
-//! - [Hardware Features](#hardware-features)
-//! - [Performance guide](https://rust-lang-nursery.github.io/packed_simd/perf-guide/)
-//!
-//! ## Introduction
-//!
-//! This crate exports [`Simd<[T; N]>`][`Simd`]: a packed vector of `N`
-//! elements of type `T` as well as many type aliases for this type: for
-//! example, [`f32x4`], which is just an alias for `Simd<[f32; 4]>`.
-//!
-//! The operations on packed vectors are, by default, "vertical", that is, they
-//! are applied to each vector lane in isolation of the others:
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! let a = i32x4::new(1, 2, 3, 4);
-//! let b = i32x4::new(5, 6, 7, 8);
-//! assert_eq!(a + b, i32x4::new(6, 8, 10, 12));
-//! ```
-//!
-//! Many "horizontal" operations are also provided:
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! # let a = i32x4::new(1, 2, 3, 4);
-//! assert_eq!(a.wrapping_sum(), 10);
-//! ```
-//!
-//! In virtually all architectures vertical operations are fast, while
-//! horizontal operations are, by comparison, much slower. That is, the
-//! most portably-efficient way of performing a reduction over a slice
-//! is to collect the results into a vector using vertical operations,
-//! and performing a single horizontal operation at the end:
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! fn reduce(x: &[i32]) -> i32 {
-//!     assert_eq!(x.len() % 4, 0);
-//!     let mut sum = i32x4::splat(0); // [0, 0, 0, 0]
-//!     for i in (0..x.len()).step_by(4) {
-//!         sum += i32x4::from_slice_unaligned(&x[i..]);
-//!     }
-//!     sum.wrapping_sum()
-//! }
-//!
-//! let x = [0, 1, 2, 3, 4, 5, 6, 7];
-//! assert_eq!(reduce(&x), 28);
-//! ```
-//!
-//! ## Vector types
-//!
-//! The vector type aliases are named according to the following scheme:
-//!
-//! > `{element_type}x{number_of_lanes} == Simd<[element_type;
-//! number_of_lanes]>`
-//!
-//! where the following element types are supported:
-//!
-//! * `i{element_width}`: signed integer
-//! * `u{element_width}`: unsigned integer
-//! * `f{element_width}`: float
-//! * `m{element_width}`: mask (see below)
-//! * `*{const,mut} T`: `const` and `mut` pointers
-//!
-//! ## Basic operations
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! // Sets all elements to `0`:
-//! let a = i32x4::splat(0);
-//!
-//! // Reads a vector from a slice:
-//! let mut arr = [0, 0, 0, 1, 2, 3, 4, 5];
-//! let b = i32x4::from_slice_unaligned(&arr);
-//!
-//! // Reads the 4-th element of a vector:
-//! assert_eq!(b.extract(3), 1);
-//!
-//! // Returns a new vector where the 4-th element is replaced with `1`:
-//! let a = a.replace(3, 1);
-//! assert_eq!(a, b);
-//!
-//! // Writes a vector to a slice:
-//! let a = a.replace(2, 1);
-//! a.write_to_slice_unaligned(&mut arr[4..]);
-//! assert_eq!(arr, [0, 0, 0, 1, 0, 0, 1, 1]);
-//! ```
-//!
-//! ## Conditional operations
-//!
-//! One often needs to perform an operation on some lanes of the vector. Vector
-//! masks, like `m32x4`, allow selecting on which vector lanes an operation is
-//! to be performed:
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! let a = i32x4::new(1, 1, 2, 2);
-//!
-//! // Add `1` to the first two lanes of the vector.
-//! let m = m16x4::new(true, true, false, false);
-//! let a = m.select(a + 1, a);
-//! assert_eq!(a, i32x4::splat(2));
-//! ```
-//!
-//! The elements of a vector mask are either `true` or `false`. Here `true`
-//! means that a lane is "selected", while `false` means that a lane is not
-//! selected.
-//!
-//! All vector masks implement a `mask.select(a: T, b: T) -> T` method that
-//! works on all vectors that have the same number of lanes as the mask. The
-//! resulting vector contains the elements of `a` for those lanes for which the
-//! mask is `true`, and the elements of `b` otherwise.
-//!
-//! The example constructs a mask with the first two lanes set to `true` and
-//! the last two lanes set to `false`. This selects the first two lanes of `a +
-//! 1` and the last two lanes of `a`, producing a vector where the first two
-//! lanes have been incremented by `1`.
-//!
-//! > note: mask `select` can be used on vector types that have the same number
-//! > of lanes as the mask. The example shows this by using [`m16x4`] instead
-//! > of [`m32x4`]. It is _typically_ more performant to use a mask element
-//! > width equal to the element width of the vectors being operated upon.
-//! > This is, however, not true for 512-bit wide vectors when targeting
-//! > AVX-512, where the most efficient masks use only 1-bit per element.
-//!
-//! All vertical comparison operations returns masks:
-//!
-//! ```
-//! # use packed_simd_2::*;
-//! let a = i32x4::new(1, 1, 3, 3);
-//! let b = i32x4::new(2, 2, 0, 0);
-//!
-//! // ge: >= (Greater Eequal; see also lt, le, gt, eq, ne).
-//! let m = a.ge(i32x4::splat(2));
-//!
-//! if m.any() {
-//!     // all / any / none allow coherent control flow
-//!     let d = m.select(a, b);
-//!     assert_eq!(d, i32x4::new(2, 2, 3, 3));
-//! }
-//! ```
-//!
-//! ## Conversions
-//!
-//! * **lossless widening conversions**: [`From`]/[`Into`] are implemented for
-//!   vectors with the same number of lanes when the conversion is value
-//! preserving   (same as in `std`).
-//!
-//! * **safe bitwise conversions**: The cargo feature `into_bits` provides the
-//!   `IntoBits/FromBits` traits (`x.into_bits()`). These perform safe bitwise
-//!   `transmute`s when all bit patterns of the source type are valid bit
-//!   patterns of the target type and are also implemented for the
-//!   architecture-specific vector types of `std::arch`. For example, `let x:
-//!   u8x8 = m8x8::splat(true).into_bits();` is provided because all `m8x8` bit
-//!   patterns are valid `u8x8` bit patterns. However, the opposite is not
-//! true,   not all `u8x8` bit patterns are valid `m8x8` bit-patterns, so this
-//!   operation cannot be performed safely using `x.into_bits()`; one needs to
-//!   use `unsafe { crate::mem::transmute(x) }` for that, making sure that the
-//!   value in the `u8x8` is a valid bit-pattern of `m8x8`.
-//!
-//! * **numeric casts** (`as`): are performed using [`FromCast`]/[`Cast`]
-//! (`x.cast()`), just like `as`:
-//!
-//!   * casting integer vectors whose lane types have the same size (e.g.
-//! `i32xN`     -> `u32xN`) is a **no-op**,
-//!
-//!   * casting from a larger integer to a smaller integer (e.g. `u32xN` ->
-//! `u8xN`)     will **truncate**,
-//!
-//!   * casting from a smaller integer to a larger integer     (e.g. `u8xN` ->
-//!     `u32xN`) will:
-//!        * **zero-extend** if the source is unsigned, or
-//!        * **sign-extend** if the source is signed,
-//!
-//!   * casting from a float to an integer will **round the float towards
-//! zero**,
-//!
-//!   * casting from an integer to float will produce the floating point
-//!     representation of the integer, **rounding to nearest, ties to even**,
-//!
-//!   * casting from an `f32` to an `f64` is perfect and lossless,
-//!
-//!   * casting from an `f64` to an `f32` **rounds to nearest, ties to even**.
-//!
-//!   Numeric casts are not very "precise": sometimes lossy, sometimes value
-//!   preserving, etc.
-//!
-//! ## Hardware Features
-//!
-//! This crate can use different hardware features based on your configured
-//! `RUSTFLAGS`. For example, with no configured `RUSTFLAGS`, `u64x8` on
-//! x86_64 will use SSE2 operations like `PCMPEQD`. If you configure
-//! `RUSTFLAGS='-C target-feature=+avx2,+avx'` on supported x86_64 hardware
-//! the same `u64x8` may use wider AVX2 operations like `VPCMPEQQ`. It is
-//! important for performance and for hardware support requirements that
-//! you choose an appropriate set of `target-feature` and `target-cpu`
-//! options during builds. For more information, see the [Performance
-//! guide](https://rust-lang-nursery.github.io/packed_simd/perf-guide/)
-
-#![feature(
-    adt_const_params,
-    repr_simd,
-    rustc_attrs,
-    platform_intrinsics,
-    stdsimd,
-    arm_target_feature,
-    link_llvm_intrinsics,
-    core_intrinsics,
-    stmt_expr_attributes,
-    custom_inner_attributes,
-)]
-#![allow(non_camel_case_types, non_snake_case,
-        // FIXME: these types are unsound in C FFI already
-        // See https://github.com/rust-lang/rust/issues/53346
-        improper_ctypes_definitions,
-        incomplete_features,
-        clippy::cast_possible_truncation,
-        clippy::cast_lossless,
-        clippy::cast_possible_wrap,
-        clippy::cast_precision_loss,
-        // TODO: manually add the `#[must_use]` attribute where appropriate
-        clippy::must_use_candidate,
-        // This lint is currently broken for generic code
-        // See https://github.com/rust-lang/rust-clippy/issues/3410
-        clippy::use_self,
-        clippy::wrong_self_convention,
-        clippy::from_over_into,
-)]
-#![cfg_attr(test, feature(hashmap_internals))]
-#![deny(rust_2018_idioms, clippy::missing_inline_in_public_items)]
-#![no_std]
-
-use cfg_if::cfg_if;
-
-cfg_if! {
-    if #[cfg(feature = "core_arch")] {
-        #[allow(unused_imports)]
-        use core_arch as arch;
-    } else {
-        #[allow(unused_imports)]
-        use core::arch;
-    }
-}
-
-#[cfg(all(target_arch = "wasm32", test))]
-use wasm_bindgen_test::*;
-
-#[allow(unused_imports)]
-use core::{
-    /* arch (handled above), */ cmp, f32, f64, fmt, hash, hint, i128, i16, i32, i64, i8, intrinsics,
-    isize, iter, marker, mem, ops, ptr, slice, u128, u16, u32, u64, u8, usize,
-};
-
-#[macro_use]
-mod testing;
-#[macro_use]
-mod api;
-mod codegen;
-mod sealed;
-
-pub use crate::sealed::{Mask, Shuffle, Simd as SimdVector, SimdArray};
-
-/// Packed SIMD vector type.
-///
-/// # Examples
-///
-/// ```
-/// # use packed_simd_2::Simd;
-/// let v = Simd::<[i32; 4]>::new(0, 1, 2, 3);
-/// assert_eq!(v.extract(2), 2);
-/// ```
-#[repr(transparent)]
-#[derive(Copy, Clone)]
-pub struct Simd<A: sealed::SimdArray>(
-    // FIXME: this type should be private,
-    // but it currently must be public for the
-    // `shuffle!` macro to work: it needs to
-    // access the internal `repr(simd)` type
-    // to call the shuffle intrinsics.
-    #[doc(hidden)] pub <A as sealed::SimdArray>::Tuple,
-);
-
-impl<A: sealed::SimdArray> sealed::Seal for Simd<A> {}
-
-/// Wrapper over `T` implementing a lexicoraphical order via the `PartialOrd`
-/// and/or `Ord` traits.
-#[repr(transparent)]
-#[derive(Copy, Clone, Debug)]
-#[allow(clippy::missing_inline_in_public_items)]
-pub struct LexicographicallyOrdered<T>(T);
-
-mod masks;
-pub use self::masks::*;
-
-mod v16;
-pub use self::v16::*;
-
-mod v32;
-pub use self::v32::*;
-
-mod v64;
-pub use self::v64::*;
-
-mod v128;
-pub use self::v128::*;
-
-mod v256;
-pub use self::v256::*;
-
-mod v512;
-pub use self::v512::*;
-
-mod vSize;
-pub use self::vSize::*;
-
-mod vPtr;
-pub use self::vPtr::*;
-
-pub use self::api::cast::*;
-
-#[cfg(feature = "into_bits")]
-pub use self::api::into_bits::*;
-
-// Re-export the shuffle intrinsics required by the `shuffle!` macro.
-#[doc(hidden)]
-pub use self::codegen::llvm::{
-    __shuffle_vector16, __shuffle_vector2, __shuffle_vector32, __shuffle_vector4, __shuffle_vector64,
-    __shuffle_vector8,
-};
-
-pub(crate) mod llvm {
-    pub(crate) use crate::codegen::llvm::*;
-}