diff options
Diffstat (limited to '')
4 files changed, 54 insertions, 35 deletions
diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs b/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs index bcfb1a6e1..4bf509806 100644 --- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs +++ b/vendor/packed_simd_2/src/codegen/reductions/mask/x86.rs @@ -114,17 +114,17 @@ macro_rules! x86_m64x4_impl { /// Fallback implementation. macro_rules! x86_intr_impl { ($id:ident) => { - impl All for $id { - #[inline] - unsafe fn all(self) -> bool { - use crate::llvm::simd_reduce_all; - simd_reduce_all(self.0) + impl All for $id { + #[inline] + unsafe fn all(self) -> bool { + use crate::llvm::simd_reduce_all; + simd_reduce_all(self.0) + } } - } impl Any for $id { #[inline] unsafe fn any(self) -> bool { - use crate::llvm::simd_reduce_any; + use crate::llvm::simd_reduce_any; simd_reduce_any(self.0) } } @@ -134,21 +134,47 @@ macro_rules! x86_intr_impl { /// Mask reduction implementation for `x86` and `x86_64` targets macro_rules! impl_mask_reductions { // 64-bit wide masks - (m8x8) => { x86_m8x8_impl!(m8x8); }; - (m16x4) => { x86_m8x8_impl!(m16x4); }; - (m32x2) => { x86_m8x8_impl!(m32x2); }; + (m8x8) => { + x86_m8x8_impl!(m8x8); + }; + (m16x4) => { + x86_m8x8_impl!(m16x4); + }; + (m32x2) => { + x86_m8x8_impl!(m32x2); + }; // 128-bit wide masks - (m8x16) => { x86_m8x16_impl!(m8x16); }; - (m16x8) => { x86_m8x16_impl!(m16x8); }; - (m32x4) => { x86_m32x4_impl!(m32x4); }; - (m64x2) => { x86_m64x2_impl!(m64x2); }; - (m128x1) => { x86_intr_impl!(m128x1); }; + (m8x16) => { + x86_m8x16_impl!(m8x16); + }; + (m16x8) => { + x86_m8x16_impl!(m16x8); + }; + (m32x4) => { + x86_m32x4_impl!(m32x4); + }; + (m64x2) => { + x86_m64x2_impl!(m64x2); + }; + (m128x1) => { + x86_intr_impl!(m128x1); + }; // 256-bit wide masks: - (m8x32) => { x86_m8x32_impl!(m8x32, m8x16); }; - (m16x16) => { x86_m8x32_impl!(m16x16, m16x8); }; - (m32x8) => { x86_m32x8_impl!(m32x8, m32x4); }; - (m64x4) => { x86_m64x4_impl!(m64x4, m64x2); }; - (m128x2) => { x86_intr_impl!(m128x2); }; + (m8x32) => { + x86_m8x32_impl!(m8x32, m8x16); + }; + (m16x16) => { + x86_m8x32_impl!(m16x16, m16x8); + }; + (m32x8) => { + x86_m32x8_impl!(m32x8, m32x4); + }; + (m64x4) => { + x86_m64x4_impl!(m64x4, m64x2); + }; + (m128x2) => { + x86_intr_impl!(m128x2); + }; (msizex2) => { cfg_if! { if #[cfg(target_pointer_width = "64")] { @@ -184,5 +210,7 @@ macro_rules! impl_mask_reductions { }; // Fallback to LLVM's default code-generation: - ($id:ident) => { fallback_impl!($id); }; + ($id:ident) => { + fallback_impl!($id); + }; } diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs index d18736fb0..61f352d22 100644 --- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs +++ b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/avx.rs @@ -13,10 +13,7 @@ macro_rules! x86_m8x32_avx_impl { use crate::arch::x86::_mm256_testc_si256; #[cfg(target_arch = "x86_64")] use crate::arch::x86_64::_mm256_testc_si256; - _mm256_testc_si256( - crate::mem::transmute(self), - crate::mem::transmute($id::splat(true)), - ) != 0 + _mm256_testc_si256(crate::mem::transmute(self), crate::mem::transmute($id::splat(true))) != 0 } } impl Any for $id { @@ -27,10 +24,7 @@ macro_rules! x86_m8x32_avx_impl { use crate::arch::x86::_mm256_testz_si256; #[cfg(target_arch = "x86_64")] use crate::arch::x86_64::_mm256_testz_si256; - _mm256_testz_si256( - crate::mem::transmute(self), - crate::mem::transmute(self), - ) == 0 + _mm256_testz_si256(crate::mem::transmute(self), crate::mem::transmute(self)) == 0 } } }; diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs index eb1ef7fac..e0c9aee92 100644 --- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs +++ b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse.rs @@ -16,8 +16,7 @@ macro_rules! x86_m32x4_sse_impl { // most significant bit of each lane of `a`. If all // bits are set, then all 4 lanes of the mask are // true. - _mm_movemask_ps(crate::mem::transmute(self)) - == 0b_1111_i32 + _mm_movemask_ps(crate::mem::transmute(self)) == 0b_1111_i32 } } impl Any for $id { diff --git a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs index a99c606f5..bbb52fa47 100644 --- a/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs +++ b/vendor/packed_simd_2/src/codegen/reductions/mask/x86/sse2.rs @@ -16,8 +16,7 @@ macro_rules! x86_m64x2_sse2_impl { // most significant bit of each lane of `a`. If all // bits are set, then all 2 lanes of the mask are // true. - _mm_movemask_pd(crate::mem::transmute(self)) - == 0b_11_i32 + _mm_movemask_pd(crate::mem::transmute(self)) == 0b_11_i32 } } impl Any for $id { @@ -50,8 +49,7 @@ macro_rules! x86_m8x16_sse2_impl { // most significant bit of each byte of `a`. If all // bits are set, then all 16 lanes of the mask are // true. - _mm_movemask_epi8(crate::mem::transmute(self)) - == i32::from(u16::max_value()) + _mm_movemask_epi8(crate::mem::transmute(self)) == i32::from(u16::max_value()) } } impl Any for $id { |