From 698f8c2f01ea549d77d7dc3338a12e04c11057b9 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 17 Apr 2024 14:02:58 +0200 Subject: Adding upstream version 1.64.0+dfsg1. Signed-off-by: Daniel Baumann --- .../spec/thumbv7neon_unknown_linux_musleabihf.rs | 29 ++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 compiler/rustc_target/src/spec/thumbv7neon_unknown_linux_musleabihf.rs (limited to 'compiler/rustc_target/src/spec/thumbv7neon_unknown_linux_musleabihf.rs') diff --git a/compiler/rustc_target/src/spec/thumbv7neon_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/thumbv7neon_unknown_linux_musleabihf.rs new file mode 100644 index 000000000..2c375ab22 --- /dev/null +++ b/compiler/rustc_target/src/spec/thumbv7neon_unknown_linux_musleabihf.rs @@ -0,0 +1,29 @@ +use crate::spec::{Target, TargetOptions}; + +// This target is for musl Linux on ARMv7 with thumb mode enabled +// (for consistency with Android and Debian-based distributions) +// and with NEON unconditionally enabled and, therefore, with 32 FPU +// registers enabled as well. See section A2.6.2 on page A2-56 in +// https://static.docs.arm.com/ddi0406/cd/DDI0406C_d_armv7ar_arm.pdf + +pub fn target() -> Target { + Target { + // It's important we use "gnueabihf" and not "musleabihf" here. LLVM + // uses it to determine the calling convention and float ABI, and LLVM + // doesn't support the "musleabihf" value. + llvm_target: "armv7-unknown-linux-gnueabihf".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + // Most of these settings are copied from the thumbv7neon_unknown_linux_gnueabihf + // target. + options: TargetOptions { + abi: "eabihf".into(), + features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(), + max_atomic_width: Some(64), + mcount: "\u{1}mcount".into(), + ..super::linux_musl_base::opts() + }, + } +} -- cgit v1.2.3