From 1376c5a617be5c25655d0d7cb63e3beaa5a6e026 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 17 Apr 2024 14:20:39 +0200 Subject: Merging upstream version 1.70.0+dfsg1. Signed-off-by: Daniel Baumann --- compiler/rustc_target/src/abi/call/mod.rs | 2 +- compiler/rustc_target/src/asm/aarch64.rs | 4 +- compiler/rustc_target/src/asm/arm.rs | 12 ++-- compiler/rustc_target/src/asm/m68k.rs | 81 ++++++++++++++++++++++ compiler/rustc_target/src/asm/mod.rs | 45 +++++++++--- compiler/rustc_target/src/asm/riscv.rs | 4 +- compiler/rustc_target/src/asm/x86.rs | 10 +-- .../src/spec/aarch64_unknown_linux_ohos.rs | 32 +++++++++ .../src/spec/aarch64_unknown_nto_qnx_710.rs | 1 + compiler/rustc_target/src/spec/abi.rs | 4 +- compiler/rustc_target/src/spec/armv4t_none_eabi.rs | 11 +-- .../src/spec/armv7_unknown_linux_ohos.rs | 28 ++++++++ .../rustc_target/src/spec/i586_pc_nto_qnx700.rs | 24 +++++++ .../src/spec/loongarch64_unknown_linux_gnu.rs | 17 +++++ compiler/rustc_target/src/spec/mod.rs | 22 +++++- compiler/rustc_target/src/spec/msvc_base.rs | 1 + compiler/rustc_target/src/spec/nto_qnx_base.rs | 1 - .../src/spec/riscv64gc_unknown_fuchsia.rs | 19 +++++ .../rustc_target/src/spec/thumbv4t_none_eabi.rs | 11 +-- compiler/rustc_target/src/spec/wasm_base.rs | 8 +++ compiler/rustc_target/src/spec/windows_gnu_base.rs | 1 + .../rustc_target/src/spec/windows_gnullvm_base.rs | 1 + .../rustc_target/src/spec/x86_64_pc_nto_qnx710.rs | 1 + 23 files changed, 289 insertions(+), 51 deletions(-) create mode 100644 compiler/rustc_target/src/asm/m68k.rs create mode 100644 compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs create mode 100644 compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs create mode 100644 compiler/rustc_target/src/spec/i586_pc_nto_qnx700.rs create mode 100644 compiler/rustc_target/src/spec/loongarch64_unknown_linux_gnu.rs create mode 100644 compiler/rustc_target/src/spec/riscv64gc_unknown_fuchsia.rs (limited to 'compiler/rustc_target/src') diff --git a/compiler/rustc_target/src/abi/call/mod.rs b/compiler/rustc_target/src/abi/call/mod.rs index a0730fbb6..57011aa8a 100644 --- a/compiler/rustc_target/src/abi/call/mod.rs +++ b/compiler/rustc_target/src/abi/call/mod.rs @@ -755,7 +755,7 @@ impl FromStr for Conv { "AmdGpuKernel" => Ok(Conv::AmdGpuKernel), "AvrInterrupt" => Ok(Conv::AvrInterrupt), "AvrNonBlockingInterrupt" => Ok(Conv::AvrNonBlockingInterrupt), - _ => Err(format!("'{s}' is not a valid value for entry function call convetion.")), + _ => Err(format!("'{s}' is not a valid value for entry function call convention.")), } } } diff --git a/compiler/rustc_target/src/asm/aarch64.rs b/compiler/rustc_target/src/asm/aarch64.rs index 28493c770..97132311a 100644 --- a/compiler/rustc_target/src/asm/aarch64.rs +++ b/compiler/rustc_target/src/asm/aarch64.rs @@ -1,6 +1,6 @@ use super::{InlineAsmArch, InlineAsmType}; use crate::spec::{RelocModel, Target}; -use rustc_data_structures::fx::FxHashSet; +use rustc_data_structures::fx::FxIndexSet; use rustc_macros::HashStable_Generic; use rustc_span::Symbol; use std::fmt; @@ -80,7 +80,7 @@ pub fn target_reserves_x18(target: &Target) -> bool { fn reserved_x18( _arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxHashSet, + _target_features: &FxIndexSet, target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { diff --git a/compiler/rustc_target/src/asm/arm.rs b/compiler/rustc_target/src/asm/arm.rs index ec7429a30..514e30ae0 100644 --- a/compiler/rustc_target/src/asm/arm.rs +++ b/compiler/rustc_target/src/asm/arm.rs @@ -1,6 +1,6 @@ use super::{InlineAsmArch, InlineAsmType}; use crate::spec::{RelocModel, Target}; -use rustc_data_structures::fx::FxHashSet; +use rustc_data_structures::fx::FxIndexSet; use rustc_macros::HashStable_Generic; use rustc_span::{sym, Symbol}; use std::fmt; @@ -64,14 +64,14 @@ impl ArmInlineAsmRegClass { } // This uses the same logic as useR7AsFramePointer in LLVM -fn frame_pointer_is_r7(target_features: &FxHashSet, target: &Target) -> bool { +fn frame_pointer_is_r7(target_features: &FxIndexSet, target: &Target) -> bool { target.is_like_osx || (!target.is_like_windows && target_features.contains(&sym::thumb_mode)) } fn frame_pointer_r11( arch: InlineAsmArch, reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, target: &Target, is_clobber: bool, ) -> Result<(), &'static str> { @@ -87,7 +87,7 @@ fn frame_pointer_r11( fn frame_pointer_r7( _arch: InlineAsmArch, _reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { @@ -101,7 +101,7 @@ fn frame_pointer_r7( fn not_thumb1( _arch: InlineAsmArch, _reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, _target: &Target, is_clobber: bool, ) -> Result<(), &'static str> { @@ -118,7 +118,7 @@ fn not_thumb1( fn reserved_r9( arch: InlineAsmArch, reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, target: &Target, is_clobber: bool, ) -> Result<(), &'static str> { diff --git a/compiler/rustc_target/src/asm/m68k.rs b/compiler/rustc_target/src/asm/m68k.rs new file mode 100644 index 000000000..8c857550c --- /dev/null +++ b/compiler/rustc_target/src/asm/m68k.rs @@ -0,0 +1,81 @@ +use super::{InlineAsmArch, InlineAsmType}; +use rustc_macros::HashStable_Generic; +use rustc_span::Symbol; +use std::fmt; + +def_reg_class! { + M68k M68kInlineAsmRegClass { + reg, + reg_addr, + reg_data, + } +} + +impl M68kInlineAsmRegClass { + pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] { + &[] + } + + pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option { + None + } + + pub fn suggest_modifier( + self, + _arch: InlineAsmArch, + _ty: InlineAsmType, + ) -> Option<(char, &'static str)> { + None + } + + pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> { + None + } + + pub fn supported_types( + self, + _arch: InlineAsmArch, + ) -> &'static [(InlineAsmType, Option)] { + match self { + Self::reg => types! { _: I16, I32; }, + Self::reg_data => types! { _: I8, I16, I32; }, + Self::reg_addr => types! { _: I16, I32; }, + } + } +} + +def_regs! { + M68k M68kInlineAsmReg M68kInlineAsmRegClass { + d0: reg, reg_data = ["d0"], + d1: reg, reg_data = ["d1"], + d2: reg, reg_data = ["d2"], + d3: reg, reg_data = ["d3"], + d4: reg, reg_data = ["d4"], + d5: reg, reg_data = ["d5"], + d6: reg, reg_data = ["d6"], + d7: reg, reg_data = ["d7"], + a0: reg, reg_addr = ["a0"], + a1: reg, reg_addr = ["a1"], + a2: reg, reg_addr = ["a2"], + a3: reg, reg_addr = ["a3"], + #error = ["a4"] => + "a4 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a5", "bp"] => + "a5 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a6", "fp"] => + "a6 is used internally by LLVM and cannot be used as an operand for inline asm", + #error = ["a7", "sp", "usp", "ssp", "isp"] => + "the stack pointer cannot be used as an operand for inline asm", + } +} + +impl M68kInlineAsmReg { + pub fn emit( + self, + out: &mut dyn fmt::Write, + _arch: InlineAsmArch, + _modifier: Option, + ) -> fmt::Result { + out.write_str(self.name()) + } +} diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index 70cd883be..3f9c850b3 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -1,6 +1,6 @@ use crate::spec::Target; use crate::{abi::Size, spec::RelocModel}; -use rustc_data_structures::fx::{FxHashMap, FxHashSet}; +use rustc_data_structures::fx::{FxHashMap, FxIndexSet}; use rustc_macros::HashStable_Generic; use rustc_span::Symbol; use std::fmt; @@ -37,13 +37,14 @@ macro_rules! def_reg_class { pub(super) fn regclass_map() -> rustc_data_structures::fx::FxHashMap< super::InlineAsmRegClass, - rustc_data_structures::fx::FxHashSet, + rustc_data_structures::fx::FxIndexSet, > { - use rustc_data_structures::fx::{FxHashMap, FxHashSet}; + use rustc_data_structures::fx::FxHashMap; + use rustc_data_structures::fx::FxIndexSet; use super::InlineAsmRegClass; let mut map = FxHashMap::default(); $( - map.insert(InlineAsmRegClass::$arch($arch_regclass::$class), FxHashSet::default()); + map.insert(InlineAsmRegClass::$arch($arch_regclass::$class), FxIndexSet::default()); )* map } @@ -94,7 +95,7 @@ macro_rules! def_regs { pub fn validate(self, _arch: super::InlineAsmArch, _reloc_model: crate::spec::RelocModel, - _target_features: &rustc_data_structures::fx::FxHashSet, + _target_features: &rustc_data_structures::fx::FxIndexSet, _target: &crate::spec::Target, _is_clobber: bool, ) -> Result<(), &'static str> { @@ -118,11 +119,11 @@ macro_rules! def_regs { pub(super) fn fill_reg_map( _arch: super::InlineAsmArch, _reloc_model: crate::spec::RelocModel, - _target_features: &rustc_data_structures::fx::FxHashSet, + _target_features: &rustc_data_structures::fx::FxIndexSet, _target: &crate::spec::Target, _map: &mut rustc_data_structures::fx::FxHashMap< super::InlineAsmRegClass, - rustc_data_structures::fx::FxHashSet, + rustc_data_structures::fx::FxIndexSet, >, ) { #[allow(unused_imports)] @@ -167,6 +168,7 @@ mod arm; mod avr; mod bpf; mod hexagon; +mod m68k; mod mips; mod msp430; mod nvptx; @@ -182,6 +184,7 @@ pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass}; pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass}; pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass}; pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass}; +pub use m68k::{M68kInlineAsmReg, M68kInlineAsmRegClass}; pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass}; pub use msp430::{Msp430InlineAsmReg, Msp430InlineAsmRegClass}; pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass}; @@ -213,6 +216,7 @@ pub enum InlineAsmArch { Bpf, Avr, Msp430, + M68k, } impl FromStr for InlineAsmArch { @@ -239,6 +243,7 @@ impl FromStr for InlineAsmArch { "bpf" => Ok(Self::Bpf), "avr" => Ok(Self::Avr), "msp430" => Ok(Self::Msp430), + "m68k" => Ok(Self::M68k), _ => Err(()), } } @@ -261,6 +266,7 @@ pub enum InlineAsmReg { Bpf(BpfInlineAsmReg), Avr(AvrInlineAsmReg), Msp430(Msp430InlineAsmReg), + M68k(M68kInlineAsmReg), // Placeholder for invalid register constraints for the current target Err, } @@ -279,6 +285,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.name(), Self::Avr(r) => r.name(), Self::Msp430(r) => r.name(), + Self::M68k(r) => r.name(), Self::Err => "", } } @@ -296,6 +303,7 @@ impl InlineAsmReg { Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()), Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()), Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()), + Self::M68k(r) => InlineAsmRegClass::M68k(r.reg_class()), Self::Err => InlineAsmRegClass::Err, } } @@ -327,6 +335,7 @@ impl InlineAsmReg { InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmReg::parse(name)?), InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?), InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?), + InlineAsmArch::M68k => Self::M68k(M68kInlineAsmReg::parse(name)?), }) } @@ -334,7 +343,7 @@ impl InlineAsmReg { self, arch: InlineAsmArch, reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, target: &Target, is_clobber: bool, ) -> Result<(), &'static str> { @@ -350,6 +359,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), + Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber), Self::Err => unreachable!(), } } @@ -374,6 +384,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.emit(out, arch, modifier), Self::Avr(r) => r.emit(out, arch, modifier), Self::Msp430(r) => r.emit(out, arch, modifier), + Self::M68k(r) => r.emit(out, arch, modifier), Self::Err => unreachable!("Use of InlineAsmReg::Err"), } } @@ -391,6 +402,7 @@ impl InlineAsmReg { Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))), Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))), Self::Msp430(_) => cb(self), + Self::M68k(_) => cb(self), Self::Err => unreachable!("Use of InlineAsmReg::Err"), } } @@ -413,6 +425,7 @@ pub enum InlineAsmRegClass { Bpf(BpfInlineAsmRegClass), Avr(AvrInlineAsmRegClass), Msp430(Msp430InlineAsmRegClass), + M68k(M68kInlineAsmRegClass), // Placeholder for invalid register constraints for the current target Err, } @@ -434,6 +447,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.name(), Self::Avr(r) => r.name(), Self::Msp430(r) => r.name(), + Self::M68k(r) => r.name(), Self::Err => rustc_span::symbol::sym::reg, } } @@ -457,6 +471,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf), Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr), Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430), + Self::M68k(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::M68k), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -487,6 +502,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.suggest_modifier(arch, ty), Self::Avr(r) => r.suggest_modifier(arch, ty), Self::Msp430(r) => r.suggest_modifier(arch, ty), + Self::M68k(r) => r.suggest_modifier(arch, ty), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -513,6 +529,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.default_modifier(arch), Self::Avr(r) => r.default_modifier(arch), Self::Msp430(r) => r.default_modifier(arch), + Self::M68k(r) => r.default_modifier(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -538,6 +555,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.supported_types(arch), Self::Avr(r) => r.supported_types(arch), Self::Msp430(r) => r.supported_types(arch), + Self::M68k(r) => r.supported_types(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -568,6 +586,7 @@ impl InlineAsmRegClass { InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?), InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?), InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?), + InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?), }) } @@ -589,6 +608,7 @@ impl InlineAsmRegClass { Self::Bpf(r) => r.valid_modifiers(arch), Self::Avr(r) => r.valid_modifiers(arch), Self::Msp430(r) => r.valid_modifiers(arch), + Self::M68k(r) => r.valid_modifiers(arch), Self::Err => unreachable!("Use of InlineAsmRegClass::Err"), } } @@ -701,9 +721,9 @@ impl fmt::Display for InlineAsmType { pub fn allocatable_registers( arch: InlineAsmArch, reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, target: &crate::spec::Target, -) -> FxHashMap> { +) -> FxHashMap> { match arch { InlineAsmArch::X86 | InlineAsmArch::X86_64 => { let mut map = x86::regclass_map(); @@ -775,6 +795,11 @@ pub fn allocatable_registers( msp430::fill_reg_map(arch, reloc_model, target_features, target, &mut map); map } + InlineAsmArch::M68k => { + let mut map = m68k::regclass_map(); + m68k::fill_reg_map(arch, reloc_model, target_features, target, &mut map); + map + } } } diff --git a/compiler/rustc_target/src/asm/riscv.rs b/compiler/rustc_target/src/asm/riscv.rs index e41bdc9a5..dea6d50fe 100644 --- a/compiler/rustc_target/src/asm/riscv.rs +++ b/compiler/rustc_target/src/asm/riscv.rs @@ -1,6 +1,6 @@ use super::{InlineAsmArch, InlineAsmType}; use crate::spec::{RelocModel, Target}; -use rustc_data_structures::fx::FxHashSet; +use rustc_data_structures::fx::FxIndexSet; use rustc_macros::HashStable_Generic; use rustc_span::{sym, Symbol}; use std::fmt; @@ -55,7 +55,7 @@ impl RiscVInlineAsmRegClass { fn not_e( _arch: InlineAsmArch, _reloc_model: RelocModel, - target_features: &FxHashSet, + target_features: &FxIndexSet, _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { diff --git a/compiler/rustc_target/src/asm/x86.rs b/compiler/rustc_target/src/asm/x86.rs index 5eae07f14..3902dac7f 100644 --- a/compiler/rustc_target/src/asm/x86.rs +++ b/compiler/rustc_target/src/asm/x86.rs @@ -1,6 +1,6 @@ use super::{InlineAsmArch, InlineAsmType}; use crate::spec::{RelocModel, Target}; -use rustc_data_structures::fx::FxHashSet; +use rustc_data_structures::fx::FxIndexSet; use rustc_macros::HashStable_Generic; use rustc_span::Symbol; use std::fmt; @@ -147,7 +147,7 @@ impl X86InlineAsmRegClass { fn x86_64_only( arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxHashSet, + _target_features: &FxIndexSet, _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { @@ -161,7 +161,7 @@ fn x86_64_only( fn high_byte( arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxHashSet, + _target_features: &FxIndexSet, _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { @@ -174,7 +174,7 @@ fn high_byte( fn rbx_reserved( arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxHashSet, + _target_features: &FxIndexSet, _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { @@ -190,7 +190,7 @@ fn rbx_reserved( fn esi_reserved( arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxHashSet, + _target_features: &FxIndexSet, _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs new file mode 100644 index 000000000..bf1b089f6 --- /dev/null +++ b/compiler/rustc_target/src/spec/aarch64_unknown_linux_ohos.rs @@ -0,0 +1,32 @@ +use crate::spec::{Target, TargetOptions}; + +use super::SanitizerSet; + +pub fn target() -> Target { + let mut base = super::linux_musl_base::opts(); + base.env = "ohos".into(); + base.crt_static_default = false; + base.max_atomic_width = Some(128); + + Target { + // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead. + llvm_target: "aarch64-unknown-linux-musl".into(), + pointer_width: 64, + data_layout: "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128".into(), + arch: "aarch64".into(), + options: TargetOptions { + features: "+reserve-x18".into(), + mcount: "\u{1}_mcount".into(), + force_emulated_tls: true, + has_thread_local: false, + supported_sanitizers: SanitizerSet::ADDRESS + | SanitizerSet::CFI + | SanitizerSet::LEAK + | SanitizerSet::MEMORY + | SanitizerSet::MEMTAG + | SanitizerSet::THREAD + | SanitizerSet::HWADDRESS, + ..base + }, + } +} diff --git a/compiler/rustc_target/src/spec/aarch64_unknown_nto_qnx_710.rs b/compiler/rustc_target/src/spec/aarch64_unknown_nto_qnx_710.rs index 8c1126ae6..630642dcd 100644 --- a/compiler/rustc_target/src/spec/aarch64_unknown_nto_qnx_710.rs +++ b/compiler/rustc_target/src/spec/aarch64_unknown_nto_qnx_710.rs @@ -23,6 +23,7 @@ pub fn target() -> Target { LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-Vgcc_ntoaarch64le_cxx"], ), + env: "nto71".into(), ..nto_qnx_base::opts() }, } diff --git a/compiler/rustc_target/src/spec/abi.rs b/compiler/rustc_target/src/spec/abi.rs index d4f7ed31b..5582d909f 100644 --- a/compiler/rustc_target/src/spec/abi.rs +++ b/compiler/rustc_target/src/spec/abi.rs @@ -324,8 +324,6 @@ impl Abi { impl fmt::Display for Abi { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - match self { - abi => write!(f, "\"{}\"", abi.name()), - } + write!(f, "\"{}\"", self.name()) } } diff --git a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs index 28b109889..d0f988b27 100644 --- a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs @@ -4,13 +4,6 @@ //! //! Please ping @Lokathor if changes are needed. //! -//! This target profile assumes that you have the ARM binutils in your path -//! (specifically the linker, `arm-none-eabi-ld`). They can be obtained for free -//! for all major OSes from the ARM developer's website, and they may also be -//! available in your system's package manager. Unfortunately, the standard -//! linker that Rust uses (`lld`) only supports as far back as `ARMv5TE`, so we -//! must use the GNU `ld` linker. -//! //! **Important:** This target profile **does not** specify a linker script. You //! just get the default link script when you build a binary for this target. //! The default link script is very likely wrong, so you should use @@ -35,8 +28,8 @@ pub fn target() -> Target { data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), options: TargetOptions { abi: "eabi".into(), - linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::No), - linker: Some("arm-none-eabi-ld".into()), + linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), + linker: Some("rust-lld".into()), asm_args: cvs!["-mthumb-interwork", "-march=armv4t", "-mlittle-endian",], // Force-enable 32-bit atomics, which allows the use of atomic load/store only. // The resulting atomics are ABI incompatible with atomics backed by libatomic. diff --git a/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs new file mode 100644 index 000000000..16da24533 --- /dev/null +++ b/compiler/rustc_target/src/spec/armv7_unknown_linux_ohos.rs @@ -0,0 +1,28 @@ +use crate::spec::{Target, TargetOptions}; + +// This target is for OpenHarmony on ARMv7 Linux with thumb-mode, but no NEON or +// hardfloat. + +pub fn target() -> Target { + // Most of these settings are copied from the armv7_unknown_linux_musleabi + // target. + Target { + // LLVM 15 doesn't support OpenHarmony yet, use a linux target instead. + llvm_target: "armv7-unknown-linux-gnueabi".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), + arch: "arm".into(), + + options: TargetOptions { + abi: "eabi".into(), + features: "+v7,+thumb2,+soft-float,-neon".into(), + max_atomic_width: Some(64), + env: "ohos".into(), + crt_static_default: false, + mcount: "\u{1}mcount".into(), + force_emulated_tls: true, + has_thread_local: false, + ..super::linux_musl_base::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/i586_pc_nto_qnx700.rs b/compiler/rustc_target/src/spec/i586_pc_nto_qnx700.rs new file mode 100644 index 000000000..68afa7fe4 --- /dev/null +++ b/compiler/rustc_target/src/spec/i586_pc_nto_qnx700.rs @@ -0,0 +1,24 @@ +use super::nto_qnx_base; +use crate::spec::{Cc, LinkerFlavor, Lld, StackProbeType, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "i586-pc-unknown".into(), + pointer_width: 32, + data_layout: "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-\ + f64:32:64-f80:32-n8:16:32-S128" + .into(), + arch: "x86".into(), + options: TargetOptions { + cpu: "pentium4".into(), + max_atomic_width: Some(64), + pre_link_args: TargetOptions::link_args( + LinkerFlavor::Gnu(Cc::Yes, Lld::No), + &["-Vgcc_ntox86_cxx"], + ), + env: "nto70".into(), + stack_probes: StackProbeType::X86, + ..nto_qnx_base::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/loongarch64_unknown_linux_gnu.rs b/compiler/rustc_target/src/spec/loongarch64_unknown_linux_gnu.rs new file mode 100644 index 000000000..db8b9c70e --- /dev/null +++ b/compiler/rustc_target/src/spec/loongarch64_unknown_linux_gnu.rs @@ -0,0 +1,17 @@ +use crate::spec::{Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "loongarch64-unknown-linux-gnu".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n64-S128".into(), + arch: "loongarch64".into(), + options: TargetOptions { + cpu: "generic".into(), + features: "+f,+d".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + ..super::linux_gnu_base::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 0d86a3032..4e5a821f0 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -40,6 +40,7 @@ use crate::json::{Json, ToJson}; use crate::spec::abi::{lookup as lookup_abi, Abi}; use crate::spec::crt_objects::{CrtObjects, LinkSelfContainedDefault}; use rustc_data_structures::stable_hasher::{HashStable, StableHasher}; +use rustc_fs_util::try_canonicalize; use rustc_serialize::{Decodable, Decoder, Encodable, Encoder}; use rustc_span::symbol::{sym, Symbol}; use serde_json::Value; @@ -122,7 +123,7 @@ pub enum Lld { /// target properties, in accordance with the first design goal. /// /// The first component of the flavor is tightly coupled with the compilation target, -/// while the `Cc` and `Lld` flags can vary withing the same target. +/// while the `Cc` and `Lld` flags can vary within the same target. #[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd)] pub enum LinkerFlavor { /// Unix-like linker with GNU extensions (both naked and compiler-wrapped forms). @@ -1020,6 +1021,7 @@ supported_targets! { ("x86_64-unknown-linux-gnux32", x86_64_unknown_linux_gnux32), ("i686-unknown-linux-gnu", i686_unknown_linux_gnu), ("i586-unknown-linux-gnu", i586_unknown_linux_gnu), + ("loongarch64-unknown-linux-gnu", loongarch64_unknown_linux_gnu), ("m68k-unknown-linux-gnu", m68k_unknown_linux_gnu), ("mips-unknown-linux-gnu", mips_unknown_linux_gnu), ("mips64-unknown-linux-gnuabi64", mips64_unknown_linux_gnuabi64), @@ -1115,6 +1117,7 @@ supported_targets! { // FIXME(#106649): Remove aarch64-fuchsia in favor of aarch64-unknown-fuchsia ("aarch64-fuchsia", aarch64_fuchsia), ("aarch64-unknown-fuchsia", aarch64_unknown_fuchsia), + ("riscv64gc-unknown-fuchsia", riscv64gc_unknown_fuchsia), // FIXME(#106649): Remove x86_64-fuchsia in favor of x86_64-unknown-fuchsia ("x86_64-fuchsia", x86_64_fuchsia), ("x86_64-unknown-fuchsia", x86_64_unknown_fuchsia), @@ -1259,6 +1262,10 @@ supported_targets! { ("aarch64-unknown-nto-qnx710", aarch64_unknown_nto_qnx_710), ("x86_64-pc-nto-qnx710", x86_64_pc_nto_qnx710), + ("i586-pc-nto-qnx700", i586_pc_nto_qnx700), + + ("aarch64-unknown-linux-ohos", aarch64_unknown_linux_ohos), + ("armv7-unknown-linux-ohos", armv7_unknown_linux_ohos), } /// Cow-Vec-Str: Cow<'static, [Cow<'static, str>]> @@ -1466,6 +1473,8 @@ pub struct TargetOptions { pub features: StaticCow, /// Whether dynamic linking is available on this target. Defaults to false. pub dynamic_linking: bool, + /// Whether dynamic linking can export TLS globals. Defaults to true. + pub dll_tls_export: bool, /// If dynamic linking is available, whether only cdylibs are supported. pub only_cdylib: bool, /// Whether executables are available on this target. Defaults to true. @@ -1732,6 +1741,9 @@ pub struct TargetOptions { /// Whether the target supports XRay instrumentation. pub supports_xray: bool, + + /// Forces the use of emulated TLS (__emutls_get_address) + pub force_emulated_tls: bool, } /// Add arguments for the given flavor and also for its "twin" flavors @@ -1857,6 +1869,7 @@ impl Default for TargetOptions { cpu: "generic".into(), features: "".into(), dynamic_linking: false, + dll_tls_export: true, only_cdylib: false, executables: true, relocation_model: RelocModel::Pic, @@ -1952,6 +1965,7 @@ impl Default for TargetOptions { entry_name: "main".into(), entry_abi: Conv::C, supports_xray: false, + force_emulated_tls: false, } } } @@ -2528,6 +2542,7 @@ impl Target { key!(cpu); key!(features); key!(dynamic_linking, bool); + key!(dll_tls_export, bool); key!(only_cdylib, bool); key!(executables, bool); key!(relocation_model, RelocModel)?; @@ -2603,6 +2618,7 @@ impl Target { key!(entry_name); key!(entry_abi, Conv)?; key!(supports_xray, bool); + key!(force_emulated_tls, bool); if base.is_builtin { // This can cause unfortunate ICEs later down the line. @@ -2781,6 +2797,7 @@ impl ToJson for Target { target_option_val!(cpu); target_option_val!(features); target_option_val!(dynamic_linking); + target_option_val!(dll_tls_export); target_option_val!(only_cdylib); target_option_val!(executables); target_option_val!(relocation_model); @@ -2857,6 +2874,7 @@ impl ToJson for Target { target_option_val!(entry_name); target_option_val!(entry_abi); target_option_val!(supports_xray); + target_option_val!(force_emulated_tls); if let Some(abi) = self.default_adjusted_cabi { d.insert("default-adjusted-cabi".into(), Abi::name(abi).to_json()); @@ -2948,7 +2966,7 @@ impl TargetTriple { /// Creates a target triple from the passed target path. pub fn from_path(path: &Path) -> Result { - let canonicalized_path = path.canonicalize()?; + let canonicalized_path = try_canonicalize(path)?; let contents = std::fs::read_to_string(&canonicalized_path).map_err(|err| { io::Error::new( io::ErrorKind::InvalidInput, diff --git a/compiler/rustc_target/src/spec/msvc_base.rs b/compiler/rustc_target/src/spec/msvc_base.rs index 1dad9133e..efe949a4e 100644 --- a/compiler/rustc_target/src/spec/msvc_base.rs +++ b/compiler/rustc_target/src/spec/msvc_base.rs @@ -8,6 +8,7 @@ pub fn opts() -> TargetOptions { TargetOptions { linker_flavor: LinkerFlavor::Msvc(Lld::No), + dll_tls_export: false, is_like_windows: true, is_like_msvc: true, pre_link_args, diff --git a/compiler/rustc_target/src/spec/nto_qnx_base.rs b/compiler/rustc_target/src/spec/nto_qnx_base.rs index 6fb581ef5..f1405e9b4 100644 --- a/compiler/rustc_target/src/spec/nto_qnx_base.rs +++ b/compiler/rustc_target/src/spec/nto_qnx_base.rs @@ -4,7 +4,6 @@ pub fn opts() -> TargetOptions { TargetOptions { crt_static_respected: true, dynamic_linking: true, - env: "nto71".into(), executables: true, families: cvs!["unix"], has_rpath: true, diff --git a/compiler/rustc_target/src/spec/riscv64gc_unknown_fuchsia.rs b/compiler/rustc_target/src/spec/riscv64gc_unknown_fuchsia.rs new file mode 100644 index 000000000..0585ed76f --- /dev/null +++ b/compiler/rustc_target/src/spec/riscv64gc_unknown_fuchsia.rs @@ -0,0 +1,19 @@ +use crate::spec::{CodeModel, SanitizerSet, Target, TargetOptions}; + +pub fn target() -> Target { + Target { + llvm_target: "riscv64-unknown-fuchsia".into(), + pointer_width: 64, + data_layout: "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128".into(), + arch: "riscv64".into(), + options: TargetOptions { + code_model: Some(CodeModel::Medium), + cpu: "generic-rv64".into(), + features: "+m,+a,+f,+d,+c".into(), + llvm_abiname: "lp64d".into(), + max_atomic_width: Some(64), + supported_sanitizers: SanitizerSet::SHADOWCALLSTACK, + ..super::fuchsia_base::opts() + }, + } +} diff --git a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs index e3734932f..9c59bb911 100644 --- a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs @@ -4,19 +4,12 @@ //! //! Please ping @Lokathor if changes are needed. //! -//! This target profile assumes that you have the ARM binutils in your path -//! (specifically the linker, `arm-none-eabi-ld`). They can be obtained for free -//! for all major OSes from the ARM developer's website, and they may also be -//! available in your system's package manager. Unfortunately, the standard -//! linker that Rust uses (`lld`) only supports as far back as `ARMv5TE`, so we -//! must use the GNU `ld` linker. -//! //! **Important:** This target profile **does not** specify a linker script. You //! just get the default link script when you build a binary for this target. //! The default link script is very likely wrong, so you should use //! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script. -use crate::spec::{cvs, Cc, FramePointer, LinkerFlavor, Lld}; +use crate::spec::{cvs, FramePointer}; use crate::spec::{PanicStrategy, RelocModel, Target, TargetOptions}; pub fn target() -> Target { @@ -36,8 +29,6 @@ pub fn target() -> Target { data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(), options: TargetOptions { abi: "eabi".into(), - linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::No), - linker: Some("arm-none-eabi-ld".into()), // extra args passed to the external assembler (assuming `arm-none-eabi-as`): // * activate t32/a32 interworking diff --git a/compiler/rustc_target/src/spec/wasm_base.rs b/compiler/rustc_target/src/spec/wasm_base.rs index 625d3b37c..341763aad 100644 --- a/compiler/rustc_target/src/spec/wasm_base.rs +++ b/compiler/rustc_target/src/spec/wasm_base.rs @@ -1,3 +1,4 @@ +use super::crt_objects::LinkSelfContainedDefault; use super::{cvs, Cc, LinkerFlavor, PanicStrategy, RelocModel, TargetOptions, TlsModel}; pub fn options() -> TargetOptions { @@ -94,6 +95,13 @@ pub fn options() -> TargetOptions { pre_link_args, + // FIXME: Figure out cases in which WASM needs to link with a native toolchain. + // + // rust-lang/rust#104137: cannot blindly remove this without putting in + // some other way to compensate for lack of `-nostartfiles` in linker + // invocation. + link_self_contained: LinkSelfContainedDefault::True, + // This has no effect in LLVM 8 or prior, but in LLVM 9 and later when // PIC code is implemented this has quite a drastic effect if it stays // at the default, `pic`. In an effort to keep wasm binaries as minimal diff --git a/compiler/rustc_target/src/spec/windows_gnu_base.rs b/compiler/rustc_target/src/spec/windows_gnu_base.rs index a32ca469b..2231983f0 100644 --- a/compiler/rustc_target/src/spec/windows_gnu_base.rs +++ b/compiler/rustc_target/src/spec/windows_gnu_base.rs @@ -78,6 +78,7 @@ pub fn opts() -> TargetOptions { function_sections: false, linker: Some("gcc".into()), dynamic_linking: true, + dll_tls_export: false, dll_prefix: "".into(), dll_suffix: ".dll".into(), exe_suffix: ".exe".into(), diff --git a/compiler/rustc_target/src/spec/windows_gnullvm_base.rs b/compiler/rustc_target/src/spec/windows_gnullvm_base.rs index cada28652..b1d8e2be5 100644 --- a/compiler/rustc_target/src/spec/windows_gnullvm_base.rs +++ b/compiler/rustc_target/src/spec/windows_gnullvm_base.rs @@ -23,6 +23,7 @@ pub fn opts() -> TargetOptions { abi: "llvm".into(), linker: Some("clang".into()), dynamic_linking: true, + dll_tls_export: false, dll_prefix: "".into(), dll_suffix: ".dll".into(), exe_suffix: ".exe".into(), diff --git a/compiler/rustc_target/src/spec/x86_64_pc_nto_qnx710.rs b/compiler/rustc_target/src/spec/x86_64_pc_nto_qnx710.rs index e9b3acee2..6fb2dfd80 100644 --- a/compiler/rustc_target/src/spec/x86_64_pc_nto_qnx710.rs +++ b/compiler/rustc_target/src/spec/x86_64_pc_nto_qnx710.rs @@ -15,6 +15,7 @@ pub fn target() -> Target { LinkerFlavor::Gnu(Cc::Yes, Lld::No), &["-Vgcc_ntox86_64_cxx"], ), + env: "nto71".into(), ..nto_qnx_base::opts() }, } -- cgit v1.2.3