From 698f8c2f01ea549d77d7dc3338a12e04c11057b9 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 17 Apr 2024 14:02:58 +0200 Subject: Adding upstream version 1.64.0+dfsg1. Signed-off-by: Daniel Baumann --- .../stdarch/crates/core_arch/src/aarch64/crc.rs | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 library/stdarch/crates/core_arch/src/aarch64/crc.rs (limited to 'library/stdarch/crates/core_arch/src/aarch64/crc.rs') diff --git a/library/stdarch/crates/core_arch/src/aarch64/crc.rs b/library/stdarch/crates/core_arch/src/aarch64/crc.rs new file mode 100644 index 000000000..6e8128534 --- /dev/null +++ b/library/stdarch/crates/core_arch/src/aarch64/crc.rs @@ -0,0 +1,45 @@ +extern "unadjusted" { + #[link_name = "llvm.aarch64.crc32x"] + fn crc32x_(crc: u32, data: u64) -> u32; + + #[link_name = "llvm.aarch64.crc32cx"] + fn crc32cx_(crc: u32, data: u64) -> u32; +} + +#[cfg(test)] +use stdarch_test::assert_instr; + +/// CRC32 single round checksum for quad words (64 bits). +#[inline] +#[target_feature(enable = "crc")] +#[cfg_attr(test, assert_instr(crc32x))] +pub unsafe fn __crc32d(crc: u32, data: u64) -> u32 { + crc32x_(crc, data) +} + +/// CRC32-C single round checksum for quad words (64 bits). +#[inline] +#[target_feature(enable = "crc")] +#[cfg_attr(test, assert_instr(crc32cx))] +pub unsafe fn __crc32cd(crc: u32, data: u64) -> u32 { + crc32cx_(crc, data) +} + +#[cfg(test)] +mod tests { + use crate::core_arch::{aarch64::*, simd::*}; + use std::mem; + use stdarch_test::simd_test; + + #[simd_test(enable = "crc")] + unsafe fn test_crc32d() { + assert_eq!(__crc32d(0, 0), 0); + assert_eq!(__crc32d(0, 18446744073709551615), 1147535477); + } + + #[simd_test(enable = "crc")] + unsafe fn test_crc32cd() { + assert_eq!(__crc32cd(0, 0), 0); + assert_eq!(__crc32cd(0, 18446744073709551615), 3293575501); + } +} -- cgit v1.2.3