From 698f8c2f01ea549d77d7dc3338a12e04c11057b9 Mon Sep 17 00:00:00 2001
From: Daniel Baumann <daniel.baumann@progress-linux.org>
Date: Wed, 17 Apr 2024 14:02:58 +0200
Subject: Adding upstream version 1.64.0+dfsg1.

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
---
 src/test/mir-opt/inline/inline-instruction-set.rs | 54 +++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 src/test/mir-opt/inline/inline-instruction-set.rs

(limited to 'src/test/mir-opt/inline/inline-instruction-set.rs')

diff --git a/src/test/mir-opt/inline/inline-instruction-set.rs b/src/test/mir-opt/inline/inline-instruction-set.rs
new file mode 100644
index 000000000..be36ff50c
--- /dev/null
+++ b/src/test/mir-opt/inline/inline-instruction-set.rs
@@ -0,0 +1,54 @@
+// Checks that only functions with the compatible instruction_set attributes are inlined.
+//
+// compile-flags: --target thumbv4t-none-eabi
+// needs-llvm-components: arm
+
+#![crate_type = "lib"]
+#![feature(rustc_attrs)]
+#![feature(no_core, lang_items)]
+#![feature(isa_attribute)]
+#![no_core]
+
+#[rustc_builtin_macro]
+#[macro_export]
+macro_rules! asm {
+    ("assembly template",
+        $(operands,)*
+        $(options($(option),*))?
+    ) => {
+        /* compiler built-in */
+    };
+}
+
+#[lang = "sized"]
+trait Sized {}
+#[lang = "copy"]
+trait Copy {}
+
+#[instruction_set(arm::a32)]
+#[inline]
+fn instruction_set_a32() {}
+
+#[instruction_set(arm::t32)]
+#[inline]
+fn instruction_set_t32() {}
+
+#[inline]
+fn instruction_set_default() {}
+
+// EMIT_MIR inline_instruction_set.t32.Inline.diff
+#[instruction_set(arm::t32)]
+pub fn t32() {
+    instruction_set_a32();
+    instruction_set_t32();
+    // The default instruction set is currently
+    // conservatively assumed to be incompatible.
+    instruction_set_default();
+}
+
+// EMIT_MIR inline_instruction_set.default.Inline.diff
+pub fn default() {
+    instruction_set_a32();
+    instruction_set_t32();
+    instruction_set_default();
+}
-- 
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