From 698f8c2f01ea549d77d7dc3338a12e04c11057b9 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 17 Apr 2024 14:02:58 +0200 Subject: Adding upstream version 1.64.0+dfsg1. Signed-off-by: Daniel Baumann --- vendor/cpufeatures/src/aarch64.rs | 182 ++++++++++++++++++++++++++++++++++++++ vendor/cpufeatures/src/lib.rs | 135 ++++++++++++++++++++++++++++ vendor/cpufeatures/src/x86.rs | 81 +++++++++++++++++ 3 files changed, 398 insertions(+) create mode 100644 vendor/cpufeatures/src/aarch64.rs create mode 100644 vendor/cpufeatures/src/lib.rs create mode 100644 vendor/cpufeatures/src/x86.rs (limited to 'vendor/cpufeatures/src') diff --git a/vendor/cpufeatures/src/aarch64.rs b/vendor/cpufeatures/src/aarch64.rs new file mode 100644 index 000000000..6efdde1af --- /dev/null +++ b/vendor/cpufeatures/src/aarch64.rs @@ -0,0 +1,182 @@ +//! ARM64 CPU feature detection support. +//! +//! Unfortunately ARM instructions to detect CPU features cannot be called from +//! unprivileged userspace code, so this implementation relies on OS-specific +//! APIs for feature detection. + +// Evaluate the given `$body` expression any of the supplied target features +// are not enabled. Otherwise returns true. +#[macro_export] +#[doc(hidden)] +macro_rules! __unless_target_features { + ($($tf:tt),+ => $body:expr ) => { + { + #[cfg(not(all($(target_feature=$tf,)*)))] + $body + + #[cfg(all($(target_feature=$tf,)*))] + true + } + }; +} + +// Linux runtime detection of target CPU features using `getauxval`. +#[cfg(any(target_os = "linux", target_os = "android"))] +#[macro_export] +#[doc(hidden)] +macro_rules! __detect_target_features { + ($($tf:tt),+) => {{ + let hwcaps = $crate::aarch64::getauxval_hwcap(); + $($crate::check!(hwcaps, $tf) & )+ true + }}; +} + +/// Linux helper function for calling `getauxval` to get `AT_HWCAP`. +#[cfg(any(target_os = "linux", target_os = "android"))] +pub fn getauxval_hwcap() -> u64 { + unsafe { libc::getauxval(libc::AT_HWCAP) } +} + +// MacOS runtime detection of target CPU features using `sysctlbyname`. +#[cfg(target_os = "macos")] +#[macro_export] +#[doc(hidden)] +macro_rules! __detect_target_features { + ($($tf:tt),+) => {{ + $($crate::check!($tf) & )+ true + }}; +} + +// Linux `expand_check_macro` +#[cfg(any(target_os = "linux", target_os = "android"))] +macro_rules! __expand_check_macro { + ($(($name:tt, $hwcap:ident)),* $(,)?) => { + #[macro_export] + #[doc(hidden)] + macro_rules! check { + $( + ($hwcaps:expr, $name) => { + (($hwcaps & $crate::aarch64::hwcaps::$hwcap) != 0) + }; + )* + } + }; +} + +// Linux `expand_check_macro` +#[cfg(any(target_os = "linux", target_os = "android"))] +__expand_check_macro! { + ("aes", AES), // Enable AES support. + ("sha2", SHA2), // Enable SHA1 and SHA256 support. + ("sha3", SHA3), // Enable SHA512 and SHA3 support. +} + +/// Linux hardware capabilities mapped to target features. +/// +/// Note that LLVM target features are coarser grained than what Linux supports +/// and imply more capabilities under each feature. This module attempts to +/// provide that mapping accordingly. +/// +/// See this issue for more info: +#[cfg(any(target_os = "linux", target_os = "android"))] +pub mod hwcaps { + use libc::c_ulong; + + pub const AES: c_ulong = libc::HWCAP_AES | libc::HWCAP_PMULL; + pub const SHA2: c_ulong = libc::HWCAP_SHA2; + pub const SHA3: c_ulong = libc::HWCAP_SHA3 | libc::HWCAP_SHA512; +} + +// macOS `check!` macro. +// +// NOTE: several of these instructions (e.g. `aes`, `sha2`) can be assumed to +// be present on all Apple ARM64 hardware. +// +// Newer CPU instructions now have nodes within sysctl's `hw.optional` +// namespace, however the ones that do not can safely be assumed to be +// present on all Apple ARM64 devices, now and for the foreseeable future. +// +// See discussion on this issue for more information: +// +#[cfg(target_os = "macos")] +#[macro_export] +#[doc(hidden)] +macro_rules! check { + ("aes") => { + true + }; + ("sha2") => { + true + }; + ("sha3") => { + unsafe { + // `sha3` target feature implies SHA-512 as well + $crate::aarch64::sysctlbyname(b"hw.optional.armv8_2_sha512\0") + && $crate::aarch64::sysctlbyname(b"hw.optional.armv8_2_sha3\0") + } + }; +} + +/// macOS helper function for calling `sysctlbyname`. +#[cfg(target_os = "macos")] +pub unsafe fn sysctlbyname(name: &[u8]) -> bool { + assert_eq!( + name.last().cloned(), + Some(0), + "name is not NUL terminated: {:?}", + name + ); + + let mut value: u32 = 0; + let mut size = core::mem::size_of::(); + + let rc = libc::sysctlbyname( + name.as_ptr() as *const i8, + &mut value as *mut _ as *mut libc::c_void, + &mut size, + core::ptr::null_mut(), + 0, + ); + + assert_eq!(size, 4, "unexpected sysctlbyname(3) result size"); + assert_eq!(rc, 0, "sysctlbyname returned error code: {}", rc); + value != 0 +} + +// iOS `check!` macro. +// +// Unfortunately iOS does not provide access to the `sysctl(3)` API which means +// we can only return static values for CPU features which can be assumed to +// be present on all Apple ARM64 hardware. +// +// See discussion on this issue for more information: +// +#[cfg(target_os = "ios")] +#[macro_export] +#[doc(hidden)] +macro_rules! check { + ("aes") => { + true + }; + ("sha2") => { + true + }; + ("sha3") => { + false + }; +} + +// On other targets, runtime CPU feature detection is unavailable +#[cfg(not(any( + target_os = "ios", + target_os = "linux", + target_os = "android", + target_os = "macos" +)))] +#[macro_export] +#[doc(hidden)] +macro_rules! __detect_target_features { + ($($tf:tt),+) => { + false + }; +} diff --git a/vendor/cpufeatures/src/lib.rs b/vendor/cpufeatures/src/lib.rs new file mode 100644 index 000000000..08b6e528d --- /dev/null +++ b/vendor/cpufeatures/src/lib.rs @@ -0,0 +1,135 @@ +//! This crate provides macros for runtime CPU feature detection. It's intended +//! as a stopgap until Rust [RFC 2725] adding first-class target feature detection +//! macros to `libcore` is implemented. +//! +//! Supported target architectures: +//! - `aarch64`: Linux and macOS/M4 only (ARM64 does not support OS-independent feature detection) +//! - Target features: `aes`, `sha2`, `sha3` +//! - `x86`/`x86_64`: OS independent and `no_std`-friendly +//! - Target features: `adx`, `aes`, `avx`, `avx2`, `bmi1`, `bmi2`, `fma`, +//! `mmx`, `pclmulqdq`, `popcnt`, `rdrand`, `rdseed`, `sgx`, `sha`, `sse`, +//! `sse2`, `sse3`, `sse4.1`, `sse4.2`, `ssse3` +//! +//! If you would like detection support for a target feature which is not on +//! this list, please [open a GitHub issue][gh]. +//! +//! # Example +//! ``` +//! # #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] +//! # { +//! // This macro creates `cpuid_aes_sha` module +//! cpufeatures::new!(cpuid_aes_sha, "aes", "sha"); +//! +//! // `token` is a Zero Sized Type (ZST) value, which guarantees +//! // that underlying static storage got properly initialized, +//! // which allows to omit initialization branch +//! let token: cpuid_aes_sha::InitToken = cpuid_aes_sha::init(); +//! +//! if token.get() { +//! println!("CPU supports both SHA and AES extensions"); +//! } else { +//! println!("SHA and AES extensions are not supported"); +//! } +//! +//! // If stored value needed only once you can get stored value +//! // omitting the token +//! let val = cpuid_aes_sha::get(); +//! assert_eq!(val, token.get()); +//! +//! // Additionally you can get both token and value +//! let (token, val) = cpuid_aes_sha::init_get(); +//! assert_eq!(val, token.get()); +//! # } +//! ``` +//! +//! Note that if all tested target features are enabled via compiler options +//! (e.g. by using `RUSTFLAGS`), the `get` method will always return `true` +//! and `init` will not use CPUID instruction. Such behavior allows +//! compiler to completely eliminate fallback code. +//! +//! After first call macro caches result and returns it in subsequent +//! calls, thus runtime overhead for them is minimal. +//! +//! [RFC 2725]: https://github.com/rust-lang/rfcs/pull/2725 +//! [gh]: https://github.com/RustCrypto/utils/issues/new?title=cpufeatures:%20requesting%20support%20for%20CHANGEME%20target%20feature + +#![no_std] +#![doc( + html_logo_url = "https://raw.githubusercontent.com/RustCrypto/media/6ee8e381/logo.svg", + html_favicon_url = "https://raw.githubusercontent.com/RustCrypto/media/6ee8e381/logo.svg" +)] + +#[cfg(all(target_arch = "aarch64"))] +#[doc(hidden)] +pub mod aarch64; + +#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] +mod x86; + +#[cfg(not(any(target_arch = "aarch64", target_arch = "x86", target_arch = "x86_64")))] +compile_error!("This crate works only on `aarch64`, `x86`, and `x86-64` targets."); + +/// Create module with CPU feature detection code. +#[macro_export] +macro_rules! new { + ($mod_name:ident, $($tf:tt),+ $(,)?) => { + mod $mod_name { + use core::sync::atomic::{AtomicU8, Ordering::Relaxed}; + + const UNINIT: u8 = u8::max_value(); + static STORAGE: AtomicU8 = AtomicU8::new(UNINIT); + + /// Initialization token + #[derive(Copy, Clone, Debug)] + pub struct InitToken(()); + + impl InitToken { + /// Get initialized value + #[inline(always)] + pub fn get(&self) -> bool { + $crate::__unless_target_features! { + $($tf),+ => { + STORAGE.load(Relaxed) == 1 + } + } + } + } + + /// Initialize underlying storage if needed and get + /// stored value and initialization token. + #[inline] + pub fn init_get() -> (InitToken, bool) { + let res = $crate::__unless_target_features! { + $($tf),+ => { + // Relaxed ordering is fine, as we only have a single atomic variable. + let val = STORAGE.load(Relaxed); + + if val == UNINIT { + let res = $crate::__detect_target_features!($($tf),+); + STORAGE.store(res as u8, Relaxed); + res + } else { + val == 1 + } + } + }; + + (InitToken(()), res) + } + + /// Initialize underlying storage if needed and get + /// initialization token. + #[inline] + pub fn init() -> InitToken { + init_get().0 + } + + /// Initialize underlying storage if needed and get + /// stored value. + #[inline] + pub fn get() -> bool { + init_get().1 + } + } + }; +} diff --git a/vendor/cpufeatures/src/x86.rs b/vendor/cpufeatures/src/x86.rs new file mode 100644 index 000000000..37e20ef6a --- /dev/null +++ b/vendor/cpufeatures/src/x86.rs @@ -0,0 +1,81 @@ +//! x86/x86-64 CPU feature detection support. +//! +//! Portable, `no_std`-friendly implementation that relies on the x86 `CPUID` +//! instruction for feature detection. + +// Evaluate the given `$body` expression any of the supplied target features +// are not enabled. Otherwise returns true. +// +// The `$body` expression is not evaluated on SGX targets, and returns false +// on these targets unless *all* supplied target features are enabled. +#[macro_export] +#[doc(hidden)] +macro_rules! __unless_target_features { + ($($tf:tt),+ => $body:expr ) => {{ + #[cfg(not(all($(target_feature=$tf,)*)))] + { + #[cfg(not(target_env = "sgx"))] + $body + + // CPUID is not available on SGX targets + #[cfg(target_env = "sgx")] + false + } + + #[cfg(all($(target_feature=$tf,)*))] + true + }}; +} + +// Use CPUID to detect the presence of all supplied target features. +#[macro_export] +#[doc(hidden)] +macro_rules! __detect_target_features { + ($($tf:tt),+) => {{ + #[cfg(target_arch = "x86")] + use core::arch::x86::{__cpuid, __cpuid_count}; + #[cfg(target_arch = "x86_64")] + use core::arch::x86_64::{__cpuid, __cpuid_count}; + + let cr = unsafe { + [__cpuid(1), __cpuid_count(7, 0)] + }; + + $($crate::check!(cr, $tf) & )+ true + }}; +} + +macro_rules! __expand_check_macro { + ($(($name:tt, $i:expr, $reg:ident, $offset:expr)),* $(,)?) => { + #[macro_export] + #[doc(hidden)] + macro_rules! check { + $( + ($cr:expr, $name) => { ($cr[$i].$reg & (1 << $offset) != 0) }; + )* + } + }; +} + +__expand_check_macro! { + ("mmx", 0, edx, 23), + ("sse", 0, edx, 25), + ("sse2", 0, edx, 26), + ("sse3", 0, ecx, 0), + ("pclmulqdq", 0, ecx, 1), + ("ssse3", 0, ecx, 9), + ("fma", 0, ecx, 12), + ("sse4.1", 0, ecx, 19), + ("sse4.2", 0, ecx, 20), + ("popcnt", 0, ecx, 23), + ("aes", 0, ecx, 25), + ("avx", 0, ecx, 28), + ("rdrand", 0, ecx, 30), + ("sgx", 1, ebx, 2), + ("bmi1", 1, ebx, 3), + ("avx2", 1, ebx, 5), + ("bmi2", 1, ebx, 8), + ("rdseed", 1, ebx, 18), + ("adx", 1, ebx, 19), + ("sha", 1, ebx, 29), +} -- cgit v1.2.3