From 5363f350887b1e5b5dd21a86f88c8af9d7fea6da Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 17 Apr 2024 14:18:25 +0200 Subject: Merging upstream version 1.67.1+dfsg1. Signed-off-by: Daniel Baumann --- vendor/cpufeatures/.cargo-checksum.json | 2 +- vendor/cpufeatures/CHANGELOG.md | 23 ++++++++++++++++++++ vendor/cpufeatures/Cargo.toml | 21 ++++++++++++------ vendor/cpufeatures/src/lib.rs | 5 +++++ vendor/cpufeatures/src/miri.rs | 20 +++++++++++++++++ vendor/cpufeatures/src/x86.rs | 38 +++++++++++++++++++++++++++------ 6 files changed, 95 insertions(+), 14 deletions(-) create mode 100644 vendor/cpufeatures/src/miri.rs (limited to 'vendor/cpufeatures') diff --git a/vendor/cpufeatures/.cargo-checksum.json b/vendor/cpufeatures/.cargo-checksum.json index d556936f8..9e4f2df3a 100644 --- a/vendor/cpufeatures/.cargo-checksum.json +++ b/vendor/cpufeatures/.cargo-checksum.json @@ -1 +1 @@ -{"files":{"CHANGELOG.md":"5f46ca70ecce0cf195145e4db3b3d447ec85b31f406f889f3d17e3ccd551471e","Cargo.toml":"aadb3ec41bd47386bae5d98e6adc2da07889e299083d7fb6dcfe53348958c495","LICENSE-APACHE":"a9040321c3712d8fd0b09cf52b17445de04a23a10165049ae187cd39e5c86be5","LICENSE-MIT":"904801faf3f1850328af8e1aa1047b9190cc22ed40df5c87f2d93d17f847ef67","README.md":"c991281c8d1525279b90dffd452bd731116eebc456ee3a23b9c997df402e8bf7","src/aarch64.rs":"697e8048929cbee0248657da956e8cc627d59ee3fc96729068fec6e7b089b7b6","src/lib.rs":"d3435ac0ff9f264baaa49db98ab954495beb6263cfc106d520ad6081a1d439b1","src/x86.rs":"45926715bc5dec0d9b37de0f0409c2c0b578dc3f7ac51f10e58cbc87cf3dcd9f","tests/aarch64.rs":"bdabbe67316c128b57003ba5faa07707b5f339b1f3e984da4bc383cc93c2bedd","tests/x86.rs":"fcf476ca6ebd0845ab547cea4fe40c2ba2a2324c024264d9a86f666586f3a480"},"package":"59a6001667ab124aebae2a495118e11d30984c3a653e99d86d58971708cf5e4b"} \ No newline at end of file +{"files":{"CHANGELOG.md":"b451593f0440f2bbc63cd2e98535614151e9ab12f877dd8bd9f60dd3ca2b9a36","Cargo.toml":"2b7510bf73cf20e993411333b2301574d72dd6d6ce3a1c558b5c458b12d8cd33","LICENSE-APACHE":"a9040321c3712d8fd0b09cf52b17445de04a23a10165049ae187cd39e5c86be5","LICENSE-MIT":"904801faf3f1850328af8e1aa1047b9190cc22ed40df5c87f2d93d17f847ef67","README.md":"c991281c8d1525279b90dffd452bd731116eebc456ee3a23b9c997df402e8bf7","src/aarch64.rs":"697e8048929cbee0248657da956e8cc627d59ee3fc96729068fec6e7b089b7b6","src/lib.rs":"5b2e7c89dab1d2bed08a4fe09aaf9c5f17ccaa8316d31d5af545b86e7d6a6947","src/miri.rs":"acf1a7e7ae31a1de07941084c6b589a2d4c6ea5f87012c811592c865d04c02cb","src/x86.rs":"380575e3383ece930fea661c6f54201b04c23e4753154dab96031290f398709b","tests/aarch64.rs":"bdabbe67316c128b57003ba5faa07707b5f339b1f3e984da4bc383cc93c2bedd","tests/x86.rs":"fcf476ca6ebd0845ab547cea4fe40c2ba2a2324c024264d9a86f666586f3a480"},"package":"28d997bd5e24a5928dd43e46dc529867e207907fe0b239c3477d924f7f2ca320"} \ No newline at end of file diff --git a/vendor/cpufeatures/CHANGELOG.md b/vendor/cpufeatures/CHANGELOG.md index e2961e71b..dae3dd11a 100644 --- a/vendor/cpufeatures/CHANGELOG.md +++ b/vendor/cpufeatures/CHANGELOG.md @@ -5,6 +5,29 @@ All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/), and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html). +## 0.2.5 (2022-09-04) +### Fixed +- Add workaround for [CPUID bug] in `std` ([#800]) + +[CPUID bug]: https://github.com/rust-lang/rust/issues/101346 +[#800]: https://github.com/RustCrypto/utils/pull/800 + +## 0.2.4 (2022-08-22) +- Re-release v0.2.3 without any changes to fix [#795] ([#796]) + +[#795]: https://github.com/RustCrypto/utils/issues/795 +[#796]: https://github.com/RustCrypto/utils/pull/796 + +## 0.2.3 (2022-08-18) +### Changed +- Update `libc` version to v0.2.95 ([#789]) +- Disable all target features under MIRI ([#779]) +- Check AVX availability when detecting AVX2 and FMA ([#792]) + +[#779]: https://github.com/RustCrypto/utils/pull/779 +[#789]: https://github.com/RustCrypto/utils/pull/789 +[#792]: https://github.com/RustCrypto/utils/pull/792 + ## 0.2.2 (2022-03-18) ### Added - Support for Android on `aarch64` ([#752]) diff --git a/vendor/cpufeatures/Cargo.toml b/vendor/cpufeatures/Cargo.toml index f4182b123..f9fea8135 100644 --- a/vendor/cpufeatures/Cargo.toml +++ b/vendor/cpufeatures/Cargo.toml @@ -12,18 +12,27 @@ [package] edition = "2018" name = "cpufeatures" -version = "0.2.2" +version = "0.2.5" authors = ["RustCrypto Developers"] -description = "Lightweight runtime CPU feature detection for x86/x86_64 and aarch64 with\nno_std support and support for mobile targets including Android and iOS\n" +description = """ +Lightweight runtime CPU feature detection for x86/x86_64 and aarch64 with +no_std support and support for mobile targets including Android and iOS +""" documentation = "https://docs.rs/cpufeatures" readme = "README.md" -keywords = ["cpuid", "target-feature"] +keywords = [ + "cpuid", + "target-feature", +] categories = ["no-std"] license = "MIT OR Apache-2.0" repository = "https://github.com/RustCrypto/utils" + [target.aarch64-apple-darwin.dependencies.libc] -version = "0.2.68" +version = "0.2.95" + [target.aarch64-linux-android.dependencies.libc] -version = "0.2.68" +version = "0.2.95" + [target."cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))".dependencies.libc] -version = "0.2.68" +version = "0.2.95" diff --git a/vendor/cpufeatures/src/lib.rs b/vendor/cpufeatures/src/lib.rs index 08b6e528d..b6c7c10b2 100644 --- a/vendor/cpufeatures/src/lib.rs +++ b/vendor/cpufeatures/src/lib.rs @@ -59,13 +59,18 @@ html_favicon_url = "https://raw.githubusercontent.com/RustCrypto/media/6ee8e381/logo.svg" )] +#[cfg(not(miri))] #[cfg(all(target_arch = "aarch64"))] #[doc(hidden)] pub mod aarch64; +#[cfg(not(miri))] #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] mod x86; +#[cfg(miri)] +mod miri; + #[cfg(not(any(target_arch = "aarch64", target_arch = "x86", target_arch = "x86_64")))] compile_error!("This crate works only on `aarch64`, `x86`, and `x86-64` targets."); diff --git a/vendor/cpufeatures/src/miri.rs b/vendor/cpufeatures/src/miri.rs new file mode 100644 index 000000000..8dff21c13 --- /dev/null +++ b/vendor/cpufeatures/src/miri.rs @@ -0,0 +1,20 @@ +//! Minimal miri support. +//! +//! Miri is an interpreter, and though it tries to emulate the target CPU +//! it does not support any target features. + +#[macro_export] +#[doc(hidden)] +macro_rules! __unless_target_features { + ($($tf:tt),+ => $body:expr ) => { + false + }; +} + +#[macro_export] +#[doc(hidden)] +macro_rules! __detect_target_features { + ($($tf:tt),+) => { + false + }; +} diff --git a/vendor/cpufeatures/src/x86.rs b/vendor/cpufeatures/src/x86.rs index 37e20ef6a..c973b7446 100644 --- a/vendor/cpufeatures/src/x86.rs +++ b/vendor/cpufeatures/src/x86.rs @@ -33,12 +33,27 @@ macro_rules! __unless_target_features { macro_rules! __detect_target_features { ($($tf:tt),+) => {{ #[cfg(target_arch = "x86")] - use core::arch::x86::{__cpuid, __cpuid_count}; + use core::arch::x86::{__cpuid, __cpuid_count, CpuidResult}; #[cfg(target_arch = "x86_64")] - use core::arch::x86_64::{__cpuid, __cpuid_count}; + use core::arch::x86_64::{__cpuid, __cpuid_count, CpuidResult}; + + // These wrappers are workarounds around + // https://github.com/rust-lang/rust/issues/101346 + // + // DO NOT remove it until MSRV is bumped to a version + // with the issue fix (at least 1.64). + #[inline(never)] + unsafe fn cpuid(leaf: u32) -> CpuidResult { + __cpuid(leaf) + } + + #[inline(never)] + unsafe fn cpuid_count(leaf: u32, sub_leaf: u32) -> CpuidResult { + __cpuid_count(leaf, sub_leaf) + } let cr = unsafe { - [__cpuid(1), __cpuid_count(7, 0)] + [cpuid(1), cpuid_count(7, 0)] }; $($crate::check!(cr, $tf) & )+ true @@ -46,17 +61,26 @@ macro_rules! __detect_target_features { } macro_rules! __expand_check_macro { - ($(($name:tt, $i:expr, $reg:ident, $offset:expr)),* $(,)?) => { + ($(($name:tt $(, $i:expr, $reg:ident, $offset:expr)*)),* $(,)?) => { #[macro_export] #[doc(hidden)] macro_rules! check { $( - ($cr:expr, $name) => { ($cr[$i].$reg & (1 << $offset) != 0) }; + ($cr:expr, $name) => { + true + $( + & ($cr[$i].$reg & (1 << $offset) != 0) + )* + }; )* } }; } +// Note that according to the [Intel manual][0] AVX2 and FMA require +// that we check availability of AVX before using them. +// +// [0]: https://www.intel.com/content/dam/develop/external/us/en/documents/36945 __expand_check_macro! { ("mmx", 0, edx, 23), ("sse", 0, edx, 25), @@ -64,7 +88,7 @@ __expand_check_macro! { ("sse3", 0, ecx, 0), ("pclmulqdq", 0, ecx, 1), ("ssse3", 0, ecx, 9), - ("fma", 0, ecx, 12), + ("fma", 0, ecx, 28, 0, ecx, 12), ("sse4.1", 0, ecx, 19), ("sse4.2", 0, ecx, 20), ("popcnt", 0, ecx, 23), @@ -73,7 +97,7 @@ __expand_check_macro! { ("rdrand", 0, ecx, 30), ("sgx", 1, ebx, 2), ("bmi1", 1, ebx, 3), - ("avx2", 1, ebx, 5), + ("avx2", 0, ecx, 28, 1, ebx, 5), ("bmi2", 1, ebx, 8), ("rdseed", 1, ebx, 18), ("adx", 1, ebx, 19), -- cgit v1.2.3