- // MIR for `t32` before Inline + // MIR for `t32` after Inline fn t32() -> () { let mut _0: (); // return place in scope 0 at $DIR/inline-instruction-set.rs:+0:14: +0:14 let _1: (); // in scope 0 at $DIR/inline-instruction-set.rs:+1:5: +1:26 let _2: (); // in scope 0 at $DIR/inline-instruction-set.rs:+2:5: +2:26 let _3: (); // in scope 0 at $DIR/inline-instruction-set.rs:+5:5: +5:30 + scope 1 (inlined instruction_set_t32) { // at $DIR/inline-instruction-set.rs:43:5: 43:26 + } bb0: { StorageLive(_1); // scope 0 at $DIR/inline-instruction-set.rs:+1:5: +1:26 _1 = instruction_set_a32() -> bb1; // scope 0 at $DIR/inline-instruction-set.rs:+1:5: +1:26 // mir::Constant // + span: $DIR/inline-instruction-set.rs:42:5: 42:24 // + literal: Const { ty: fn() {instruction_set_a32}, val: Value() } } bb1: { StorageDead(_1); // scope 0 at $DIR/inline-instruction-set.rs:+1:26: +1:27 StorageLive(_2); // scope 0 at $DIR/inline-instruction-set.rs:+2:5: +2:26 - _2 = instruction_set_t32() -> bb2; // scope 0 at $DIR/inline-instruction-set.rs:+2:5: +2:26 - // mir::Constant - // + span: $DIR/inline-instruction-set.rs:43:5: 43:24 - // + literal: Const { ty: fn() {instruction_set_t32}, val: Value() } - } - - bb2: { StorageDead(_2); // scope 0 at $DIR/inline-instruction-set.rs:+2:26: +2:27 StorageLive(_3); // scope 0 at $DIR/inline-instruction-set.rs:+5:5: +5:30 - _3 = instruction_set_default() -> bb3; // scope 0 at $DIR/inline-instruction-set.rs:+5:5: +5:30 + _3 = instruction_set_default() -> bb2; // scope 0 at $DIR/inline-instruction-set.rs:+5:5: +5:30 // mir::Constant // + span: $DIR/inline-instruction-set.rs:46:5: 46:28 // + literal: Const { ty: fn() {instruction_set_default}, val: Value() } } - bb3: { + bb2: { StorageDead(_3); // scope 0 at $DIR/inline-instruction-set.rs:+5:30: +5:31 _0 = const (); // scope 0 at $DIR/inline-instruction-set.rs:+0:14: +6:2 return; // scope 0 at $DIR/inline-instruction-set.rs:+6:2: +6:2 } }