// MIR for `identity` after PreCodegen fn identity(_1: Result) -> Result { debug x => _1; // in scope 0 at $DIR/separate_const_switch.rs:+0:13: +0:14 let mut _0: std::result::Result; // return place in scope 0 at $DIR/separate_const_switch.rs:+0:37: +0:53 let mut _2: i32; // in scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 let mut _3: std::ops::ControlFlow, i32>; // in scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 let mut _4: std::result::Result; // in scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:9 let _5: std::result::Result; // in scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 let mut _6: std::result::Result; // in scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 let _7: i32; // in scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 scope 1 { debug residual => _5; // in scope 1 at $DIR/separate_const_switch.rs:+1:9: +1:10 scope 2 { scope 8 (inlined #[track_caller] as FromResidual>>::from_residual) { // at $DIR/separate_const_switch.rs:29:8: 29:10 debug residual => _6; // in scope 8 at $SRC_DIR/core/src/result.rs:LL:COL let _14: i32; // in scope 8 at $SRC_DIR/core/src/result.rs:LL:COL let mut _15: i32; // in scope 8 at $SRC_DIR/core/src/result.rs:LL:COL let mut _16: i32; // in scope 8 at $SRC_DIR/core/src/result.rs:LL:COL scope 9 { debug e => _14; // in scope 9 at $SRC_DIR/core/src/result.rs:LL:COL scope 10 (inlined >::from) { // at $SRC_DIR/core/src/result.rs:LL:COL debug t => _16; // in scope 10 at $SRC_DIR/core/src/convert/mod.rs:LL:COL } } } } } scope 3 { debug val => _7; // in scope 3 at $DIR/separate_const_switch.rs:+1:8: +1:10 scope 4 { } } scope 5 (inlined as Try>::branch) { // at $DIR/separate_const_switch.rs:29:8: 29:10 debug self => _4; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let mut _8: isize; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let _9: i32; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let mut _10: i32; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let _11: i32; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let mut _12: std::result::Result; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL let mut _13: i32; // in scope 5 at $SRC_DIR/core/src/result.rs:LL:COL scope 6 { debug v => _9; // in scope 6 at $SRC_DIR/core/src/result.rs:LL:COL } scope 7 { debug e => _11; // in scope 7 at $SRC_DIR/core/src/result.rs:LL:COL } } bb0: { StorageLive(_2); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 StorageLive(_3); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 StorageLive(_4); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:9 _4 = _1; // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:9 StorageLive(_8); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 _8 = discriminant(_4); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL switchInt(move _8) -> [0_isize: bb3, 1_isize: bb1, otherwise: bb2]; // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL } bb1: { StorageLive(_11); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL _11 = move ((_4 as Err).0: i32); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL StorageLive(_12); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL StorageLive(_13); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL _13 = move _11; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL Deinit(_12); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL ((_12 as Err).0: i32) = move _13; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL discriminant(_12) = 1; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_13); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL Deinit(_3); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL ((_3 as Break).0: std::result::Result) = move _12; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL discriminant(_3) = 1; // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_12); // scope 7 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_11); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_8); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 StorageDead(_4); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageLive(_5); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 _5 = ((_3 as Break).0: std::result::Result); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageLive(_6); // scope 2 at $DIR/separate_const_switch.rs:+1:9: +1:10 _6 = _5; // scope 2 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageLive(_14); // scope 8 at $SRC_DIR/core/src/result.rs:LL:COL _14 = move ((_6 as Err).0: i32); // scope 8 at $SRC_DIR/core/src/result.rs:LL:COL StorageLive(_15); // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL StorageLive(_16); // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL _16 = move _14; // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL _15 = move _16; // scope 10 at $SRC_DIR/core/src/convert/mod.rs:LL:COL StorageDead(_16); // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL Deinit(_0); // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL ((_0 as Err).0: i32) = move _15; // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL discriminant(_0) = 1; // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_15); // scope 9 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_14); // scope 8 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_6); // scope 2 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageDead(_5); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageDead(_2); // scope 0 at $DIR/separate_const_switch.rs:+1:10: +1:11 StorageDead(_3); // scope 0 at $DIR/separate_const_switch.rs:+2:1: +2:2 return; // scope 0 at $DIR/separate_const_switch.rs:+2:2: +2:2 } bb2: { unreachable; // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL } bb3: { StorageLive(_9); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL _9 = move ((_4 as Ok).0: i32); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL StorageLive(_10); // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL _10 = move _9; // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL Deinit(_3); // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL ((_3 as Continue).0: i32) = move _10; // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL discriminant(_3) = 0; // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_10); // scope 6 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_9); // scope 5 at $SRC_DIR/core/src/result.rs:LL:COL StorageDead(_8); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 StorageDead(_4); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 StorageLive(_7); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 _7 = ((_3 as Continue).0: i32); // scope 0 at $DIR/separate_const_switch.rs:+1:8: +1:10 _2 = _7; // scope 4 at $DIR/separate_const_switch.rs:+1:8: +1:10 StorageDead(_7); // scope 0 at $DIR/separate_const_switch.rs:+1:9: +1:10 Deinit(_0); // scope 0 at $DIR/separate_const_switch.rs:+1:5: +1:11 ((_0 as Ok).0: i32) = move _2; // scope 0 at $DIR/separate_const_switch.rs:+1:5: +1:11 discriminant(_0) = 0; // scope 0 at $DIR/separate_const_switch.rs:+1:5: +1:11 StorageDead(_2); // scope 0 at $DIR/separate_const_switch.rs:+1:10: +1:11 StorageDead(_3); // scope 0 at $DIR/separate_const_switch.rs:+2:1: +2:2 return; // scope 0 at $DIR/separate_const_switch.rs:+2:2: +2:2 } }