Adding upstream version 7.0.14-dfsg.upstream/7.0.14-dfsg

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

6 files changed, 2184 insertions, 0 deletions

diff --git a/src/libs/softfloat-3e/source/include/internals.h b/src/libs/softfloat-3e/source/include/internals.h
new file mode 100644
index 00000000..2b9ac877
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/internals.h
@@ -0,0 +1,286 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef internals_h
+#define internals_h 1
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "primitives.h"
+#include "softfloat_types.h"
+
+union ui16_f16 { uint16_t ui; float16_t f; };
+union ui32_f32 { uint32_t ui; float32_t f; };
+union ui64_f64 { uint64_t ui; float64_t f; };
+
+#ifdef SOFTFLOAT_FAST_INT64
+union extF80M_extF80 { struct extFloat80M fM; extFloat80_t f; };
+# define EXTF80M_EXTF80_INIT( a_signExp, a_signif )        { EXTFLOAT80M_INIT( a_signExp, a_signif ) }         /* VBox */
+# define EXTF80M_EXTF80_INIT3( a_sign, a_signif, a_exp )   { EXTFLOAT80M_INIT3( a_sign, a_signif, a_exp ) }    /* VBox */
+# define EXTF80M_EXTF80_INIT_C( a_signExp, a_signif )      { EXTFLOAT80M_INIT_C( a_signExp, a_signif ) }       /* VBox */
+# define EXTF80M_EXTF80_INIT3_C( a_sign, a_signif, a_exp ) { EXTFLOAT80M_INIT3_C( a_sign, a_signif, a_exp ) }  /* VBox */
+union ui128_f128 { struct uint128 ui; float128_t f; };
+#endif
+
+enum {
+    softfloat_mulAdd_subC    = 1,
+    softfloat_mulAdd_subProd = 2
+};
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+uint_fast32_t softfloat_roundToUI32( bool, uint_fast64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+
+#ifdef SOFTFLOAT_FAST_INT64
+uint_fast64_t
+ softfloat_roundToUI64(
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+#else
+uint_fast64_t softfloat_roundMToUI64( bool, uint32_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+
+int_fast32_t softfloat_roundToI32( bool, uint_fast64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+
+#ifdef SOFTFLOAT_FAST_INT64
+int_fast64_t
+ softfloat_roundToI64(
+     bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+#else
+int_fast64_t softfloat_roundMToI64( bool, uint32_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF16UI( a ) ((bool) ((uint16_t) (a)>>15))
+#define expF16UI( a ) ((int_fast8_t) ((a)>>10) & 0x1F)
+#define fracF16UI( a ) ((a) & 0x03FF)
+#define packToF16UI( sign, exp, sig ) (((uint16_t) (sign)<<15) + ((uint16_t) (exp)<<10) + (sig))
+
+#define isNaNF16UI( a ) (((~(a) & 0x7C00) == 0) && ((a) & 0x03FF))
+
+struct exp8_sig16 { int_fast8_t exp; uint_fast16_t sig; };
+struct exp8_sig16 softfloat_normSubnormalF16Sig( uint_fast16_t );
+
+float16_t softfloat_roundPackToF16( bool, int_fast16_t, uint_fast16_t SOFTFLOAT_STATE_DECL_COMMA );
+float16_t softfloat_normRoundPackToF16( bool, int_fast16_t, uint_fast16_t SOFTFLOAT_STATE_DECL_COMMA );
+
+float16_t softfloat_addMagsF16( uint_fast16_t, uint_fast16_t SOFTFLOAT_STATE_DECL_COMMA );
+float16_t softfloat_subMagsF16( uint_fast16_t, uint_fast16_t SOFTFLOAT_STATE_DECL_COMMA );
+float16_t
+ softfloat_mulAddF16(
+     uint_fast16_t, uint_fast16_t, uint_fast16_t, uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF32UI( a ) ((bool) ((uint32_t) (a)>>31))
+#define expF32UI( a ) ((int_fast16_t) ((a)>>23) & 0xFF)
+#define fracF32UI( a ) ((a) & 0x007FFFFF)
+#define packToF32UI( sign, exp, sig ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<23) + (sig))
+
+#define isNaNF32UI( a ) (((~(a) & 0x7F800000) == 0) && ((a) & 0x007FFFFF))
+
+struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; };
+struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );
+
+float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t SOFTFLOAT_STATE_DECL_COMMA );
+
+float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t
+ softfloat_mulAddF32(
+     uint_fast32_t, uint_fast32_t, uint_fast32_t, uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF64UI( a ) ((bool) ((uint64_t) (a)>>63))
+#define expF64UI( a ) ((int_fast16_t) ((a)>>52) & 0x7FF)
+#define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))
+#define packToF64UI( sign, exp, sig ) ((uint64_t) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<52) + (sig)))
+
+#define isNaNF64UI( a ) (((~(a) & UINT64_C( 0x7FF0000000000000 )) == 0) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )))
+
+struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };
+struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );
+
+float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t SOFTFLOAT_STATE_DECL_COMMA );
+
+float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float64_t
+ softfloat_mulAddF64(
+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signExtF80UI64( a64 ) ((bool) ((uint16_t) (a64)>>15))
+#define expExtF80UI64( a64 ) ((a64) & 0x7FFF)
+#define packToExtF80UI64( sign, exp ) ((uint_fast16_t) (sign)<<15 | (exp))
+
+#define isNaNExtF80UI( a64, a0 ) ((((a64) & 0x7FFF) == 0x7FFF) && ((a0) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+
+struct exp32_sig64 { int_fast32_t exp; uint64_t sig; };
+struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t );
+
+extFloat80_t
+ softfloat_roundPackToExtF80(
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t
+ softfloat_normRoundPackToExtF80(
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+
+extFloat80_t
+ softfloat_addMagsExtF80(
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t
+ softfloat_subMagsExtF80(
+     uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF128UI64( a64 ) ((bool) ((uint64_t) (a64)>>63))
+#define expF128UI64( a64 ) ((int_fast32_t) ((a64)>>48) & 0x7FFF)
+#define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))
+#define packToF128UI64( sign, exp, sig64 ) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<48) + (sig64))
+
+#define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))))
+
+struct exp32_sig128 { int_fast32_t exp; struct uint128 sig; };
+struct exp32_sig128
+ softfloat_normSubnormalF128Sig( uint_fast64_t, uint_fast64_t );
+
+float128_t
+ softfloat_roundPackToF128(
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast64_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t
+ softfloat_normRoundPackToF128(
+     bool, int_fast32_t, uint_fast64_t, uint_fast64_t SOFTFLOAT_STATE_DECL_COMMA );
+
+float128_t
+ softfloat_addMagsF128(
+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float128_t
+ softfloat_subMagsF128(
+     uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float128_t
+ softfloat_mulAddF128(
+     uint_fast64_t,
+     uint_fast64_t,
+     uint_fast64_t,
+     uint_fast64_t,
+     uint_fast64_t,
+     uint_fast64_t,
+     uint_fast8_t
+     SOFTFLOAT_STATE_DECL_COMMA
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+
+bool
+ softfloat_tryPropagateNaNExtF80M(
+     const struct extFloat80M *,
+     const struct extFloat80M *,
+     struct extFloat80M *
+     SOFTFLOAT_STATE_DECL_COMMA
+ );
+void softfloat_invalidExtF80M( struct extFloat80M * SOFTFLOAT_STATE_DECL_COMMA );
+
+int softfloat_normExtF80SigM( uint64_t * );
+
+void
+ softfloat_roundPackMToExtF80M(
+     bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * SOFTFLOAT_STATE_DECL_COMMA );
+void
+ softfloat_normRoundPackMToExtF80M(
+     bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * SOFTFLOAT_STATE_DECL_COMMA );
+
+void
+ softfloat_addExtF80M(
+     const struct extFloat80M *,
+     const struct extFloat80M *,
+     struct extFloat80M *,
+     bool
+     SOFTFLOAT_STATE_DECL_COMMA
+ );
+
+int
+ softfloat_compareNonnormExtF80M(
+     const struct extFloat80M *, const struct extFloat80M * SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF128UI96( a96 ) ((bool) ((uint32_t) (a96)>>31))
+#define expF128UI96( a96 ) ((int32_t) ((a96)>>16) & 0x7FFF)
+#define fracF128UI96( a96 ) ((a96) & 0x0000FFFF)
+#define packToF128UI96( sign, exp, sig96 ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<16) + (sig96))
+
+bool softfloat_isNaNF128M( const uint32_t * );
+
+bool
+ softfloat_tryPropagateNaNF128M(
+     const uint32_t *, const uint32_t *, uint32_t * SOFTFLOAT_STATE_DECL_COMMA );
+void softfloat_invalidF128M( uint32_t * SOFTFLOAT_STATE_DECL_COMMA );
+
+int softfloat_shiftNormSigF128M( const uint32_t *, uint_fast8_t, uint32_t * );
+
+void softfloat_roundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * SOFTFLOAT_STATE_DECL_COMMA );
+void softfloat_normRoundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * SOFTFLOAT_STATE_DECL_COMMA );
+
+void
+ softfloat_addF128M( const uint32_t *, const uint32_t *, uint32_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+void
+ softfloat_mulAddF128M(
+     const uint32_t *,
+     const uint32_t *,
+     const uint32_t *,
+     uint32_t *,
+     uint_fast8_t
+     SOFTFLOAT_STATE_DECL_COMMA
+ );
+
+#endif
+
+#endif
+
diff --git a/src/libs/softfloat-3e/source/include/opts-GCC.h b/src/libs/softfloat-3e/source/include/opts-GCC.h
new file mode 100644
index 00000000..1c32a8f2
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/opts-GCC.h
@@ -0,0 +1,117 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2017 The Regents of the University of California.  All rights
+reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef opts_GCC_h
+#define opts_GCC_h 1
+
+#ifdef INLINE
+
+#include <stdint.h>
+#include "primitiveTypes.h"
+
+#ifdef SOFTFLOAT_BUILTIN_CLZ
+
+INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a )
+    { return a ? __builtin_clz( a ) - 16 : 16; }
+#define softfloat_countLeadingZeros16 softfloat_countLeadingZeros16
+
+INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )
+    { return a ? __builtin_clz( a ) : 32; }
+#define softfloat_countLeadingZeros32 softfloat_countLeadingZeros32
+
+INLINE uint_fast8_t softfloat_countLeadingZeros64( uint64_t a )
+    { return a ? __builtin_clzll( a ) : 64; }
+#define softfloat_countLeadingZeros64 softfloat_countLeadingZeros64
+
+#endif
+
+#ifdef SOFTFLOAT_INTRINSIC_INT128
+
+#include <iprt/cdefs.h> /* VBox: shut up pedantic warnings */
+RT_GCC_EXTENSION typedef unsigned __int128  softfloat_int128_t;
+
+INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )
+{
+    union { softfloat_int128_t ui; struct uint128 s; } uZ;
+    uZ.ui = (softfloat_int128_t) a * ((uint_fast64_t) b<<32);
+    return uZ.s;
+}
+#define softfloat_mul64ByShifted32To128 softfloat_mul64ByShifted32To128
+
+INLINE struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b )
+{
+    union { softfloat_int128_t ui; struct uint128 s; } uZ;
+    uZ.ui = (softfloat_int128_t) a * b;
+    return uZ.s;
+}
+#define softfloat_mul64To128 softfloat_mul64To128
+
+INLINE
+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b )
+{
+    union { softfloat_int128_t ui; struct uint128 s; } uZ;
+    uZ.ui = ((softfloat_int128_t) a64<<64 | a0) * b;
+    return uZ.s;
+}
+#define softfloat_mul128By32 softfloat_mul128By32
+
+INLINE
+void
+ softfloat_mul128To256M(
+     uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr )
+{
+    softfloat_int128_t z0, mid1, mid, z128;
+    z0 = (softfloat_int128_t) a0 * b0;
+    mid1 = (softfloat_int128_t) a64 * b0;
+    mid = mid1 + (softfloat_int128_t) a0 * b64;
+    z128 = (softfloat_int128_t) a64 * b64;
+    z128 += (softfloat_int128_t) (mid < mid1)<<64 | mid>>64;
+    mid <<= 64;
+    z0 += mid;
+    z128 += (z0 < mid);
+    zPtr[indexWord( 4, 0 )] = z0;
+    zPtr[indexWord( 4, 1 )] = z0>>64;
+    zPtr[indexWord( 4, 2 )] = z128;
+    zPtr[indexWord( 4, 3 )] = z128>>64;
+}
+#define softfloat_mul128To256M softfloat_mul128To256M
+
+#endif
+
+#endif
+
+#endif
+
diff --git a/src/libs/softfloat-3e/source/include/primitiveTypes.h b/src/libs/softfloat-3e/source/include/primitiveTypes.h
new file mode 100644
index 00000000..e3054006
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/primitiveTypes.h
@@ -0,0 +1,85 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef primitiveTypes_h
+#define primitiveTypes_h 1
+
+#include <stdint.h>
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+#ifdef LITTLEENDIAN
+struct uint128 { uint64_t v0, v64; };
+struct uint64_extra { uint64_t extra, v; };
+struct uint128_extra { uint64_t extra; struct uint128 v; };
+#else
+struct uint128 { uint64_t v64, v0; };
+struct uint64_extra { uint64_t v, extra; };
+struct uint128_extra { struct uint128 v; uint64_t extra; };
+#endif
+
+#endif
+
+/*----------------------------------------------------------------------------
+| These macros are used to isolate the differences in word order between big-
+| endian and little-endian platforms.
+*----------------------------------------------------------------------------*/
+#ifdef LITTLEENDIAN
+#define wordIncr 1
+#define indexWord( total, n ) (n)
+#define indexWordHi( total ) ((total) - 1)
+#define indexWordLo( total ) 0
+#define indexMultiword( total, m, n ) (n)
+#define indexMultiwordHi( total, n ) ((total) - (n))
+#define indexMultiwordLo( total, n ) 0
+#define indexMultiwordHiBut( total, n ) (n)
+#define indexMultiwordLoBut( total, n ) 0
+#define INIT_UINTM4( v3, v2, v1, v0 ) { v0, v1, v2, v3 }
+#else
+#define wordIncr -1
+#define indexWord( total, n ) ((total) - 1 - (n))
+#define indexWordHi( total ) 0
+#define indexWordLo( total ) ((total) - 1)
+#define indexMultiword( total, m, n ) ((total) - 1 - (m))
+#define indexMultiwordHi( total, n ) 0
+#define indexMultiwordLo( total, n ) ((total) - (n))
+#define indexMultiwordHiBut( total, n ) 0
+#define indexMultiwordLoBut( total, n ) (n)
+#define INIT_UINTM4( v3, v2, v1, v0 ) { v3, v2, v1, v0 }
+#endif
+
+#endif
+
diff --git a/src/libs/softfloat-3e/source/include/primitives.h b/src/libs/softfloat-3e/source/include/primitives.h
new file mode 100644
index 00000000..10847817
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/primitives.h
@@ -0,0 +1,1160 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef primitives_h
+#define primitives_h 1
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "primitiveTypes.h"
+
+#ifndef softfloat_shortShiftRightJam64
+/*----------------------------------------------------------------------------
+| Shifts 'a' right by the number of bits given in 'dist', which must be in
+| the range 1 to 63.  If any nonzero bits are shifted off, they are "jammed"
+| into the least-significant bit of the shifted value by setting the least-
+| significant bit to 1.  This shifted-and-jammed value is returned.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist )
+    { return a>>dist | ((a & (((uint_fast64_t) 1<<dist) - 1)) != 0); }
+#else
+uint64_t softfloat_shortShiftRightJam64( uint64_t a, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shiftRightJam32
+/*----------------------------------------------------------------------------
+| Shifts 'a' right by the number of bits given in 'dist', which must not
+| be zero.  If any nonzero bits are shifted off, they are "jammed" into the
+| least-significant bit of the shifted value by setting the least-significant
+| bit to 1.  This shifted-and-jammed value is returned.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is
+| greater than 32, the result will be either 0 or 1, depending on whether 'a'
+| is zero or nonzero.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist )
+{
+    return
+        (dist < 31) ? a>>dist | ((uint32_t) (a<<(-dist & 31)) != 0) : (a != 0);
+}
+#else
+uint32_t softfloat_shiftRightJam32( uint32_t a, uint_fast16_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shiftRightJam64
+/*----------------------------------------------------------------------------
+| Shifts 'a' right by the number of bits given in 'dist', which must not
+| be zero.  If any nonzero bits are shifted off, they are "jammed" into the
+| least-significant bit of the shifted value by setting the least-significant
+| bit to 1.  This shifted-and-jammed value is returned.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is
+| greater than 64, the result will be either 0 or 1, depending on whether 'a'
+| is zero or nonzero.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)
+INLINE uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist )
+{
+    return
+        (dist < 63) ? a>>dist | ((uint64_t) (a<<(-dist & 63)) != 0) : (a != 0);
+}
+#else
+uint64_t softfloat_shiftRightJam64( uint64_t a, uint_fast32_t dist );
+#endif
+#endif
+
+/*----------------------------------------------------------------------------
+| A constant table that translates an 8-bit unsigned integer (the array index)
+| into the number of leading 0 bits before the most-significant 1 of that
+| integer.  For integer zero (index 0), the corresponding table element is 8.
+*----------------------------------------------------------------------------*/
+extern const uint_least8_t softfloat_countLeadingZeros8[256];
+
+#ifndef softfloat_countLeadingZeros16
+/*----------------------------------------------------------------------------
+| Returns the number of leading 0 bits before the most-significant 1 bit of
+| 'a'.  If 'a' is zero, 16 is returned.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE uint_fast8_t softfloat_countLeadingZeros16( uint16_t a )
+{
+    uint_fast8_t count = 8;
+    if ( 0x100 <= a ) {
+        count = 0;
+        a >>= 8;
+    }
+    count += softfloat_countLeadingZeros8[a];
+    return count;
+}
+#else
+uint_fast8_t softfloat_countLeadingZeros16( uint16_t a );
+#endif
+#endif
+
+#ifndef softfloat_countLeadingZeros32
+/*----------------------------------------------------------------------------
+| Returns the number of leading 0 bits before the most-significant 1 bit of
+| 'a'.  If 'a' is zero, 32 is returned.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)
+INLINE uint_fast8_t softfloat_countLeadingZeros32( uint32_t a )
+{
+    uint_fast8_t count = 0;
+    if ( a < 0x10000 ) {
+        count = 16;
+        a <<= 16;
+    }
+    if ( a < 0x1000000 ) {
+        count += 8;
+        a <<= 8;
+    }
+    count += softfloat_countLeadingZeros8[a>>24];
+    return count;
+}
+#else
+uint_fast8_t softfloat_countLeadingZeros32( uint32_t a );
+#endif
+#endif
+
+#ifndef softfloat_countLeadingZeros64
+/*----------------------------------------------------------------------------
+| Returns the number of leading 0 bits before the most-significant 1 bit of
+| 'a'.  If 'a' is zero, 64 is returned.
+*----------------------------------------------------------------------------*/
+uint_fast8_t softfloat_countLeadingZeros64( uint64_t a );
+#endif
+
+extern const uint16_t softfloat_approxRecip_1k0s[16];
+extern const uint16_t softfloat_approxRecip_1k1s[16];
+
+#ifndef softfloat_approxRecip32_1
+/*----------------------------------------------------------------------------
+| Returns an approximation to the reciprocal of the number represented by 'a',
+| where 'a' is interpreted as an unsigned fixed-point number with one integer
+| bit and 31 fraction bits.  The 'a' input must be "normalized", meaning that
+| its most-significant bit (bit 31) must be 1.  Thus, if A is the value of
+| the fixed-point interpretation of 'a', then 1 <= A < 2.  The returned value
+| is interpreted as a pure unsigned fraction, having no integer bits and 32
+| fraction bits.  The approximation returned is never greater than the true
+| reciprocal 1/A, and it differs from the true reciprocal by at most 2.006 ulp
+| (units in the last place).
+*----------------------------------------------------------------------------*/
+#ifdef SOFTFLOAT_FAST_DIV64TO32
+#define softfloat_approxRecip32_1( a ) ((uint32_t) (UINT64_C( 0x7FFFFFFFFFFFFFFF ) / (uint32_t) (a)))
+#else
+uint32_t softfloat_approxRecip32_1( uint32_t a );
+#endif
+#endif
+
+extern const uint16_t softfloat_approxRecipSqrt_1k0s[16];
+extern const uint16_t softfloat_approxRecipSqrt_1k1s[16];
+
+#ifndef softfloat_approxRecipSqrt32_1
+/*----------------------------------------------------------------------------
+| Returns an approximation to the reciprocal of the square root of the number
+| represented by 'a', where 'a' is interpreted as an unsigned fixed-point
+| number either with one integer bit and 31 fraction bits or with two integer
+| bits and 30 fraction bits.  The format of 'a' is determined by 'oddExpA',
+| which must be either 0 or 1.  If 'oddExpA' is 1, 'a' is interpreted as
+| having one integer bit, and if 'oddExpA' is 0, 'a' is interpreted as having
+| two integer bits.  The 'a' input must be "normalized", meaning that its
+| most-significant bit (bit 31) must be 1.  Thus, if A is the value of the
+| fixed-point interpretation of 'a', it follows that 1 <= A < 2 when 'oddExpA'
+| is 1, and 2 <= A < 4 when 'oddExpA' is 0.
+|   The returned value is interpreted as a pure unsigned fraction, having
+| no integer bits and 32 fraction bits.  The approximation returned is never
+| greater than the true reciprocal 1/sqrt(A), and it differs from the true
+| reciprocal by at most 2.06 ulp (units in the last place).  The approximation
+| returned is also always within the range 0.5 to 1; thus, the most-
+| significant bit of the result is always set.
+*----------------------------------------------------------------------------*/
+uint32_t softfloat_approxRecipSqrt32_1( unsigned int oddExpA, uint32_t a );
+#endif
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is
+| defined.
+*----------------------------------------------------------------------------*/
+
+#ifndef softfloat_eq128
+/*----------------------------------------------------------------------------
+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'
+| and 'a0' is equal to the 128-bit unsigned integer formed by concatenating
+| 'b64' and 'b0'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (1 <= INLINE_LEVEL)
+INLINE
+bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
+    { return (a64 == b64) && (a0 == b0); }
+#else
+bool softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
+#endif
+#endif
+
+#ifndef softfloat_le128
+/*----------------------------------------------------------------------------
+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'
+| and 'a0' is less than or equal to the 128-bit unsigned integer formed by
+| concatenating 'b64' and 'b0'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
+    { return (a64 < b64) || ((a64 == b64) && (a0 <= b0)); }
+#else
+bool softfloat_le128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
+#endif
+#endif
+
+#ifndef softfloat_lt128
+/*----------------------------------------------------------------------------
+| Returns true if the 128-bit unsigned integer formed by concatenating 'a64'
+| and 'a0' is less than the 128-bit unsigned integer formed by concatenating
+| 'b64' and 'b0'.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
+    { return (a64 < b64) || ((a64 == b64) && (a0 < b0)); }
+#else
+bool softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftLeft128
+/*----------------------------------------------------------------------------
+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' left by the
+| number of bits given in 'dist', which must be in the range 1 to 63.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+struct uint128
+ softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist )
+{
+    struct uint128 z;
+    z.v64 = a64<<dist | a0>>(-dist & 63);
+    z.v0 = a0<<dist;
+    return z;
+}
+#else
+struct uint128
+ softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftRight128
+/*----------------------------------------------------------------------------
+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the
+| number of bits given in 'dist', which must be in the range 1 to 63.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+struct uint128
+ softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist )
+{
+    struct uint128 z;
+    z.v64 = a64>>dist;
+    z.v0 = a64<<(-dist & 63) | a0>>dist;
+    return z;
+}
+#else
+struct uint128
+ softfloat_shortShiftRight128( uint64_t a64, uint64_t a0, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftRightJam64Extra
+/*----------------------------------------------------------------------------
+| This function is the same as 'softfloat_shiftRightJam64Extra' (below),
+| except that 'dist' must be in the range 1 to 63.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+struct uint64_extra
+ softfloat_shortShiftRightJam64Extra(
+     uint64_t a, uint64_t extra, uint_fast8_t dist )
+{
+    struct uint64_extra z;
+    z.v = a>>dist;
+    z.extra = a<<(-dist & 63) | (extra != 0);
+    return z;
+}
+#else
+struct uint64_extra
+ softfloat_shortShiftRightJam64Extra(
+     uint64_t a, uint64_t extra, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftRightJam128
+/*----------------------------------------------------------------------------
+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the
+| number of bits given in 'dist', which must be in the range 1 to 63.  If any
+| nonzero bits are shifted off, they are "jammed" into the least-significant
+| bit of the shifted value by setting the least-significant bit to 1.  This
+| shifted-and-jammed value is returned.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)
+INLINE
+struct uint128
+ softfloat_shortShiftRightJam128(
+     uint64_t a64, uint64_t a0, uint_fast8_t dist )
+{
+    uint_fast8_t negDist = -dist;
+    struct uint128 z;
+    z.v64 = a64>>dist;
+    z.v0 =
+        a64<<(negDist & 63) | a0>>dist
+            | ((uint64_t) (a0<<(negDist & 63)) != 0);
+    return z;
+}
+#else
+struct uint128
+ softfloat_shortShiftRightJam128(
+     uint64_t a64, uint64_t a0, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftRightJam128Extra
+/*----------------------------------------------------------------------------
+| This function is the same as 'softfloat_shiftRightJam128Extra' (below),
+| except that 'dist' must be in the range 1 to 63.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)
+INLINE
+struct uint128_extra
+ softfloat_shortShiftRightJam128Extra(
+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist )
+{
+    uint_fast8_t negDist = -dist;
+    struct uint128_extra z;
+    z.v.v64 = a64>>dist;
+    z.v.v0 = a64<<(negDist & 63) | a0>>dist;
+    z.extra = a0<<(negDist & 63) | (extra != 0);
+    return z;
+}
+#else
+struct uint128_extra
+ softfloat_shortShiftRightJam128Extra(
+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shiftRightJam64Extra
+/*----------------------------------------------------------------------------
+| Shifts the 128 bits formed by concatenating 'a' and 'extra' right by 64
+| _plus_ the number of bits given in 'dist', which must not be zero.  This
+| shifted value is at most 64 nonzero bits and is returned in the 'v' field
+| of the 'struct uint64_extra' result.  The 64-bit 'extra' field of the result
+| contains a value formed as follows from the bits that were shifted off:  The
+| _last_ bit shifted off is the most-significant bit of the 'extra' field, and
+| the other 63 bits of the 'extra' field are all zero if and only if _all_but_
+| _the_last_ bits shifted off were all zero.
+|   (This function makes more sense if 'a' and 'extra' are considered to form
+| an unsigned fixed-point number with binary point between 'a' and 'extra'.
+| This fixed-point value is shifted right by the number of bits given in
+| 'dist', and the integer part of this shifted value is returned in the 'v'
+| field of the result.  The fractional part of the shifted value is modified
+| as described above and returned in the 'extra' field of the result.)
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL)
+INLINE
+struct uint64_extra
+ softfloat_shiftRightJam64Extra(
+     uint64_t a, uint64_t extra, uint_fast32_t dist )
+{
+    struct uint64_extra z;
+    if ( dist < 64 ) {
+        z.v = a>>dist;
+        z.extra = a<<(-dist & 63);
+    } else {
+        z.v = 0;
+        z.extra = (dist == 64) ? a : (a != 0);
+    }
+    z.extra |= (extra != 0);
+    return z;
+}
+#else
+struct uint64_extra
+ softfloat_shiftRightJam64Extra(
+     uint64_t a, uint64_t extra, uint_fast32_t dist );
+#endif
+#endif
+
+#ifndef softfloat_shiftRightJam128
+/*----------------------------------------------------------------------------
+| Shifts the 128 bits formed by concatenating 'a64' and 'a0' right by the
+| number of bits given in 'dist', which must not be zero.  If any nonzero bits
+| are shifted off, they are "jammed" into the least-significant bit of the
+| shifted value by setting the least-significant bit to 1.  This shifted-and-
+| jammed value is returned.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is
+| greater than 128, the result will be either 0 or 1, depending on whether the
+| original 128 bits are all zeros.
+*----------------------------------------------------------------------------*/
+struct uint128
+ softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist );
+#endif
+
+#ifndef softfloat_shiftRightJam128Extra
+/*----------------------------------------------------------------------------
+| Shifts the 192 bits formed by concatenating 'a64', 'a0', and 'extra' right
+| by 64 _plus_ the number of bits given in 'dist', which must not be zero.
+| This shifted value is at most 128 nonzero bits and is returned in the 'v'
+| field of the 'struct uint128_extra' result.  The 64-bit 'extra' field of the
+| result contains a value formed as follows from the bits that were shifted
+| off:  The _last_ bit shifted off is the most-significant bit of the 'extra'
+| field, and the other 63 bits of the 'extra' field are all zero if and only
+| if _all_but_the_last_ bits shifted off were all zero.
+|   (This function makes more sense if 'a64', 'a0', and 'extra' are considered
+| to form an unsigned fixed-point number with binary point between 'a0' and
+| 'extra'.  This fixed-point value is shifted right by the number of bits
+| given in 'dist', and the integer part of this shifted value is returned
+| in the 'v' field of the result.  The fractional part of the shifted value
+| is modified as described above and returned in the 'extra' field of the
+| result.)
+*----------------------------------------------------------------------------*/
+struct uint128_extra
+ softfloat_shiftRightJam128Extra(
+     uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist );
+#endif
+
+#ifndef softfloat_shiftRightJam256M
+/*----------------------------------------------------------------------------
+| Shifts the 256-bit unsigned integer pointed to by 'aPtr' right by the number
+| of bits given in 'dist', which must not be zero.  If any nonzero bits are
+| shifted off, they are "jammed" into the least-significant bit of the shifted
+| value by setting the least-significant bit to 1.  This shifted-and-jammed
+| value is stored at the location pointed to by 'zPtr'.  Each of 'aPtr' and
+| 'zPtr' points to an array of four 64-bit elements that concatenate in the
+| platform's normal endian order to form a 256-bit integer.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist'
+| is greater than 256, the stored result will be either 0 or 1, depending on
+| whether the original 256 bits are all zeros.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shiftRightJam256M(
+     const uint64_t *aPtr, uint_fast32_t dist, uint64_t *zPtr );
+#endif
+
+#ifndef softfloat_add128
+/*----------------------------------------------------------------------------
+| Returns the sum of the 128-bit integer formed by concatenating 'a64' and
+| 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'.  The
+| addition is modulo 2^128, so any carry out is lost.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+struct uint128
+ softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
+{
+    struct uint128 z;
+    z.v0 = a0 + b0;
+    z.v64 = a64 + b64 + (z.v0 < a0);
+    return z;
+}
+#else
+struct uint128
+ softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
+#endif
+#endif
+
+#ifndef softfloat_add256M
+/*----------------------------------------------------------------------------
+| Adds the two 256-bit integers pointed to by 'aPtr' and 'bPtr'.  The addition
+| is modulo 2^256, so any carry out is lost.  The sum is stored at the
+| location pointed to by 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to
+| an array of four 64-bit elements that concatenate in the platform's normal
+| endian order to form a 256-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_add256M(
+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr );
+#endif
+
+#ifndef softfloat_sub128
+/*----------------------------------------------------------------------------
+| Returns the difference of the 128-bit integer formed by concatenating 'a64'
+| and 'a0' and the 128-bit integer formed by concatenating 'b64' and 'b0'.
+| The subtraction is modulo 2^128, so any borrow out (carry out) is lost.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+struct uint128
+ softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
+{
+    struct uint128 z;
+    z.v0 = a0 - b0;
+    z.v64 = a64 - b64;
+    z.v64 -= (a0 < b0);
+    return z;
+}
+#else
+struct uint128
+ softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 );
+#endif
+#endif
+
+#ifndef softfloat_sub256M
+/*----------------------------------------------------------------------------
+| Subtracts the 256-bit integer pointed to by 'bPtr' from the 256-bit integer
+| pointed to by 'aPtr'.  The addition is modulo 2^256, so any borrow out
+| (carry out) is lost.  The difference is stored at the location pointed to
+| by 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to an array of four
+| 64-bit elements that concatenate in the platform's normal endian order to
+| form a 256-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_sub256M(
+     const uint64_t *aPtr, const uint64_t *bPtr, uint64_t *zPtr );
+#endif
+
+#ifndef softfloat_mul64ByShifted32To128
+/*----------------------------------------------------------------------------
+| Returns the 128-bit product of 'a', 'b', and 2^32.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (3 <= INLINE_LEVEL)
+INLINE struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b )
+{
+    uint_fast64_t mid;
+    struct uint128 z;
+    mid = (uint_fast64_t) (uint32_t) a * b;
+    z.v0 = mid<<32;
+    z.v64 = (uint_fast64_t) (uint32_t) (a>>32) * b + (mid>>32);
+    return z;
+}
+#else
+struct uint128 softfloat_mul64ByShifted32To128( uint64_t a, uint32_t b );
+#endif
+#endif
+
+#ifndef softfloat_mul64To128
+/*----------------------------------------------------------------------------
+| Returns the 128-bit product of 'a' and 'b'.
+*----------------------------------------------------------------------------*/
+struct uint128 softfloat_mul64To128( uint64_t a, uint64_t b );
+#endif
+
+#ifndef softfloat_mul128By32
+/*----------------------------------------------------------------------------
+| Returns the product of the 128-bit integer formed by concatenating 'a64' and
+| 'a0', multiplied by 'b'.  The multiplication is modulo 2^128; any overflow
+| bits are discarded.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (4 <= INLINE_LEVEL)
+INLINE
+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b )
+{
+    struct uint128 z;
+    uint_fast64_t mid;
+    uint_fast32_t carry;
+    z.v0 = a0 * b;
+    mid = (uint_fast64_t) (uint32_t) (a0>>32) * b;
+    carry = (uint32_t) ((uint_fast32_t) (z.v0>>32) - (uint_fast32_t) mid);
+    z.v64 = a64 * b + (uint_fast32_t) ((mid + carry)>>32);
+    return z;
+}
+#else
+struct uint128 softfloat_mul128By32( uint64_t a64, uint64_t a0, uint32_t b );
+#endif
+#endif
+
+#ifndef softfloat_mul128To256M
+/*----------------------------------------------------------------------------
+| Multiplies the 128-bit unsigned integer formed by concatenating 'a64' and
+| 'a0' by the 128-bit unsigned integer formed by concatenating 'b64' and
+| 'b0'.  The 256-bit product is stored at the location pointed to by 'zPtr'.
+| Argument 'zPtr' points to an array of four 64-bit elements that concatenate
+| in the platform's normal endian order to form a 256-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_mul128To256M(
+     uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0, uint64_t *zPtr );
+#endif
+
+#else
+
+/*----------------------------------------------------------------------------
+| The following functions are needed only when 'SOFTFLOAT_FAST_INT64' is not
+| defined.
+*----------------------------------------------------------------------------*/
+
+#ifndef softfloat_compare96M
+/*----------------------------------------------------------------------------
+| Compares the two 96-bit unsigned integers pointed to by 'aPtr' and 'bPtr'.
+| Returns -1 if the first integer (A) is less than the second (B); returns 0
+| if the two integers are equal; and returns +1 if the first integer (A)
+| is greater than the second (B).  (The result is thus the signum of A - B.)
+| Each of 'aPtr' and 'bPtr' points to an array of three 32-bit elements that
+| concatenate in the platform's normal endian order to form a 96-bit integer.
+*----------------------------------------------------------------------------*/
+int_fast8_t softfloat_compare96M( const uint32_t *aPtr, const uint32_t *bPtr );
+#endif
+
+#ifndef softfloat_compare128M
+/*----------------------------------------------------------------------------
+| Compares the two 128-bit unsigned integers pointed to by 'aPtr' and 'bPtr'.
+| Returns -1 if the first integer (A) is less than the second (B); returns 0
+| if the two integers are equal; and returns +1 if the first integer (A)
+| is greater than the second (B).  (The result is thus the signum of A - B.)
+| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that
+| concatenate in the platform's normal endian order to form a 128-bit integer.
+*----------------------------------------------------------------------------*/
+int_fast8_t
+ softfloat_compare128M( const uint32_t *aPtr, const uint32_t *bPtr );
+#endif
+
+#ifndef softfloat_shortShiftLeft64To96M
+/*----------------------------------------------------------------------------
+| Extends 'a' to 96 bits and shifts the value left by the number of bits given
+| in 'dist', which must be in the range 1 to 31.  The result is stored at the
+| location pointed to by 'zPtr'.  Argument 'zPtr' points to an array of three
+| 32-bit elements that concatenate in the platform's normal endian order to
+| form a 96-bit integer.
+*----------------------------------------------------------------------------*/
+#if defined INLINE_LEVEL && (2 <= INLINE_LEVEL)
+INLINE
+void
+ softfloat_shortShiftLeft64To96M(
+     uint64_t a, uint_fast8_t dist, uint32_t *zPtr )
+{
+    zPtr[indexWord( 3, 0 )] = (uint32_t) a<<dist;
+    a >>= 32 - dist;
+    zPtr[indexWord( 3, 2 )] = a>>32;
+    zPtr[indexWord( 3, 1 )] = a;
+}
+#else
+void
+ softfloat_shortShiftLeft64To96M(
+     uint64_t a, uint_fast8_t dist, uint32_t *zPtr );
+#endif
+#endif
+
+#ifndef softfloat_shortShiftLeftM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must be in the range 1 to 31.  Any nonzero bits shifted off are lost.  The
+| shifted N-bit result is stored at the location pointed to by 'zPtr'.  Each
+| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements
+| that concatenate in the platform's normal endian order to form an N-bit
+| integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shortShiftLeftM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     uint_fast8_t dist,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_shortShiftLeft96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftLeftM' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftLeft96M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 3, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shortShiftLeft128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftLeftM' with
+| 'size_words' = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftLeft128M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 4, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shortShiftLeft160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftLeftM' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftLeft160M( aPtr, dist, zPtr ) softfloat_shortShiftLeftM( 5, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftLeftM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' left by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must not be zero.  Any nonzero bits shifted off are lost.  The shifted
+| N-bit result is stored at the location pointed to by 'zPtr'.  Each of 'aPtr'
+| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that
+| concatenate in the platform's normal endian order to form an N-bit integer.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is
+| greater than N, the stored result will be 0.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shiftLeftM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     uint32_t dist,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_shiftLeft96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftLeftM' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftLeft96M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 3, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftLeft128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftLeftM' with
+| 'size_words' = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftLeft128M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 4, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftLeft160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftLeftM' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftLeft160M( aPtr, dist, zPtr ) softfloat_shiftLeftM( 5, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shortShiftRightM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must be in the range 1 to 31.  Any nonzero bits shifted off are lost.  The
+| shifted N-bit result is stored at the location pointed to by 'zPtr'.  Each
+| of 'aPtr' and 'zPtr' points to a 'size_words'-long array of 32-bit elements
+| that concatenate in the platform's normal endian order to form an N-bit
+| integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shortShiftRightM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     uint_fast8_t dist,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_shortShiftRight128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftRightM' with
+| 'size_words' = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftRight128M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 4, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shortShiftRight160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftRightM' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftRight160M( aPtr, dist, zPtr ) softfloat_shortShiftRightM( 5, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shortShiftRightJamM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must be in the range 1 to 31.  If any nonzero bits are shifted off, they are
+| "jammed" into the least-significant bit of the shifted value by setting the
+| least-significant bit to 1.  This shifted-and-jammed N-bit result is stored
+| at the location pointed to by 'zPtr'.  Each of 'aPtr' and 'zPtr' points
+| to a 'size_words'-long array of 32-bit elements that concatenate in the
+| platform's normal endian order to form an N-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shortShiftRightJamM(
+     uint_fast8_t, const uint32_t *, uint_fast8_t, uint32_t * );
+#endif
+
+#ifndef softfloat_shortShiftRightJam160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shortShiftRightJamM' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_shortShiftRightJam160M( aPtr, dist, zPtr ) softfloat_shortShiftRightJamM( 5, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftRightM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must not be zero.  Any nonzero bits shifted off are lost.  The shifted
+| N-bit result is stored at the location pointed to by 'zPtr'.  Each of 'aPtr'
+| and 'zPtr' points to a 'size_words'-long array of 32-bit elements that
+| concatenate in the platform's normal endian order to form an N-bit integer.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist' is
+| greater than N, the stored result will be 0.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shiftRightM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     uint32_t dist,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_shiftRight96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftRightM' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftRight96M( aPtr, dist, zPtr ) softfloat_shiftRightM( 3, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftRightJamM
+/*----------------------------------------------------------------------------
+| Shifts the N-bit unsigned integer pointed to by 'aPtr' right by the number
+| of bits given in 'dist', where N = 'size_words' * 32.  The value of 'dist'
+| must not be zero.  If any nonzero bits are shifted off, they are "jammed"
+| into the least-significant bit of the shifted value by setting the least-
+| significant bit to 1.  This shifted-and-jammed N-bit result is stored
+| at the location pointed to by 'zPtr'.  Each of 'aPtr' and 'zPtr' points
+| to a 'size_words'-long array of 32-bit elements that concatenate in the
+| platform's normal endian order to form an N-bit integer.
+|   The value of 'dist' can be arbitrarily large.  In particular, if 'dist'
+| is greater than N, the stored result will be either 0 or 1, depending on
+| whether the original N bits are all zeros.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_shiftRightJamM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     uint32_t dist,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_shiftRightJam96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftRightJamM' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftRightJam96M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 3, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftRightJam128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftRightJamM' with
+| 'size_words' = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftRightJam128M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 4, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_shiftRightJam160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_shiftRightJamM' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_shiftRightJam160M( aPtr, dist, zPtr ) softfloat_shiftRightJamM( 5, aPtr, dist, zPtr )
+#endif
+
+#ifndef softfloat_addM
+/*----------------------------------------------------------------------------
+| Adds the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N =
+| 'size_words' * 32.  The addition is modulo 2^N, so any carry out is lost.
+| The N-bit sum is stored at the location pointed to by 'zPtr'.  Each of
+| 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long array of 32-bit
+| elements that concatenate in the platform's normal endian order to form an
+| N-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_addM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     const uint32_t *bPtr,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_add96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_addM' with 'size_words'
+| = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_add96M( aPtr, bPtr, zPtr ) softfloat_addM( 3, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_add128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_addM' with 'size_words'
+| = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_add128M( aPtr, bPtr, zPtr ) softfloat_addM( 4, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_add160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_addM' with 'size_words'
+| = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_add160M( aPtr, bPtr, zPtr ) softfloat_addM( 5, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_addCarryM
+/*----------------------------------------------------------------------------
+| Adds the two N-bit unsigned integers pointed to by 'aPtr' and 'bPtr', where
+| N = 'size_words' * 32, plus 'carry', which must be either 0 or 1.  The N-bit
+| sum (modulo 2^N) is stored at the location pointed to by 'zPtr', and any
+| carry out is returned as the result.  Each of 'aPtr', 'bPtr', and 'zPtr'
+| points to a 'size_words'-long array of 32-bit elements that concatenate in
+| the platform's normal endian order to form an N-bit integer.
+*----------------------------------------------------------------------------*/
+uint_fast8_t
+ softfloat_addCarryM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     const uint32_t *bPtr,
+     uint_fast8_t carry,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_addComplCarryM
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_addCarryM', except that
+| the value of the unsigned integer pointed to by 'bPtr' is bit-wise completed
+| before the addition.
+*----------------------------------------------------------------------------*/
+uint_fast8_t
+ softfloat_addComplCarryM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     const uint32_t *bPtr,
+     uint_fast8_t carry,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_addComplCarry96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_addComplCarryM' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_addComplCarry96M( aPtr, bPtr, carry, zPtr ) softfloat_addComplCarryM( 3, aPtr, bPtr, carry, zPtr )
+#endif
+
+#ifndef softfloat_negXM
+/*----------------------------------------------------------------------------
+| Replaces the N-bit unsigned integer pointed to by 'zPtr' by the
+| 2s-complement of itself, where N = 'size_words' * 32.  Argument 'zPtr'
+| points to a 'size_words'-long array of 32-bit elements that concatenate in
+| the platform's normal endian order to form an N-bit integer.
+*----------------------------------------------------------------------------*/
+void softfloat_negXM( uint_fast8_t size_words, uint32_t *zPtr );
+#endif
+
+#ifndef softfloat_negX96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_negXM' with 'size_words'
+| = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_negX96M( zPtr ) softfloat_negXM( 3, zPtr )
+#endif
+
+#ifndef softfloat_negX128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_negXM' with 'size_words'
+| = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_negX128M( zPtr ) softfloat_negXM( 4, zPtr )
+#endif
+
+#ifndef softfloat_negX160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_negXM' with 'size_words'
+| = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_negX160M( zPtr ) softfloat_negXM( 5, zPtr )
+#endif
+
+#ifndef softfloat_negX256M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_negXM' with 'size_words'
+| = 8 (N = 256).
+*----------------------------------------------------------------------------*/
+#define softfloat_negX256M( zPtr ) softfloat_negXM( 8, zPtr )
+#endif
+
+#ifndef softfloat_sub1XM
+/*----------------------------------------------------------------------------
+| Subtracts 1 from the N-bit integer pointed to by 'zPtr', where N =
+| 'size_words' * 32.  The subtraction is modulo 2^N, so any borrow out (carry
+| out) is lost.  Argument 'zPtr' points to a 'size_words'-long array of 32-bit
+| elements that concatenate in the platform's normal endian order to form an
+| N-bit integer.
+*----------------------------------------------------------------------------*/
+void softfloat_sub1XM( uint_fast8_t size_words, uint32_t *zPtr );
+#endif
+
+#ifndef softfloat_sub1X96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_sub1XM' with 'size_words'
+| = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_sub1X96M( zPtr ) softfloat_sub1XM( 3, zPtr )
+#endif
+
+#ifndef softfloat_sub1X160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_sub1XM' with 'size_words'
+| = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_sub1X160M( zPtr ) softfloat_sub1XM( 5, zPtr )
+#endif
+
+#ifndef softfloat_subM
+/*----------------------------------------------------------------------------
+| Subtracts the two N-bit integers pointed to by 'aPtr' and 'bPtr', where N =
+| 'size_words' * 32.  The subtraction is modulo 2^N, so any borrow out (carry
+| out) is lost.  The N-bit difference is stored at the location pointed to by
+| 'zPtr'.  Each of 'aPtr', 'bPtr', and 'zPtr' points to a 'size_words'-long
+| array of 32-bit elements that concatenate in the platform's normal endian
+| order to form an N-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_subM(
+     uint_fast8_t size_words,
+     const uint32_t *aPtr,
+     const uint32_t *bPtr,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_sub96M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_subM' with 'size_words'
+| = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_sub96M( aPtr, bPtr, zPtr ) softfloat_subM( 3, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_sub128M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_subM' with 'size_words'
+| = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_sub128M( aPtr, bPtr, zPtr ) softfloat_subM( 4, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_sub160M
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_subM' with 'size_words'
+| = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_sub160M( aPtr, bPtr, zPtr ) softfloat_subM( 5, aPtr, bPtr, zPtr )
+#endif
+
+#ifndef softfloat_mul64To128M
+/*----------------------------------------------------------------------------
+| Multiplies 'a' and 'b' and stores the 128-bit product at the location
+| pointed to by 'zPtr'.  Argument 'zPtr' points to an array of four 32-bit
+| elements that concatenate in the platform's normal endian order to form a
+| 128-bit integer.
+*----------------------------------------------------------------------------*/
+void softfloat_mul64To128M( uint64_t a, uint64_t b, uint32_t *zPtr );
+#endif
+
+#ifndef softfloat_mul128MTo256M
+/*----------------------------------------------------------------------------
+| Multiplies the two 128-bit unsigned integers pointed to by 'aPtr' and
+| 'bPtr', and stores the 256-bit product at the location pointed to by 'zPtr'.
+| Each of 'aPtr' and 'bPtr' points to an array of four 32-bit elements that
+| concatenate in the platform's normal endian order to form a 128-bit integer.
+| Argument 'zPtr' points to an array of eight 32-bit elements that concatenate
+| to form a 256-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_mul128MTo256M(
+     const uint32_t *aPtr, const uint32_t *bPtr, uint32_t *zPtr );
+#endif
+
+#ifndef softfloat_remStepMBy32
+/*----------------------------------------------------------------------------
+| Performs a "remainder reduction step" as follows:  Arguments 'remPtr' and
+| 'bPtr' both point to N-bit unsigned integers, where N = 'size_words' * 32.
+| Defining R and B as the values of those integers, the expression (R<<'dist')
+| - B * q is computed modulo 2^N, and the N-bit result is stored at the
+| location pointed to by 'zPtr'.  Each of 'remPtr', 'bPtr', and 'zPtr' points
+| to a 'size_words'-long array of 32-bit elements that concatenate in the
+| platform's normal endian order to form an N-bit integer.
+*----------------------------------------------------------------------------*/
+void
+ softfloat_remStepMBy32(
+     uint_fast8_t size_words,
+     const uint32_t *remPtr,
+     uint_fast8_t dist,
+     const uint32_t *bPtr,
+     uint32_t q,
+     uint32_t *zPtr
+ );
+#endif
+
+#ifndef softfloat_remStep96MBy32
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_remStepMBy32' with
+| 'size_words' = 3 (N = 96).
+*----------------------------------------------------------------------------*/
+#define softfloat_remStep96MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 3, remPtr, dist, bPtr, q, zPtr )
+#endif
+
+#ifndef softfloat_remStep128MBy32
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_remStepMBy32' with
+| 'size_words' = 4 (N = 128).
+*----------------------------------------------------------------------------*/
+#define softfloat_remStep128MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 4, remPtr, dist, bPtr, q, zPtr )
+#endif
+
+#ifndef softfloat_remStep160MBy32
+/*----------------------------------------------------------------------------
+| This function or macro is the same as 'softfloat_remStepMBy32' with
+| 'size_words' = 5 (N = 160).
+*----------------------------------------------------------------------------*/
+#define softfloat_remStep160MBy32( remPtr, dist, bPtr, q, zPtr ) softfloat_remStepMBy32( 5, remPtr, dist, bPtr, q, zPtr )
+#endif
+
+#endif
+
+#endif
+
diff --git a/src/libs/softfloat-3e/source/include/softfloat.h b/src/libs/softfloat-3e/source/include/softfloat.h
new file mode 100644
index 00000000..9df6177e
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/softfloat.h
@@ -0,0 +1,415 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2016, 2017 The Regents of the
+University of California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+
+/*============================================================================
+| Note:  If SoftFloat is made available as a general library for programs to
+| use, it is strongly recommended that a platform-specific version of this
+| header, "softfloat.h", be created that folds in "softfloat_types.h" and that
+| eliminates all dependencies on compile-time macros.
+*============================================================================*/
+
+
+#ifndef softfloat_h
+#define softfloat_h 1
+
+#include <iprt/cdefs.h>
+#ifndef __cplusplus
+#include <stdbool.h>
+#endif
+#include <stdint.h>
+#include "softfloat_types.h"
+
+#ifndef THREAD_LOCAL
+#define THREAD_LOCAL
+#endif
+
+RT_C_DECLS_BEGIN
+
+/*----------------------------------------------------------------------------
+| Software floating-point underflow tininess-detection mode.
+*----------------------------------------------------------------------------*/
+#ifndef VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+extern THREAD_LOCAL uint_fast8_t softfloat_detectTininess;
+#else
+# define softfloat_detectTininess (pState->detectTininess)
+#endif
+enum {
+    softfloat_tininess_beforeRounding = 0,
+    softfloat_tininess_afterRounding  = 1
+};
+
+/*----------------------------------------------------------------------------
+| Software floating-point rounding mode.  (Mode "odd" is supported only if
+| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.)
+*----------------------------------------------------------------------------*/
+#ifndef VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+extern THREAD_LOCAL uint_fast8_t softfloat_roundingMode;
+#else
+# define softfloat_roundingMode (pState->roundingMode)
+#endif
+enum {
+    softfloat_round_near_even   = 0,
+    softfloat_round_minMag      = 1,
+    softfloat_round_min         = 2,
+    softfloat_round_max         = 3,
+    softfloat_round_near_maxMag = 4,
+    softfloat_round_odd         = 6
+};
+
+/*----------------------------------------------------------------------------
+| Software floating-point exception flags.
+*----------------------------------------------------------------------------*/
+#ifndef VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+extern THREAD_LOCAL uint_fast8_t softfloat_exceptionFlags;
+#else
+# define softfloat_exceptionFlags (pState->exceptionFlags)
+#endif
+enum {
+#ifndef VBOX
+    softfloat_flag_inexact   =  1,
+    softfloat_flag_underflow =  2,
+    softfloat_flag_overflow  =  4,
+    softfloat_flag_infinite  =  8,
+    softfloat_flag_invalid   = 16
+#else /* VBox: Match X86_FSW_?E */
+    softfloat_flag_invalid   = 1<<0 /**< X86_FSW_IE */,
+    softfloat_flag_denormal  = 1<<1 /**< X86_FSW_DE - only returned by some VBox specific functions */,
+    softfloat_flag_infinite  = 1<<2 /**< X86_FSW_ZE */,
+    softfloat_flag_overflow  = 1<<3 /**< X86_FSW_OE */,
+    softfloat_flag_underflow = 1<<4 /**< X86_FSW_UE */,
+    softfloat_flag_inexact   = 1<<5 /**< X86_FSW_PE */,
+    softfloat_flag_c1        = 1<<7 /**< X86_FSW_C1 - round up indicator. wrong place. */
+#endif
+};
+
+/*----------------------------------------------------------------------------
+| Routine to raise any or all of the software floating-point exception flags.
+*----------------------------------------------------------------------------*/
+void softfloat_raiseFlags( uint_fast8_t SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+| Integer-to-floating-point conversion routines.
+*----------------------------------------------------------------------------*/
+float16_t ui32_to_f16( uint32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t ui32_to_f32( uint32_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t ui32_to_f64( uint32_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t ui32_to_extF80( uint32_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t ui32_to_f128( uint32_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void ui32_to_extF80M( uint32_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void ui32_to_f128M( uint32_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float16_t ui64_to_f16( uint64_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t ui64_to_f32( uint64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t ui64_to_f64( uint64_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t ui64_to_extF80( uint64_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t ui64_to_f128( uint64_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void ui64_to_extF80M( uint64_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void ui64_to_f128M( uint64_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float16_t i32_to_f16( int32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t i32_to_f32( int32_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t i32_to_f64( int32_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t i32_to_extF80( int32_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t i32_to_f128( int32_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void i32_to_extF80M( int32_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void i32_to_f128M( int32_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float16_t i64_to_f16( int64_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t i64_to_f32( int64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t i64_to_f64( int64_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t i64_to_extF80( int64_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t i64_to_f128( int64_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void i64_to_extF80M( int64_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void i64_to_f128M( int64_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+
+/*----------------------------------------------------------------------------
+| 16-bit (half-precision) floating-point operations.
+*----------------------------------------------------------------------------*/
+uint_fast32_t f16_to_ui32( float16_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f16_to_ui64( float16_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f16_to_i32( float16_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f16_to_i64( float16_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t f16_to_ui32_r_minMag( float16_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f16_to_ui64_r_minMag( float16_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f16_to_i32_r_minMag( float16_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f16_to_i64_r_minMag( float16_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f16_to_f32( float16_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f16_to_f64( float16_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t f16_to_extF80( float16_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f16_to_f128( float16_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void f16_to_extF80M( float16_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f16_to_f128M( float16_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f16_roundToInt( float16_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f16_add( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_sub( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_mul( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_mulAdd( float16_t, float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_div( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_rem( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+float16_t f16_sqrt( float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_eq( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_le( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_lt( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_eq_signaling( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_le_quiet( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_lt_quiet( float16_t, float16_t SOFTFLOAT_STATE_DECL_COMMA  );
+bool f16_isSignalingNaN( float16_t );
+
+/*----------------------------------------------------------------------------
+| 32-bit (single-precision) floating-point operations.
+*----------------------------------------------------------------------------*/
+uint_fast32_t f32_to_ui32( float32_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f32_to_ui64( float32_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f32_to_i32( float32_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f32_to_i64( float32_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t f32_to_ui32_r_minMag( float32_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f32_to_ui64_r_minMag( float32_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f32_to_i32_r_minMag( float32_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f32_to_i64_r_minMag( float32_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f32_to_f16( float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f32_to_f64( float32_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t f32_to_extF80( float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f32_to_f128( float32_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void f32_to_extF80M( float32_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f32_to_f128M( float32_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_roundToInt( float32_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_add( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_sub( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_mul( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_mulAdd( float32_t, float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_div( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_rem( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f32_sqrt( float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_eq( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_le( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_lt( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_eq_signaling( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_le_quiet( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_lt_quiet( float32_t, float32_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f32_isSignalingNaN( float32_t );
+
+/*----------------------------------------------------------------------------
+| 64-bit (double-precision) floating-point operations.
+*----------------------------------------------------------------------------*/
+uint_fast32_t f64_to_ui32( float64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f64_to_ui64( float64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f64_to_i32( float64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f64_to_i64( float64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t f64_to_ui32_r_minMag( float64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f64_to_ui64_r_minMag( float64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f64_to_i32_r_minMag( float64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f64_to_i64_r_minMag( float64_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f64_to_f16( float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f64_to_f32( float64_t SOFTFLOAT_STATE_DECL_COMMA );
+#ifdef SOFTFLOAT_FAST_INT64
+extFloat80_t f64_to_extF80( float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f64_to_f128( float64_t SOFTFLOAT_STATE_DECL_COMMA );
+#endif
+void f64_to_extF80M( float64_t, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f64_to_f128M( float64_t, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_roundToInt( float64_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_add( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_sub( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_mul( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_mulAdd( float64_t, float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_div( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_rem( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f64_sqrt( float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_eq( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_le( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_lt( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_eq_signaling( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_le_quiet( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_lt_quiet( float64_t, float64_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f64_isSignalingNaN( float64_t );
+
+/*----------------------------------------------------------------------------
+| Rounding precision for 80-bit extended double-precision floating-point.
+| Valid values are 32, 64, and 80.
+*----------------------------------------------------------------------------*/
+#ifndef VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+extern THREAD_LOCAL uint_fast8_t extF80_roundingPrecision;
+#else
+# define extF80_roundingPrecision (pState->roundingPrecision)
+#endif
+
+/*----------------------------------------------------------------------------
+| 80-bit extended double-precision floating-point operations.
+*----------------------------------------------------------------------------*/
+#ifdef SOFTFLOAT_FAST_INT64
+uint_fast32_t extF80_to_ui32( extFloat80_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t extF80_to_ui64( extFloat80_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t extF80_to_i32( extFloat80_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t extF80_to_i64( extFloat80_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t extF80_to_ui32_r_minMag( extFloat80_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t extF80_to_ui64_r_minMag( extFloat80_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t extF80_to_i32_r_minMag( extFloat80_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t extF80_to_i64_r_minMag( extFloat80_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t extF80_to_f16( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t extF80_to_f32( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t extF80_to_f64( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t extF80_to_f128( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_roundToInt( extFloat80_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_add( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_sub( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_mul( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_div( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_rem( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_partialRem( extFloat80_t a, extFloat80_t b, uint8_t roundingMode,                   /* VBox: FPREM/FPREM1 */
+                                uint16_t *pfCxFlags, softfloat_state_t *pState );                       /* VBox: FPREM/FPREM1 */
+extFloat80_t extF80_sqrt( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_sin( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_cos( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+void extF80_sincos( extFloat80_t, extFloat80_t*, extFloat80_t* SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_atan2( extFloat80_t y, extFloat80_t x SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_ylog2x( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_ylog2xp1( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_tan( extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t extF80_scale_extF80( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_eq( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_le( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_lt( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_eq_signaling( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_le_quiet( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_lt_quiet( extFloat80_t, extFloat80_t SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80_isSignalingNaN( extFloat80_t );
+#endif
+uint_fast32_t extF80M_to_ui32( const extFloat80_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t extF80M_to_ui64( const extFloat80_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t extF80M_to_i32( const extFloat80_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t extF80M_to_i64( const extFloat80_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t extF80M_to_ui32_r_minMag( const extFloat80_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t extF80M_to_ui64_r_minMag( const extFloat80_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t extF80M_to_i32_r_minMag( const extFloat80_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t extF80M_to_i64_r_minMag( const extFloat80_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t extF80M_to_f16( const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+float32_t extF80M_to_f32( const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+float64_t extF80M_to_f64( const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_to_f128M( const extFloat80_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void
+ extF80M_roundToInt(
+     const extFloat80_t *, uint_fast8_t, bool, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_add( const extFloat80_t *, const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_sub( const extFloat80_t *, const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_mul( const extFloat80_t *, const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_div( const extFloat80_t *, const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_rem( const extFloat80_t *, const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void extF80M_sqrt( const extFloat80_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_eq( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_le( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_lt( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_eq_signaling( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_le_quiet( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_lt_quiet( const extFloat80_t *, const extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool extF80M_isSignalingNaN( const extFloat80_t * );
+
+/*----------------------------------------------------------------------------
+| 128-bit (quadruple-precision) floating-point operations.
+*----------------------------------------------------------------------------*/
+#ifdef SOFTFLOAT_FAST_INT64
+uint_fast32_t f128_to_ui32( float128_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f128_to_ui64( float128_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f128_to_i32( float128_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f128_to_i64( float128_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t f128_to_ui32_r_minMag( float128_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f128_to_ui64_r_minMag( float128_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f128_to_i32_r_minMag( float128_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f128_to_i64_r_minMag( float128_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f128_to_f16( float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f128_to_f32( float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f128_to_f64( float128_t SOFTFLOAT_STATE_DECL_COMMA );
+extFloat80_t f128_to_extF80( float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_roundToInt( float128_t, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_add( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_sub( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_mul( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_mulAdd( float128_t, float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_div( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_rem( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+float128_t f128_sqrt( float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_eq( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_le( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_lt( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_eq_signaling( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_le_quiet( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_lt_quiet( float128_t, float128_t SOFTFLOAT_STATE_DECL_COMMA );
+bool f128_isSignalingNaN( float128_t );
+#endif
+uint_fast32_t f128M_to_ui32( const float128_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f128M_to_ui64( const float128_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f128M_to_i32( const float128_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f128M_to_i64( const float128_t *, uint_fast8_t, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast32_t f128M_to_ui32_r_minMag( const float128_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+uint_fast64_t f128M_to_ui64_r_minMag( const float128_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast32_t f128M_to_i32_r_minMag( const float128_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+int_fast64_t f128M_to_i64_r_minMag( const float128_t *, bool SOFTFLOAT_STATE_DECL_COMMA );
+float16_t f128M_to_f16( const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float32_t f128M_to_f32( const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+float64_t f128M_to_f64( const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_to_extF80M( const float128_t *, extFloat80_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_roundToInt( const float128_t *, uint_fast8_t, bool, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_add( const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_sub( const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_mul( const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void
+ f128M_mulAdd(
+     const float128_t *, const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA
+ );
+void f128M_div( const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_rem( const float128_t *, const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+void f128M_sqrt( const float128_t *, float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_eq( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_le( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_lt( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_eq_signaling( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_le_quiet( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_lt_quiet( const float128_t *, const float128_t * SOFTFLOAT_STATE_DECL_COMMA );
+bool f128M_isSignalingNaN( const float128_t * );
+
+RT_C_DECLS_END
+
+#endif
+
diff --git a/src/libs/softfloat-3e/source/include/softfloat_types.h b/src/libs/softfloat-3e/source/include/softfloat_types.h
new file mode 100644
index 00000000..a1219d3a
--- /dev/null
+++ b/src/libs/softfloat-3e/source/include/softfloat_types.h
@@ -0,0 +1,121 @@
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3e, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014, 2015, 2017 The Regents of the University of
+California.  All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+    this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+    this list of conditions, and the following disclaimer in the documentation
+    and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+    be used to endorse or promote products derived from this software without
+    specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef softfloat_types_h
+#define softfloat_types_h 1
+
+#include <stdint.h>
+
+/*----------------------------------------------------------------------------
+| Types used to pass 16-bit, 32-bit, 64-bit, and 128-bit floating-point
+| arguments and results to/from functions.  These types must be exactly
+| 16 bits, 32 bits, 64 bits, and 128 bits in size, respectively.  Where a
+| platform has "native" support for IEEE-Standard floating-point formats,
+| the types below may, if desired, be defined as aliases for the native types
+| (typically 'float' and 'double', and possibly 'long double').
+*----------------------------------------------------------------------------*/
+typedef struct { uint16_t v; } float16_t;
+typedef struct { uint32_t v; } float32_t;
+typedef struct { uint64_t v; } float64_t;
+typedef struct { uint64_t v[2]; } float128_t;
+
+/*----------------------------------------------------------------------------
+| The format of an 80-bit extended floating-point number in memory.  This
+| structure must contain a 16-bit field named 'signExp' and a 64-bit field
+| named 'signif'.
+*----------------------------------------------------------------------------*/
+#ifdef LITTLEENDIAN
+struct extFloat80M { uint64_t signif; uint16_t signExp; };
+# define EXTFLOAT80M_INIT( a_signExp, a_signif )    { a_signif, a_signExp }                             /* VBox */
+#else
+struct extFloat80M { uint16_t signExp; uint64_t signif; };
+# define EXTFLOAT80M_INIT( a_signExp, a_signif )    { a_signExp, a_signif }                             /* VBox */
+#endif
+#define EXTFLOAT80M_INIT_C( a_signExp, a_signif )   EXTFLOAT80M_INIT( a_signExp, UINT64_C( a_signif ) ) /* VBox */
+#define EXTFLOAT80M_INIT3( a_sign, a_signif, a_exp ) \
+    EXTFLOAT80M_INIT( packToExtF80UI64( a_sign, a_exp ), a_signif)                                      /* VBox */
+#define EXTFLOAT80M_INIT3_C( a_sign, a_signif, a_exp ) \
+    EXTFLOAT80M_INIT3( a_sign, UINT64_C( a_signif ), a_exp )                                            /* VBox */
+
+/*----------------------------------------------------------------------------
+| The type used to pass 80-bit extended floating-point arguments and
+| results to/from functions.  This type must have size identical to
+| 'struct extFloat80M'.  Type 'extFloat80_t' can be defined as an alias for
+| 'struct extFloat80M'.  Alternatively, if a platform has "native" support
+| for IEEE-Standard 80-bit extended floating-point, it may be possible,
+| if desired, to define 'extFloat80_t' as an alias for the native type
+| (presumably either 'long double' or a nonstandard compiler-intrinsic type).
+| In that case, the 'signif' and 'signExp' fields of 'struct extFloat80M'
+| must align exactly with the locations in memory of the sign, exponent, and
+| significand of the native type.
+*----------------------------------------------------------------------------*/
+typedef struct extFloat80M extFloat80_t;
+
+/*----------------------------------------------------------------------------
+| VBox: The four globals as non-globals.
+*----------------------------------------------------------------------------*/
+#ifndef VBOX_WITH_SOFTFLOAT_GLOBALS
+# define VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+# define SOFTFLOAT_STATE_ARG            pState
+# define SOFTFLOAT_STATE_ARG_COMMA      , pState
+# define SOFTFLOAT_STATE_DECL           softfloat_state_t *pState
+# define SOFTFLOAT_STATE_DECL_COMMA     , softfloat_state_t *pState
+# define SOFTFLOAT_STATE_NOREF()        (void)pState
+typedef struct softfloat_state
+{
+    /* softfloat_tininess_beforeRounding or softfloat_tininess_afterRounding */
+    uint8_t detectTininess;
+    /* softfloat_round_near_even and friends. */
+    uint8_t roundingMode;
+    /* softfloat_flag_inexact and friends. */
+    uint8_t exceptionFlags;
+    /** Masked exceptions (only underflow is relevant). */
+    uint8_t exceptionMask;
+    /* extF80: rounding precsision: 32, 64 or 80 */
+    uint8_t roundingPrecision;
+} softfloat_state_t;
+# define SOFTFLOAT_STATE_INIT_DEFAULTS() { softfloat_tininess_afterRounding, softfloat_round_near_even, 0, 0x3f, 80 }
+#else
+# undef  VBOX_WITHOUT_SOFTFLOAT_GLOBALS
+# define SOFTFLOAT_STATE_ARG
+# define SOFTFLOAT_STATE_ARG_COMMA
+# define SOFTFLOAT_STATE_DECL
+# define SOFTFLOAT_STATE_DECL_COMMA
+# define SOFTFLOAT_STATE_NOREF()        (void)0
+#endif
+
+#endif
+