diff options
Diffstat (limited to 'src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull')
4 files changed, 256 insertions, 0 deletions
diff --git a/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm new file mode 100644 index 00000000..e004de2d --- /dev/null +++ b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/Flat32.nasm @@ -0,0 +1,121 @@ +;; @file +; This is the code that goes from real-mode to protected mode. +; It consumes the reset vector, configures the stack. +; +; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR> +; SPDX-License-Identifier: BSD-2-Clause-Patent +;; + +; +; Define assembler characteristics +; + +extern ASM_PFX(TempRamInitApi) + +SECTION .text + +%macro RET_ESI 0 + + movd esi, mm7 ; restore ESP from MM7 + jmp esi + +%endmacro + +; +; Perform early platform initialization +; +global ASM_PFX(SecPlatformInit) +ASM_PFX(SecPlatformInit): + + RET_ESI + +; +; Protected mode portion initializes stack, configures cache, and calls C entry point +; + +;---------------------------------------------------------------------------- +; +; Procedure: ProtectedModeEntryPoint +; +; Input: Executing in 32 Bit Protected (flat) mode +; cs: 0-4GB +; ds: 0-4GB +; es: 0-4GB +; fs: 0-4GB +; gs: 0-4GB +; ss: 0-4GB +; +; Output: This function never returns +; +; Destroys: +; ecx +; edi +; esi +; esp +; +; Description: +; Perform any essential early platform initialisation +; Setup a stack +; +;---------------------------------------------------------------------------- +global ASM_PFX(ProtectedModeEntryPoint) +ASM_PFX(ProtectedModeEntryPoint): + ; + ; Dummy function. Consume 2 API to make sure they can be linked. + ; + mov eax, ASM_PFX(TempRamInitApi) + + ; Should never return + jmp $ + +; +; ROM-based Global-Descriptor Table for the PEI Phase +; +align 16 +global ASM_PFX(BootGdtTable) + +; +; GDT[0]: 0x00: Null entry, never used. +; +NULL_SEL equ $ - GDT_BASE ; Selector [0] +GDT_BASE: +ASM_PFX(BootGdtTable): DD 0 + DD 0 +; +; Linear code segment descriptor +; +LINEAR_CODE_SEL equ $ - GDT_BASE ; Selector [0x8] + DW 0FFFFh ; limit 0xFFFF + DW 0 ; base 0 + DB 0 + DB 09Bh ; present, ring 0, data, expand-up, not-writable + DB 0CFh ; page-granular, 32-bit + DB 0 +; +; System data segment descriptor +; +SYS_DATA_SEL equ $ - GDT_BASE ; Selector [0x10] + DW 0FFFFh ; limit 0xFFFF + DW 0 ; base 0 + DB 0 + DB 093h ; present, ring 0, data, expand-up, not-writable + DB 0CFh ; page-granular, 32-bit + DB 0 + +GDT_SIZE EQU $ - GDT_BASE ; Size, in bytes + +; +; GDT Descriptor +; +GdtDesc: ; GDT descriptor + DW GDT_SIZE - 1 ; GDT limit + DD GDT_BASE ; GDT base address + +global ASM_PFX(ProtectedModeEntryLinearAddress) +global ASM_PFX(ProtectedModeEntryLinearOffset) + +ASM_PFX(ProtectedModeEntryLinearAddress): +ASM_PFX(ProtectedModeEntryLinearOffset): + DD ASM_PFX(ProtectedModeEntryPoint) ; Offset of our 32 bit code + DW LINEAR_CODE_SEL + diff --git a/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.nasm b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.nasm new file mode 100644 index 00000000..121f2b0c --- /dev/null +++ b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/Ia32/SecCarInit.nasm @@ -0,0 +1,40 @@ +;; @file +; SEC CAR function +; +; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR> +; SPDX-License-Identifier: BSD-2-Clause-Patent +;; + +; +; Define assembler characteristics +; + +%macro RET_ESI 0 + + movd esi, mm7 ; move ReturnAddress from MM7 to ESI + jmp esi + +%endmacro + +SECTION .text + +;----------------------------------------------------------------------------- +; +; Section: SecCarInit +; +; Description: This function initializes the Cache for Data, Stack, and Code +; +;----------------------------------------------------------------------------- +global ASM_PFX(SecCarInit) +ASM_PFX(SecCarInit): + + ; + ; Set up CAR + ; + + xor eax, eax + +SecCarInitExit: + + RET_ESI + diff --git a/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c new file mode 100644 index 00000000..09539f4b --- /dev/null +++ b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/PlatformSecLibNull.c @@ -0,0 +1,44 @@ +/** @file + Null instance of Platform Sec Lib. + + Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR> + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include <PiPei.h> +#include <Library/FspCommonLib.h> + +/** + This function check the signature of UPD. + + @param[in] ApiIdx Internal index of the FSP API. + @param[in] ApiParam Parameter of the FSP API. + +**/ +EFI_STATUS +EFIAPI +FspUpdSignatureCheck ( + IN UINT32 ApiIdx, + IN VOID *ApiParam + ) +{ + return EFI_SUCCESS; +} + +/** + This function handles FspMultiPhaseSiInitApi. + + @param[in] ApiIdx Internal index of the FSP API. + @param[in] ApiParam Parameter of the FSP API. + +**/ +EFI_STATUS +EFIAPI +FspMultiPhaseSiInitApiHandler ( + IN UINT32 ApiIdx, + IN VOID *ApiParam + ) +{ + return EFI_SUCCESS; +} diff --git a/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf new file mode 100644 index 00000000..04129844 --- /dev/null +++ b/src/VBox/Devices/EFI/Firmware/IntelFsp2Pkg/Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf @@ -0,0 +1,51 @@ +## @file +# NULL instance of Platform Sec Lib. +# +# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR> +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = BaseFspSecPlatformLibNull + FILE_GUID = C128CADC-623E-4E41-97CB-A7138E627460 + MODULE_TYPE = SEC + VERSION_STRING = 1.0 + LIBRARY_CLASS = FspSecPlatformLib + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 +# + +################################################################################ +# +# Sources Section - list of files that are required for the build to succeed. +# +################################################################################ + +[Sources] + PlatformSecLibNull.c + +[Sources.IA32] + Ia32/Flat32.nasm + Ia32/SecCarInit.nasm + +################################################################################ +# +# Package Dependency Section - list of Package files that are required for +# this module. +# +################################################################################ + +[Packages] + MdePkg/MdePkg.dec + IntelFsp2Pkg/IntelFsp2Pkg.dec |