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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 19:33:14 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 19:33:14 +0000 |
commit | 36d22d82aa202bb199967e9512281e9a53db42c9 (patch) | |
tree | 105e8c98ddea1c1e4784a60a5a6410fa416be2de /build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch | |
parent | Initial commit. (diff) | |
download | firefox-esr-36d22d82aa202bb199967e9512281e9a53db42c9.tar.xz firefox-esr-36d22d82aa202bb199967e9512281e9a53db42c9.zip |
Adding upstream version 115.7.0esr.upstream/115.7.0esr
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch')
-rw-r--r-- | build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch | 172 |
1 files changed, 172 insertions, 0 deletions
diff --git a/build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch b/build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch new file mode 100644 index 0000000000..4e217dcf3d --- /dev/null +++ b/build/build-clang/revert-llvmorg-16-init-11301-g163bb6d64e5f_clang_17.patch @@ -0,0 +1,172 @@ +From cf00b30288c4c81b2c6a5af01c38f236148777a0 Mon Sep 17 00:00:00 2001 +From: Mike Hommey <mh@glandium.org> +Date: Tue, 28 Mar 2023 06:13:36 +0900 +Subject: [PATCH] Revert "[Passes][VectorCombine] enable early run generally + and try load folds" + +This reverts commit 163bb6d64e5f1220777c3ec2a8b58c0666a74d91. +It causes various reftest regressions. +--- + llvm/lib/Passes/PassBuilderPipelines.cpp | 7 ++++--- + llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 8 ++------ + llvm/test/Other/new-pm-defaults.ll | 2 +- + .../Other/new-pm-thinlto-postlink-defaults.ll | 1 - + .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 1 - + .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 1 - + .../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 1 - + .../new-pm-thinlto-prelink-samplepgo-defaults.ll | 1 - + .../PhaseOrdering/X86/vec-load-combine.ll | 15 +++++++++++---- + 9 files changed, 18 insertions(+), 19 deletions(-) + +diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp b/llvm/lib/Passes/PassBuilderPipelines.cpp +index eed29c25714b..b925448cd6c0 100644 +--- a/llvm/lib/Passes/PassBuilderPipelines.cpp ++++ b/llvm/lib/Passes/PassBuilderPipelines.cpp +@@ -611,9 +611,10 @@ PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level, + // Delete small array after loop unroll. + FPM.addPass(SROAPass(SROAOptions::ModifyCFG)); + +- // Try vectorization/scalarization transforms that are both improvements +- // themselves and can allow further folds with GVN and InstCombine. +- FPM.addPass(VectorCombinePass(/*TryEarlyFoldsOnly=*/true)); ++ // The matrix extension can introduce large vector operations early, which can ++ // benefit from running vector-combine early on. ++ if (EnableMatrix) ++ FPM.addPass(VectorCombinePass(/*TryEarlyFoldsOnly=*/true)); + + // Eliminate redundancies. + FPM.addPass(MergedLoadStoreMotionPass()); +diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp +index 2e489757ebc1..810a9f92bb7a 100644 +--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp ++++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp +@@ -1720,12 +1720,6 @@ bool VectorCombine::run() { + // dispatching to folding functions if there's no chance of matching. + if (IsFixedVectorType) { + switch (Opcode) { +- case Instruction::InsertElement: +- MadeChange |= vectorizeLoadInsert(I); +- break; +- case Instruction::ShuffleVector: +- MadeChange |= widenSubvectorLoad(I); +- break; + case Instruction::Load: + MadeChange |= scalarizeLoadExtract(I); + break; +@@ -1754,9 +1748,11 @@ bool VectorCombine::run() { + if (IsFixedVectorType) { + switch (Opcode) { + case Instruction::InsertElement: ++ MadeChange |= vectorizeLoadInsert(I); + MadeChange |= foldInsExtFNeg(I); + break; + case Instruction::ShuffleVector: ++ MadeChange |= widenSubvectorLoad(I); + MadeChange |= foldShuffleOfBinops(I); + MadeChange |= foldSelectShuffle(I); + break; +diff --git a/llvm/test/Other/new-pm-defaults.ll b/llvm/test/Other/new-pm-defaults.ll +index 13612c3bb459..5f84d28af4a6 100644 +--- a/llvm/test/Other/new-pm-defaults.ll ++++ b/llvm/test/Other/new-pm-defaults.ll +@@ -186,7 +186,7 @@ + ; CHECK-O-NEXT: Running pass: LoopFullUnrollPass + ; CHECK-EP-LOOP-END-NEXT: Running pass: NoOpLoopPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass ++; CHECK-MATRIX: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll +index 3f5d2d5b153d..ea07128c9f6a 100644 +--- a/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll ++++ b/llvm/test/Other/new-pm-thinlto-postlink-defaults.ll +@@ -159,7 +159,6 @@ + ; CHECK-O-NEXT: Running pass: LoopDeletionPass + ; CHECK-O-NEXT: Running pass: LoopFullUnrollPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll +index 29021ceace54..43e943cb6011 100644 +--- a/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll ++++ b/llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll +@@ -121,7 +121,6 @@ + ; CHECK-O-NEXT: Running pass: LoopDeletionPass + ; CHECK-O-NEXT: Running pass: LoopFullUnrollPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll +index daf3141a1f2c..78914d1c23b2 100644 +--- a/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll ++++ b/llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll +@@ -130,7 +130,6 @@ + ; CHECK-O-NEXT: Running pass: LoopDeletionPass + ; CHECK-O-NEXT: Running pass: LoopFullUnrollPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll +index bfe80902f806..5b62ba39add3 100644 +--- a/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll ++++ b/llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll +@@ -160,7 +160,6 @@ + ; CHECK-O-NEXT: Running pass: LoopDeletionPass + ; CHECK-O-NEXT: Running pass: LoopFullUnrollPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll b/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll +index c7daf7aa46b1..17475423d696 100644 +--- a/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll ++++ b/llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll +@@ -124,7 +124,6 @@ + ; CHECK-O-NEXT: Running pass: IndVarSimplifyPass + ; CHECK-O-NEXT: Running pass: LoopDeletionPass + ; CHECK-O-NEXT: Running pass: SROAPass on foo +-; CHECK-O23SZ-NEXT: Running pass: VectorCombinePass + ; CHECK-O23SZ-NEXT: Running pass: MergedLoadStoreMotionPass + ; CHECK-O23SZ-NEXT: Running pass: GVNPass + ; CHECK-O23SZ-NEXT: Running analysis: MemoryDependenceAnalysis +diff --git a/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll b/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll +index 77cbc70ff369..dd7164febea4 100644 +--- a/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll ++++ b/llvm/test/Transforms/PhaseOrdering/X86/vec-load-combine.ll +@@ -12,13 +12,20 @@ $getAt = comdat any + define dso_local noundef <4 x float> @ConvertVectors_ByRef(ptr noundef nonnull align 16 dereferenceable(16) %0) #0 { + ; SSE-LABEL: @ConvertVectors_ByRef( + ; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[TMP0:%.*]], align 16 +-; SSE-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2> +-; SSE-NEXT: ret <4 x float> [[TMP3]] ++; SSE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP0]], i64 0, i64 1 ++; SSE-NEXT: [[TMP4:%.*]] = load <2 x float>, ptr [[TMP3]], align 4 ++; SSE-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP4]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> ++; SSE-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 4, i32 5, i32 undef> ++; SSE-NEXT: [[TMP7:%.*]] = shufflevector <4 x float> [[TMP6]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 5> ++; SSE-NEXT: ret <4 x float> [[TMP7]] + ; + ; AVX-LABEL: @ConvertVectors_ByRef( + ; AVX-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr [[TMP0:%.*]], align 16 +-; AVX-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2> +-; AVX-NEXT: ret <4 x float> [[TMP3]] ++; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds [4 x float], ptr [[TMP0]], i64 0, i64 2 ++; AVX-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 8 ++; AVX-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP2]], float [[TMP4]], i64 2 ++; AVX-NEXT: [[TMP6:%.*]] = insertelement <4 x float> [[TMP5]], float [[TMP4]], i64 3 ++; AVX-NEXT: ret <4 x float> [[TMP6]] + ; + %2 = alloca ptr, align 8 + %3 = alloca <4 x float>, align 16 +-- +2.39.0.1.g6739ec1790 + |