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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
commit | 2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch) | |
tree | 848558de17fb3008cdf4d861b01ac7781903ce39 /arch/powerpc/boot/dts/mpc5121ads.dts | |
parent | Initial commit. (diff) | |
download | linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.tar.xz linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.zip |
Adding upstream version 6.1.76.upstream/6.1.76
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc5121ads.dts')
-rw-r--r-- | arch/powerpc/boot/dts/mpc5121ads.dts | 174 |
1 files changed, 174 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts new file mode 100644 index 000000000..b407a50ee --- /dev/null +++ b/arch/powerpc/boot/dts/mpc5121ads.dts @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * MPC5121E ADS Device Tree Source + * + * Copyright 2007-2008 Freescale Semiconductor Inc. + */ + +#include "mpc5121.dtsi" + +/ { + model = "mpc5121ads"; + compatible = "fsl,mpc5121ads", "fsl,mpc5121"; + + nfc@40000000 { + /* + * ADS has two Hynix 512MB Nand flash chips in a single + * stacked package. + */ + chips = <2>; + + nand@0 { + label = "nand"; + reg = <0x00000000 0x40000000>; /* 512MB + 512MB */ + }; + }; + + localbus@80000020 { + ranges = <0x0 0x0 0xfc000000 0x04000000 + 0x2 0x0 0x82000000 0x00008000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0x0 0x4000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <4>; + device-width = <2>; + + protected@0 { + label = "protected"; + reg = <0x00000000 0x00040000>; // first sector is protected + read-only; + }; + filesystem@40000 { + label = "filesystem"; + reg = <0x00040000 0x03c00000>; // 60M for filesystem + }; + kernel@3c40000 { + label = "kernel"; + reg = <0x03c40000 0x00280000>; // 2.5M for kernel + }; + device-tree@3ec0000 { + label = "device-tree"; + reg = <0x03ec0000 0x00040000>; // one sector for device tree + }; + u-boot@3f00000 { + label = "u-boot"; + reg = <0x03f00000 0x00100000>; // 1M for u-boot + read-only; + }; + }; + + board-control@2,0 { + compatible = "fsl,mpc5121ads-cpld"; + reg = <0x2 0x0 0x8000>; + }; + + cpld_pic: pic@2,a { + compatible = "fsl,mpc5121ads-cpld-pic"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x2 0xa 0x5>; + /* irq routing: + * all irqs but touch screen are routed to irq0 (ipic 48) + * touch screen is statically routed to irq1 (ipic 17) + * so don't use it here + */ + interrupts = <48 0x8>; + }; + }; + + soc@80000000 { + + i2c@1700 { + fsl,preserve-clocking; + + hwmon@4a { + compatible = "adi,ad7414"; + reg = <0x4a>; + }; + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + + rtc@68 { + compatible = "st,m41t62"; + reg = <0x68>; + }; + }; + + eth0: ethernet@2800 { + phy-handle = <&phy0>; + }; + + can@2300 { + status = "disabled"; + }; + + can@2380 { + status = "disabled"; + }; + + viu@2400 { + status = "disabled"; + }; + + mdio@2800 { + phy0: ethernet-phy@0 { + reg = <1>; + }; + }; + + /* mpc5121ads only uses USB0 */ + usb@3000 { + status = "disabled"; + }; + + /* USB0 using internal UTMI PHY */ + usb@4000 { + dr_mode = "host"; + fsl,invert-drvvbus; + fsl,invert-pwr-fault; + }; + + /* PSC3 serial port A aka ttyPSC0 */ + psc@11300 { + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; + }; + + /* PSC4 serial port B aka ttyPSC1 */ + psc@11400 { + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; + }; + + /* PSC5 in ac97 mode */ + ac97: psc@11500 { + compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc"; + fsl,mode = "ac97-slave"; + fsl,rx-fifo-size = <384>; + fsl,tx-fifo-size = <384>; + }; + }; + + pci: pci@80008500 { + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x15 - Slot 1 PCI */ + 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8 + 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8 + 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8 + 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8 + + /* IDSEL 0x16 - Slot 2 MiniPCI */ + 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8 + 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8 + + /* IDSEL 0x17 - Slot 3 MiniPCI */ + 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8 + 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8 + >; + }; +}; |