Adding upstream version 6.1.76.upstream/6.1.76

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

1 files changed, 192 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
new file mode 100644
index 000000000..9494af160
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * MPC7448HPC2 (Taiga) board Device Tree Source
+ *
+ * Copyright 2006, 2008 Freescale Semiconductor Inc.
+ * 2006 Roy Zang <Roy Zang at freescale.com>.
+ */
+
+/dts-v1/;
+
+/ {
+	model = "mpc7448hpc2";
+	compatible = "mpc74xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	aliases {
+		ethernet0 = &enet0;
+		ethernet1 = &enet1;
+
+		serial0 = &serial0;
+		serial1 = &serial1;
+
+		pci0 = &pci0;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells =<0>;
+				
+		PowerPC,7448@0 {
+			device_type = "cpu";
+			reg = <0x0>;
+			d-cache-line-size = <32>;	// 32 bytes
+			i-cache-line-size = <32>;	// 32 bytes
+			d-cache-size = <0x8000>;		// L1, 32K bytes
+			i-cache-size = <0x8000>;		// L1, 32K bytes
+			timebase-frequency = <0>;	// 33 MHz, from uboot
+			clock-frequency = <0>;		// From U-Boot
+			bus-frequency = <0>;		// From U-Boot
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x0 0x20000000	// DDR2   512M at 0
+		       >;
+	};
+
+  	tsi108@c0000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "tsi-bridge";
+		ranges = <0x0 0xc0000000 0x10000>;
+		reg = <0xc0000000 0x10000>;
+		bus-frequency = <0>;
+
+		i2c@7000 {
+			interrupt-parent = <&mpic>;
+			interrupts = <14 0>;
+			reg = <0x7000 0x400>;
+			device_type = "i2c";
+			compatible  = "tsi108-i2c";
+		};
+
+		MDIO: mdio@6000 {
+			compatible = "tsi108-mdio";
+			reg = <0x6000 0x50>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy8: ethernet-phy@8 {
+				interrupt-parent = <&mpic>;
+				interrupts = <2 1>;
+				reg = <0x8>;
+			};
+
+			phy9: ethernet-phy@9 {
+				interrupt-parent = <&mpic>;
+				interrupts = <2 1>;
+				reg = <0x9>;
+			};
+
+		};
+
+		enet0: ethernet@6200 {
+			linux,network-index = <0>;
+			#size-cells = <0>;
+			device_type = "network";
+			compatible = "tsi108-ethernet";
+			reg = <0x6000 0x200>;
+			address = [ 00 06 D2 00 00 01 ];
+			interrupts = <16 2>;
+			interrupt-parent = <&mpic>;
+			mdio-handle = <&MDIO>;
+			phy-handle = <&phy8>;
+		};
+
+		enet1: ethernet@6600 {
+			linux,network-index = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			device_type = "network";
+			compatible = "tsi108-ethernet";
+			reg = <0x6400 0x200>;
+			address = [ 00 06 D2 00 00 02 ];
+			interrupts = <17 2>;
+			interrupt-parent = <&mpic>;
+			mdio-handle = <&MDIO>;
+			phy-handle = <&phy9>;
+		};
+
+		serial0: serial@7808 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x7808 0x200>;
+			clock-frequency = <1064000000>;
+			interrupts = <12 0>;
+			interrupt-parent = <&mpic>;
+		};
+
+		serial1: serial@7c08 {
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x7c08 0x200>;
+			clock-frequency = <1064000000>;
+			interrupts = <13 0>;
+			interrupt-parent = <&mpic>;
+		};
+
+	  	mpic: pic@7400 {
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <2>;
+			reg = <0x7400 0x400>;
+			compatible = "chrp,open-pic";
+			device_type = "open-pic";
+		};
+		pci0: pci@1000 {
+			compatible = "tsi108-pci";
+			device_type = "pci";
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			reg = <0x1000 0x1000>;
+			bus-range = <0 0>;
+			ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000	
+				  0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
+			clock-frequency = <133333332>;
+			interrupt-parent = <&mpic>;
+			interrupts = <23 2>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <
+
+				/* IDSEL 0x11 */
+				0x800 0x0 0x0 0x1 &RT0 0x24 0x0
+				0x800 0x0 0x0 0x2 &RT0 0x25 0x0
+				0x800 0x0 0x0 0x3 &RT0 0x26 0x0
+				0x800 0x0 0x0 0x4 &RT0 0x27 0x0
+
+				/* IDSEL 0x12 */
+				0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
+				0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
+				0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
+				0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
+
+				/* IDSEL 0x13 */
+				0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
+				0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
+				0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
+				0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
+
+				/* IDSEL 0x14 */
+				0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
+				0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
+				0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
+				0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
+				>;
+
+			RT0: router@1180 {
+				clock-frequency = <0>;
+				interrupt-controller;
+				device_type = "pic-router";
+				#address-cells = <0>;
+				#interrupt-cells = <2>;
+				big-endian;
+				interrupts = <23 2>;
+				interrupt-parent = <&mpic>;
+			};
+		};
+	};
+};