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-rw-r--r--tools/perf/pmu-events/arch/x86/bonnell/floating-point.json261
1 files changed, 261 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/bonnell/floating-point.json b/tools/perf/pmu-events/arch/x86/bonnell/floating-point.json
new file mode 100644
index 000000000..1fa347d07
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/bonnell/floating-point.json
@@ -0,0 +1,261 @@
+[
+ {
+ "BriefDescription": "Floating point assists for retired operations.",
+ "Counter": "0,1",
+ "EventCode": "0x11",
+ "EventName": "FP_ASSIST.AR",
+ "SampleAfterValue": "10000",
+ "UMask": "0x81"
+ },
+ {
+ "BriefDescription": "Floating point assists.",
+ "Counter": "0,1",
+ "EventCode": "0x11",
+ "EventName": "FP_ASSIST.S",
+ "SampleAfterValue": "10000",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "SIMD assists invoked.",
+ "Counter": "0,1",
+ "EventCode": "0xCD",
+ "EventName": "SIMD_ASSIST",
+ "SampleAfterValue": "100000",
+ "UMask": "0x0"
+ },
+ {
+ "BriefDescription": "Retired computational Streaming SIMD Extensions (SSE) packed-single instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xCA",
+ "EventName": "SIMD_COMP_INST_RETIRED.PACKED_SINGLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "Retired computational Streaming SIMD Extensions 2 (SSE2) scalar-double instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xCA",
+ "EventName": "SIMD_COMP_INST_RETIRED.SCALAR_DOUBLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x8"
+ },
+ {
+ "BriefDescription": "Retired computational Streaming SIMD Extensions (SSE) scalar-single instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xCA",
+ "EventName": "SIMD_COMP_INST_RETIRED.SCALAR_SINGLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "SIMD Instructions retired.",
+ "Counter": "0,1",
+ "EventCode": "0xCE",
+ "EventName": "SIMD_INSTR_RETIRED",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x0"
+ },
+ {
+ "BriefDescription": "Retired Streaming SIMD Extensions (SSE) packed-single instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xC7",
+ "EventName": "SIMD_INST_RETIRED.PACKED_SINGLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "Retired Streaming SIMD Extensions 2 (SSE2) scalar-double instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xC7",
+ "EventName": "SIMD_INST_RETIRED.SCALAR_DOUBLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x8"
+ },
+ {
+ "BriefDescription": "Retired Streaming SIMD Extensions (SSE) scalar-single instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xC7",
+ "EventName": "SIMD_INST_RETIRED.SCALAR_SINGLE",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "Retired Streaming SIMD Extensions 2 (SSE2) vector instructions.",
+ "Counter": "0,1",
+ "EventCode": "0xC7",
+ "EventName": "SIMD_INST_RETIRED.VECTOR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x10"
+ },
+ {
+ "BriefDescription": "Saturated arithmetic instructions retired.",
+ "Counter": "0,1",
+ "EventCode": "0xCF",
+ "EventName": "SIMD_SAT_INSTR_RETIRED",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x0"
+ },
+ {
+ "BriefDescription": "SIMD saturated arithmetic micro-ops retired.",
+ "Counter": "0,1",
+ "EventCode": "0xB1",
+ "EventName": "SIMD_SAT_UOP_EXEC.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x80"
+ },
+ {
+ "BriefDescription": "SIMD saturated arithmetic micro-ops executed.",
+ "Counter": "0,1",
+ "EventCode": "0xB1",
+ "EventName": "SIMD_SAT_UOP_EXEC.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x0"
+ },
+ {
+ "BriefDescription": "SIMD micro-ops retired (excluding stores).",
+ "Counter": "0,1",
+ "EventCode": "0xB0",
+ "EventName": "SIMD_UOPS_EXEC.AR",
+ "PEBS": "2",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x80"
+ },
+ {
+ "BriefDescription": "SIMD micro-ops executed (excluding stores).",
+ "Counter": "0,1",
+ "EventCode": "0xB0",
+ "EventName": "SIMD_UOPS_EXEC.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x0"
+ },
+ {
+ "BriefDescription": "SIMD packed arithmetic micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.ARITHMETIC.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0xa0"
+ },
+ {
+ "BriefDescription": "SIMD packed arithmetic micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.ARITHMETIC.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x20"
+ },
+ {
+ "BriefDescription": "SIMD packed logical micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.LOGICAL.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x90"
+ },
+ {
+ "BriefDescription": "SIMD packed logical micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.LOGICAL.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x10"
+ },
+ {
+ "BriefDescription": "SIMD packed multiply micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.MUL.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x81"
+ },
+ {
+ "BriefDescription": "SIMD packed multiply micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.MUL.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "SIMD packed micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.PACK.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x84"
+ },
+ {
+ "BriefDescription": "SIMD packed micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.PACK.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x4"
+ },
+ {
+ "BriefDescription": "SIMD packed shift micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.SHIFT.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x82"
+ },
+ {
+ "BriefDescription": "SIMD packed shift micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.SHIFT.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x2"
+ },
+ {
+ "BriefDescription": "SIMD unpacked micro-ops retired",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.UNPACK.AR",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x88"
+ },
+ {
+ "BriefDescription": "SIMD unpacked micro-ops executed",
+ "Counter": "0,1",
+ "EventCode": "0xB3",
+ "EventName": "SIMD_UOP_TYPE_EXEC.UNPACK.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x8"
+ },
+ {
+ "BriefDescription": "Floating point computational micro-ops retired.",
+ "Counter": "0,1",
+ "EventCode": "0x10",
+ "EventName": "X87_COMP_OPS_EXE.ANY.AR",
+ "PEBS": "2",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x81"
+ },
+ {
+ "BriefDescription": "Floating point computational micro-ops executed.",
+ "Counter": "0,1",
+ "EventCode": "0x10",
+ "EventName": "X87_COMP_OPS_EXE.ANY.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x1"
+ },
+ {
+ "BriefDescription": "FXCH uops retired.",
+ "Counter": "0,1",
+ "EventCode": "0x10",
+ "EventName": "X87_COMP_OPS_EXE.FXCH.AR",
+ "PEBS": "2",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x82"
+ },
+ {
+ "BriefDescription": "FXCH uops executed.",
+ "Counter": "0,1",
+ "EventCode": "0x10",
+ "EventName": "X87_COMP_OPS_EXE.FXCH.S",
+ "SampleAfterValue": "2000000",
+ "UMask": "0x2"
+ }
+]
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-06 18:28:19 +0000