From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 209 +++++++++++++++++++++++ 1 file changed, 209 insertions(+) create mode 100644 arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts (limited to 'arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts') diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts new file mode 100644 index 000000000..1ecf72a61 --- /dev/null +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for OpenBlocks AX3-4 board + * + * Copyright (C) 2012 Marvell + * + * Thomas Petazzoni + */ + +/dts-v1/; +#include +#include +#include "armada-xp-mv78260.dtsi" + +/ { + model = "PlatHome OpenBlocks AX3-4 board"; + compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */ + }; + + soc { + ranges = ; + + devbus-bootcs { + status = "okay"; + + /* Device Bus parameters are required */ + + /* Read parameters */ + devbus,bus-width = <16>; + devbus,turn-off-ps = <60000>; + devbus,badr-skew-ps = <0>; + devbus,acc-first-ps = <124000>; + devbus,acc-next-ps = <248000>; + devbus,rd-setup-ps = <0>; + devbus,rd-hold-ps = <0>; + + /* Write parameters */ + devbus,sync-enable = <0>; + devbus,wr-high-ps = <60000>; + devbus,wr-low-ps = <60000>; + devbus,ale-wr-ps = <60000>; + + /* NOR 128 MiB */ + nor@0 { + compatible = "cfi-flash"; + reg = <0 0x8000000>; + bank-width = <2>; + }; + }; + + internal-regs { + rtc@10300 { + /* No crystal connected to the internal RTC */ + status = "disabled"; + }; + serial@12000 { + status = "okay"; + }; + serial@12100 { + status = "okay"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + red_led { + label = "red_led"; + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + yellow_led { + label = "yellow_led"; + gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + default-state = "off"; + }; + + green_led { + label = "green_led"; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + button-init { + label = "Init Button"; + linux,code = ; + gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + }; + }; + + ethernet@70000 { + status = "okay"; + phy = <&phy0>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + }; + ethernet@74000 { + status = "okay"; + phy = <&phy1>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <1>; + }; + ethernet@30000 { + status = "okay"; + phy = <&phy2>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <2>; + }; + ethernet@34000 { + status = "okay"; + phy = <&phy3>; + phy-mode = "sgmii"; + buffer-manager = <&bm>; + bm,pool-long = <3>; + }; + i2c@11000 { + status = "okay"; + clock-frequency = <400000>; + }; + i2c@11100 { + status = "okay"; + clock-frequency = <400000>; + + s35390a: s35390a@30 { + compatible = "s35390a"; + reg = <0x30>; + }; + }; + sata@a0000 { + nr-ports = <2>; + status = "okay"; + }; + + /* Front side USB 0 */ + usb@50000 { + status = "okay"; + }; + + /* Front side USB 1 */ + usb@51000 { + status = "okay"; + }; + + bm@c0000 { + status = "okay"; + }; + }; + + bm-bppi { + status = "okay"; + }; + }; +}; + +&pciec { + status = "okay"; + /* Internal mini-PCIe connector */ + pcie@1,0 { + /* Port 0, Lane 0 */ + status = "okay"; + }; +}; + +&mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + }; +}; + +&pinctrl { + led_pins: led-pins-0 { + marvell,pins = "mpp49", "mpp51", "mpp53"; + marvell,function = "gpio"; + }; +}; -- cgit v1.2.3