From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- drivers/gpu/drm/amd/display/Kconfig | 63 +++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 drivers/gpu/drm/amd/display/Kconfig (limited to 'drivers/gpu/drm/amd/display/Kconfig') diff --git a/drivers/gpu/drm/amd/display/Kconfig b/drivers/gpu/drm/amd/display/Kconfig new file mode 100644 index 000000000..f4f3d2665 --- /dev/null +++ b/drivers/gpu/drm/amd/display/Kconfig @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: MIT +menu "Display Engine Configuration" + depends on DRM && DRM_AMDGPU + +config DRM_AMD_DC + bool "AMD DC - Enable new display engine" + default y + depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64 + select SND_HDA_COMPONENT if SND_HDA_CORE + select DRM_AMD_DC_DCN if (X86 || PPC_LONG_DOUBLE_128) + help + Choose this option if you want to use the new display engine + support for AMDGPU. This adds required support for Vega and + Raven ASICs. + + calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64) + architectures built with Clang (all released versions), whereby the stack + frame gets blown up to well over 5k. This would cause an immediate kernel + panic on most architectures. We'll revert this when the following bug report + has been resolved: https://github.com/llvm/llvm-project/issues/41896. + +config DRM_AMD_DC_DCN + def_bool n + help + Raven, Navi, and newer family support for display engine + +config DRM_AMD_DC_HDCP + bool "Enable HDCP support in DC" + depends on DRM_AMD_DC + select DRM_DISPLAY_HDCP_HELPER + help + Choose this option if you want to support HDCP authentication. + +config DRM_AMD_DC_SI + bool "AMD DC support for Southern Islands ASICs" + depends on DRM_AMDGPU_SI + depends on DRM_AMD_DC + help + Choose this option to enable new AMD DC support for SI asics + by default. This includes Tahiti, Pitcairn, Cape Verde, Oland. + Hainan is not supported by AMD DC and it has no physical DCE6. + +config DEBUG_KERNEL_DC + bool "Enable kgdb break in DC" + depends on DRM_AMD_DC + depends on KGDB + help + Choose this option if you want to hit kdgb_break in assert. + +config DRM_AMD_SECURE_DISPLAY + bool "Enable secure display support" + depends on DEBUG_FS + depends on DRM_AMD_DC_DCN + help + Choose this option if you want to + support secure display + + This option enables the calculation + of crc of specific region via debugfs. + Cooperate with specific DMCU FW. + + +endmenu -- cgit v1.2.3