// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2019~2020, 2022 NXP
 */

&audio_ipg_clk {
	clock-frequency = <160000000>;
};

&dma_ipg_clk {
	clock-frequency = <160000000>;
};

&i2c0 {
	compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
	interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
};

&i2c1 {
	compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
	interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
};

&i2c2 {
	compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
	interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
};

&i2c3 {
	compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
	interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
};

&lpuart0 {
	compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
	interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
};

&lpuart1 {
	compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
	interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
};

&lpuart2 {
	compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
	interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
};

&lpuart3 {
	compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
	interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
};