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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:49:45 +0000
commit2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch)
tree848558de17fb3008cdf4d861b01ac7781903ce39 /Documentation/devicetree/bindings/mtd/denali,nand.yaml
parentInitial commit. (diff)
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Adding upstream version 6.1.76.upstream/6.1.76
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
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+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/denali,nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Denali NAND controller
+
+maintainers:
+ - Masahiro Yamada <yamada.masahiro@socionext.com>
+
+properties:
+ compatible:
+ enum:
+ - altr,socfpga-denali-nand
+ - socionext,uniphier-denali-nand-v5a
+ - socionext,uniphier-denali-nand-v5b
+
+ reg-names:
+ description: |
+ There are two register regions:
+ nand_data: host data/command interface
+ denali_reg: register interface
+ items:
+ - const: nand_data
+ - const: denali_reg
+
+ reg:
+ minItems: 2
+ maxItems: 2
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ description: |
+ There are three clocks:
+ nand: controller core clock
+ nand_x: bus interface clock
+ ecc: ECC circuit clock
+ items:
+ - const: nand
+ - const: nand_x
+ - const: ecc
+
+ clocks:
+ minItems: 3
+ maxItems: 3
+
+ reset-names:
+ description: |
+ There are two optional resets:
+ nand: controller core reset
+ reg: register reset
+ oneOf:
+ - items:
+ - const: nand
+ - const: reg
+ - const: nand
+ - const: reg
+
+ resets:
+ minItems: 1
+ maxItems: 2
+
+allOf:
+ - $ref: nand-controller.yaml
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: altr,socfpga-denali-nand
+ then:
+ patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ properties:
+ nand-ecc-strength:
+ enum:
+ - 8
+ - 15
+ nand-ecc-step-size:
+ enum:
+ - 512
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-denali-nand-v5a
+ then:
+ patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ properties:
+ nand-ecc-strength:
+ enum:
+ - 8
+ - 16
+ - 24
+ nand-ecc-step-size:
+ enum:
+ - 1024
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: socionext,uniphier-denali-nand-v5b
+ then:
+ patternProperties:
+ "^nand@[a-f0-9]$":
+ type: object
+ properties:
+ nand-ecc-strength:
+ enum:
+ - 8
+ - 16
+ nand-ecc-step-size:
+ enum:
+ - 1024
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ nand-controller@ff900000 {
+ compatible = "altr,socfpga-denali-nand";
+ reg-names = "nand_data", "denali_reg";
+ reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
+ interrupts = <0 144 4>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
+ reset-names = "nand", "reg";
+ resets = <&nand_rst>, <&nand_reg_rst>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ nand@0 {
+ reg = <0>;
+ };
+ };