diff options
author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
---|---|---|
committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-07 18:49:45 +0000 |
commit | 2c3c1048746a4622d8c89a29670120dc8fab93c4 (patch) | |
tree | 848558de17fb3008cdf4d861b01ac7781903ce39 /arch/mips/boot/dts/ingenic/cu1830-neo.dts | |
parent | Initial commit. (diff) | |
download | linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.tar.xz linux-2c3c1048746a4622d8c89a29670120dc8fab93c4.zip |
Adding upstream version 6.1.76.upstream/6.1.76
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/mips/boot/dts/ingenic/cu1830-neo.dts')
-rw-r--r-- | arch/mips/boot/dts/ingenic/cu1830-neo.dts | 224 |
1 files changed, 224 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/cu1830-neo.dts b/arch/mips/boot/dts/ingenic/cu1830-neo.dts new file mode 100644 index 000000000..3c7784983 --- /dev/null +++ b/arch/mips/boot/dts/ingenic/cu1830-neo.dts @@ -0,0 +1,224 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "x1830.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/ingenic,sysost.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + compatible = "yna,cu1830-neo", "ingenic,x1830"; + model = "YSH & ATIL General Board CU1830-Neo"; + + aliases { + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + + leds { + compatible = "gpio-leds"; + led-0 { + gpios = <&gpc 17 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + }; + + wlan_pwrseq: msc1-pwrseq { + compatible = "mmc-pwrseq-simple"; + + reset-gpios = <&gpc 13 GPIO_ACTIVE_LOW>; + post-power-on-delay-ms = <200>; + }; +}; + +&exclk { + clock-frequency = <24000000>; +}; + +&cgu { + /* + * Use the 32.768 kHz oscillator as the parent of the RTC for a higher + * precision. + */ + assigned-clocks = <&cgu X1830_CLK_RTC>; + assigned-clock-parents = <&cgu X1830_CLK_RTCLK>; +}; + +&ost { + /* 1500 kHz for the system timer and clocksource */ + assigned-clocks = <&ost OST_CLK_EVENT_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>; + assigned-clock-rates = <1500000>, <1500000>; +}; + +&uart1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_uart1>; +}; + +&ssi0 { + status = "okay"; + + num-cs = <2>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_ssi0>; + + sc16is752: expander@0 { + compatible = "nxp,sc16is752"; + reg = <0>; /* CE0 */ + + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; + spi-max-frequency = <4000000>; + + clocks = <&exclk_sc16is752>; + + interrupt-parent = <&gpb>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + exclk_sc16is752: sc16is752 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; + }; +}; + +&i2c0 { + status = "okay"; + + clock-frequency = <400000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_i2c0>; + + ads7830: adc@48 { + compatible = "ti,ads7830"; + reg = <0x48>; + }; +}; + +&dtrng { + status = "okay"; +}; + +&msc0 { + status = "okay"; + + bus-width = <4>; + max-frequency = <50000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_msc0>; + + non-removable; +}; + +&msc1 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + bus-width = <4>; + max-frequency = <50000000>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_msc1>; + + non-removable; + + mmc-pwrseq = <&wlan_pwrseq>; + + ap6212a: wifi@1 { + compatible = "brcm,bcm4329-fmac"; + reg = <1>; + + interrupt-parent = <&gpc>; + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "host-wake"; + + brcm,drive-strength = <10>; + }; +}; + +&mac { + status = "okay"; + + phy-mode = "rmii"; + phy-handle = <&ip101gr>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_mac>; + + snps,reset-gpio = <&gpb 28 GPIO_ACTIVE_LOW>; /* PB28 */ + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; +}; + +&mdio { + status = "okay"; + + ip101gr: ethernet-phy@0 { + compatible = "ethernet-phy-id0243.0c54", "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; +}; + +&otg_phy { + status = "okay"; +}; + +&otg { + status = "okay"; +}; + +&pinctrl { + pins_uart1: uart1 { + function = "uart1"; + groups = "uart1-data"; + bias-pull-up; + }; + + pins_ssi0: ssi0 { + function = "ssi0"; + groups = "ssi0-dt", "ssi0-dr", "ssi0-clk", "ssi0-ce0", "ssi0-ce1"; + bias-disable; + }; + + pins_i2c0: i2c0 { + function = "i2c0"; + groups = "i2c0-data"; + bias-pull-up; + }; + + pins_msc0: msc0 { + function = "mmc0"; + groups = "mmc0-1bit", "mmc0-4bit"; + bias-disable; + }; + + pins_msc1: msc1 { + function = "mmc1"; + groups = "mmc1-1bit", "mmc1-4bit"; + bias-disable; + }; + + pins_mac: mac { + function = "mac"; + groups = "mac"; + bias-disable; + }; +}; |