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-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml new file mode 100644 index 000000000..0358a7739 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs interrupt controller devicetree bindings + +maintainers: + - Paul Cercueil <paul@crapouillou.net> + +properties: + $nodename: + pattern: "^interrupt-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - ingenic,jz4740-intc + - ingenic,jz4760-intc + - ingenic,jz4780-intc + - items: + - enum: + - ingenic,jz4775-intc + - ingenic,jz4770-intc + - ingenic,jz4760b-intc + - const: ingenic,jz4760-intc + - items: + - const: ingenic,x1000-intc + - const: ingenic,jz4780-intc + - items: + - const: ingenic,jz4725b-intc + - const: ingenic,jz4740-intc + + "#interrupt-cells": + const: 1 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +required: + - compatible + - reg + - interrupts + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false + +examples: + - | + intc: interrupt-controller@10001000 { + compatible = "ingenic,jz4770-intc", "ingenic,jz4760-intc"; + reg = <0x10001000 0x40>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; |