summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.yaml
diff options
context:
space:
mode:
Diffstat (limited to '')
-rw-r--r--Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.yaml51
1 files changed, 51 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.yaml b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.yaml
new file mode 100644
index 000000000..6f504fa74
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.yaml
@@ -0,0 +1,51 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/nvidia,tegra20-apbmisc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra APBMISC block
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+ - Jon Hunter <jonathanh@nvidia.com>
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - nvidia,tegra210-apbmisc
+ - nvidia,tegra124-apbmisc
+ - nvidia,tegra114-apbmisc
+ - nvidia,tegra30-apbmisc
+ - const: nvidia,tegra20-apbmisc
+
+ - items:
+ - const: nvidia,tegra20-apbmisc
+
+ reg:
+ items:
+ - description: physical address and length of the registers which
+ contain revision and debug features
+ - description: physical address and length of the registers which
+ indicate strapping options
+
+ nvidia,long-ram-code:
+ description: If present, the RAM code is long (4 bit). If not, short
+ (2 bit).
+ type: boolean
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+
+examples:
+ - |
+ apbmisc@70000800 {
+ compatible = "nvidia,tegra20-apbmisc";
+ reg = <0x70000800 0x64>, /* Chip revision */
+ <0x70000008 0x04>; /* Strapping options */
+ };