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Diffstat (limited to 'Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml new file mode 100644 index 000000000..c2f4cb0b2 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Mediatek Mt7621 PCIe PHY + +maintainers: + - Sergio Paracuellos <sergio.paracuellos@gmail.com> + +properties: + compatible: + const: mediatek,mt7621-pci-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#phy-cells": + const: 1 + description: selects if the phy is dual-ported + +required: + - compatible + - reg + - clocks + - "#phy-cells" + +additionalProperties: false + +examples: + - | + pcie0_phy: pcie-phy@1e149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e149000 0x0700>; + clocks = <&sysc 0>; + #phy-cells = <1>; + }; |