From 2c3c1048746a4622d8c89a29670120dc8fab93c4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sun, 7 Apr 2024 20:49:45 +0200 Subject: Adding upstream version 6.1.76. Signed-off-by: Daniel Baumann --- drivers/pinctrl/meson/pinctrl-meson8-pmx.c | 104 +++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 drivers/pinctrl/meson/pinctrl-meson8-pmx.c (limited to 'drivers/pinctrl/meson/pinctrl-meson8-pmx.c') diff --git a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c new file mode 100644 index 000000000..f767b6923 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * First generation of pinmux driver for Amlogic Meson SoCs + * + * Copyright (C) 2014 Beniamino Galvani + * Copyright (C) 2017 Jerome Brunet + */ + +/* For this first generation of pinctrl driver every pinmux group can be + * enabled by a specific bit in the first register range. When all groups for + * a given pin are disabled the pin acts as a GPIO. + */ +#include +#include +#include +#include + +#include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" + +/** + * meson8_pmx_disable_other_groups() - disable other groups using a given pin + * + * @pc: meson pin controller device + * @pin: number of the pin + * @sel_group: index of the selected group, or -1 if none + * + * The function disables all pinmux groups using a pin except the + * selected one. If @sel_group is -1 all groups are disabled, leaving + * the pin in GPIO mode. + */ +static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc, + unsigned int pin, int sel_group) +{ + struct meson_pmx_group *group; + struct meson8_pmx_data *pmx_data; + int i, j; + + for (i = 0; i < pc->data->num_groups; i++) { + group = &pc->data->groups[i]; + pmx_data = (struct meson8_pmx_data *)group->data; + if (pmx_data->is_gpio || i == sel_group) + continue; + + for (j = 0; j < group->num_pins; j++) { + if (group->pins[j] == pin) { + /* We have found a group using the pin */ + regmap_update_bits(pc->reg_mux, + pmx_data->reg * 4, + BIT(pmx_data->bit), 0); + } + } + } +} + +static int meson8_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num, + unsigned group_num) +{ + struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); + struct meson_pmx_func *func = &pc->data->funcs[func_num]; + struct meson_pmx_group *group = &pc->data->groups[group_num]; + struct meson8_pmx_data *pmx_data = + (struct meson8_pmx_data *)group->data; + int i, ret = 0; + + dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, + group->name); + + /* + * Disable groups using the same pin. + * The selected group is not disabled to avoid glitches. + */ + for (i = 0; i < group->num_pins; i++) + meson8_pmx_disable_other_groups(pc, group->pins[i], group_num); + + /* Function 0 (GPIO) doesn't need any additional setting */ + if (func_num) + ret = regmap_update_bits(pc->reg_mux, pmx_data->reg * 4, + BIT(pmx_data->bit), + BIT(pmx_data->bit)); + + return ret; +} + +static int meson8_pmx_request_gpio(struct pinctrl_dev *pcdev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); + + meson8_pmx_disable_other_groups(pc, offset, -1); + + return 0; +} + +const struct pinmux_ops meson8_pmx_ops = { + .set_mux = meson8_pmx_set_mux, + .get_functions_count = meson_pmx_get_funcs_count, + .get_function_name = meson_pmx_get_func_name, + .get_function_groups = meson_pmx_get_groups, + .gpio_request_enable = meson8_pmx_request_gpio, +}; +EXPORT_SYMBOL_GPL(meson8_pmx_ops); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3