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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:46:10 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-07 18:46:10 +0000
commit7050cdb205fd1b1b847c148092a8548f00a061c0 (patch)
tree05a497ffd12f14405445c3288085e228f4e8579f /debian/patches/bug1917414.patch
parentAdding upstream version 16.2.11+ds. (diff)
downloadceph-7050cdb205fd1b1b847c148092a8548f00a061c0.tar.xz
ceph-7050cdb205fd1b1b847c148092a8548f00a061c0.zip
Adding debian version 16.2.11+ds-2.debian/16.2.11+ds-2debian
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'debian/patches/bug1917414.patch')
-rw-r--r--debian/patches/bug1917414.patch143
1 files changed, 143 insertions, 0 deletions
diff --git a/debian/patches/bug1917414.patch b/debian/patches/bug1917414.patch
new file mode 100644
index 000000000..aca739fb9
--- /dev/null
+++ b/debian/patches/bug1917414.patch
@@ -0,0 +1,143 @@
+From db463aa139aa0f3eb996062bd7c65f0d10a7932b Mon Sep 17 00:00:00 2001
+From: luo rixin <luorixin@huawei.com>
+Date: Fri, 8 Jan 2021 16:16:02 +0800
+Subject: [PATCH] src/isa-l/erasure_code: Fix text relocation on aarch64
+
+Here is the bug report on ceph. https://tracker.ceph.com/issues/48681
+
+Signed-off-by: luo rixin <luorixin@huawei.com>
+---
+ src/isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S | 5 +++--
+ src/isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S | 5 +++--
+ src/isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S | 5 +++--
+ src/isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S | 5 +++--
+ src/isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S | 5 +++--
+ src/isa-l/erasure_code/aarch64/gf_vect_mad_neon.S | 5 +++--
+ 6 files changed, 18 insertions(+), 12 deletions(-)
+
+--- a/src/isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_2vect_mad_neon.S
+@@ -360,7 +360,8 @@ gf_2vect_mad_neon:
+ sub x_dest1, x_dest1, x_tmp
+ sub x_dest2, x_dest2, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -394,7 +395,7 @@ gf_2vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000
+--- a/src/isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_3vect_mad_neon.S
+@@ -332,7 +332,8 @@ gf_3vect_mad_neon:
+ sub x_dest2, x_dest2, x_tmp
+ sub x_dest3, x_dest3, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -374,7 +375,7 @@ gf_3vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000
+--- a/src/isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_4vect_mad_neon.S
+@@ -397,7 +397,8 @@ gf_4vect_mad_neon:
+ sub x_dest3, x_dest3, x_tmp
+ sub x_dest4, x_dest4, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -448,7 +449,7 @@ gf_4vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000
+--- a/src/isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_5vect_mad_neon.S
+@@ -463,7 +463,8 @@ gf_5vect_mad_neon:
+ sub x_dest4, x_dest4, x_tmp
+ sub x_dest5, x_dest5, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -527,7 +528,7 @@ gf_5vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000
+--- a/src/isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_6vect_mad_neon.S
+@@ -526,7 +526,8 @@ gf_6vect_mad_neon:
+ sub x_dest5, x_dest5, x_tmp
+ sub x_dest6, x_dest6, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -602,7 +603,7 @@ gf_6vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000
+--- a/src/isa-l/erasure_code/aarch64/gf_vect_mad_neon.S
++++ b/src/isa-l/erasure_code/aarch64/gf_vect_mad_neon.S
+@@ -281,7 +281,8 @@ gf_vect_mad_neon:
+ mov x_src, x_src_end
+ sub x_dest1, x_dest1, x_tmp
+
+- ldr x_const, =const_tbl
++ adrp x_const, const_tbl
++ add x_const, x_const, :lo12:const_tbl
+ sub x_const, x_const, x_tmp
+ ldr q_tmp, [x_const, #16]
+
+@@ -307,7 +308,7 @@ gf_vect_mad_neon:
+ mov w_ret, #1
+ ret
+
+-.section .data
++.section .rodata
+ .balign 8
+ const_tbl:
+ .dword 0x0000000000000000, 0x0000000000000000