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-rw-r--r--third_party/libwebrtc/build/config/mips.gni67
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diff --git a/third_party/libwebrtc/build/config/mips.gni b/third_party/libwebrtc/build/config/mips.gni
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+# Copyright 2015 The Chromium Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+import("//build/config/v8_target_cpu.gni")
+
+# These are primarily relevant in target_cpu == "mips*" contexts, where
+# MIPS code is being compiled. But they can also be relevant in the
+# other contexts when the code will change its behavior based on the
+# cpu it wants to generate code for.
+declare_args() {
+ # MIPS MultiMedia Instruction compilation flag.
+ mips_use_mmi = false
+}
+
+if (target_cpu == "mipsel" || v8_target_cpu == "mipsel" ||
+ target_cpu == "mips" || v8_target_cpu == "mips") {
+ declare_args() {
+ # MIPS arch variant. Possible values are:
+ # "r1"
+ # "r2"
+ # "r6"
+ # "loongson3"
+ mips_arch_variant = "r1"
+
+ # MIPS DSP ASE revision. Possible values are:
+ # 0: unavailable
+ # 1: revision 1
+ # 2: revision 2
+ mips_dsp_rev = 0
+
+ # MIPS SIMD Arch compilation flag.
+ mips_use_msa = false
+
+ # MIPS floating-point ABI. Possible values are:
+ # "hard": sets the GCC -mhard-float option.
+ # "soft": sets the GCC -msoft-float option.
+ mips_float_abi = "hard"
+
+ # MIPS32 floating-point register width. Possible values are:
+ # "fp32": sets the GCC -mfp32 option.
+ # "fp64": sets the GCC -mfp64 option.
+ # "fpxx": sets the GCC -mfpxx option.
+ mips_fpu_mode = "fp32"
+ }
+} else if (target_cpu == "mips64el" || v8_target_cpu == "mips64el" ||
+ target_cpu == "mips64" || v8_target_cpu == "mips64") {
+ # MIPS arch variant. Possible values are:
+ # "r2"
+ # "r6"
+ # "loongson3"
+ if (current_os == "android" || target_os == "android") {
+ declare_args() {
+ mips_arch_variant = "r6"
+
+ # MIPS SIMD Arch compilation flag.
+ mips_use_msa = true
+ }
+ } else {
+ declare_args() {
+ mips_arch_variant = "r2"
+
+ # MIPS SIMD Arch compilation flag.
+ mips_use_msa = false
+ }
+ }
+}