Adding upstream version 6.1.76.upstream/6.1.76upstream

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

1 files changed, 63 insertions, 0 deletions

diff --git a/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_cfg_kernel_tensor_0_regs.h b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_cfg_kernel_tensor_0_regs.h
new file mode 100644
index 000000000..4ef1c1edc
--- /dev/null
+++ b/drivers/misc/habanalabs/include/gaudi2/asic_reg/dcore0_tpc0_cfg_kernel_tensor_0_regs.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright 2016-2020 HabanaLabs, Ltd.
+ * All Rights Reserved.
+ *
+ */
+
+/************************************
+ ** This is an auto-generated file **
+ **       DO NOT EDIT BELOW        **
+ ************************************/
+
+#ifndef ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_
+#define ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_
+
+/*
+ *****************************************
+ *   DCORE0_TPC0_CFG_KERNEL_TENSOR_0
+ *   (Prototype: TPC_TENSOR)
+ *****************************************
+ */
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_LOW 0x400B000
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_BASE_ADDR_HIGH 0x400B004
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_PADDING_VALUE 0x400B008
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_TENSOR_CONFIG 0x400B00C
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE 0x400B010
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_STRIDE 0x400B014
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE 0x400B018
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_STRIDE 0x400B01C
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE 0x400B020
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_STRIDE 0x400B024
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE 0x400B028
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_STRIDE 0x400B02C
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE 0x400B030
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_STRIDE 0x400B034
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_PREF_STRIDE 0x400B038
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_0_SIZE_STRIDE_HIGH 0x400B03C
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_1_SIZE_STRIDE_HIGH 0x400B040
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_2_SIZE_STRIDE_HIGH 0x400B044
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_3_SIZE_STRIDE_HIGH 0x400B048
+
+#define mmDCORE0_TPC0_CFG_KERNEL_TENSOR_0_DIM_4_SIZE_STRIDE_HIGH 0x400B04C
+
+#endif /* ASIC_REG_DCORE0_TPC0_CFG_KERNEL_TENSOR_0_REGS_H_ */