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+# SPDX-License-Identifier: GPL-2.0-only
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys Designware Mobile Storage Host Controller Binding
+
+maintainers:
+ - Ulf Hansson <ulf.hansson@linaro.org>
+ - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
+
+allOf:
+ - $ref: mmc-controller.yaml#
+
+properties:
+ compatible:
+ enum:
+ - rockchip,rk3568-dwcmshc
+ - rockchip,rk3588-dwcmshc
+ - snps,dwcmshc-sdhci
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: core clock
+ - description: bus clock for optional
+ - description: axi clock for rockchip specified
+ - description: block clock for rockchip specified
+ - description: timer clock for rockchip specified
+
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: core
+ - const: bus
+ - const: axi
+ - const: block
+ - const: timer
+
+ rockchip,txclk-tapnum:
+ description: Specify the number of delay for tx sampling.
+ $ref: /schemas/types.yaml#/definitions/uint8
+
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ mmc@fe310000 {
+ compatible = "rockchip,rk3568-dwcmshc";
+ reg = <0xfe310000 0x10000>;
+ interrupts = <0 25 0x4>;
+ clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
+ clock-names = "core", "bus", "axi", "block", "timer";
+ bus-width = <8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ - |
+ mmc@aa0000 {
+ compatible = "snps,dwcmshc-sdhci";
+ reg = <0xaa000 0x1000>;
+ interrupts = <0 25 0x4>;
+ clocks = <&cru 17>, <&cru 18>;
+ clock-names = "core", "bus";
+ bus-width = <8>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+...