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-rw-r--r-- | Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml | 170 |
1 files changed, 170 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml new file mode 100644 index 000000000..308485a8e --- /dev/null +++ b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell International Ltd. NCI NFC controller + +maintainers: + - Krzysztof Kozlowski <krzk@kernel.org> + +properties: + compatible: + enum: + - marvell,nfc-i2c + - marvell,nfc-spi + - marvell,nfc-uart + + hci-muxed: + type: boolean + description: | + Specifies that the chip is muxing NCI over HCI frames + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + reset-n-io: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + maxItems: 1 + description: | + Output GPIO pin used to reset the chip (active low) + + i2c-int-falling: + type: boolean + description: | + For I2C type of connection. Specifies that the chip read event shall be + trigged on falling edge. + + i2c-int-rising: + type: boolean + description: | + For I2C type of connection. Specifies that the chip read event shall be + trigged on rising edge. + + break-control: + type: boolean + description: | + For UART type of connection. Specifies that the chip needs specific break + management. + + flow-control: + type: boolean + description: | + For UART type of connection. Specifies that the chip is using RTS/CTS. + + spi-cpha: true + spi-cpol: true + +required: + - compatible + +allOf: + - if: + properties: + compatible: + contains: + const: marvell,nfc-i2c + then: + properties: + break-control: false + flow-control: false + spi-cpha: false + spi-cpol: false + spi-max-frequency: false + required: + - reg + + - if: + properties: + compatible: + contains: + const: marvell,nfc-spi + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# + properties: + break-control: false + flow-control: false + i2c-int-falling: false + i2c-int-rising: false + required: + - reg + + - if: + properties: + compatible: + contains: + const: marvell,nfc-uart + then: + properties: + i2c-int-falling: false + i2c-int-rising: false + interrupts: false + spi-cpha: false + spi-cpol: false + spi-max-frequency: false + reg: false + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + nfc@8 { + compatible = "marvell,nfc-i2c"; + reg = <0x8>; + + interrupt-parent = <&gpio3>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>; + + i2c-int-rising; + + reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + nfc@0 { + compatible = "marvell,nfc-spi"; + reg = <0>; + + spi-max-frequency = <3000000>; + spi-cpha; + spi-cpol; + + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; + + reset-n-io = <&gpio3 19 GPIO_ACTIVE_LOW>; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + + uart { + nfc { + compatible = "marvell,nfc-uart"; + + reset-n-io = <&gpio3 16 GPIO_ACTIVE_LOW>; + + hci-muxed; + flow-control; + }; + }; |